source: rtems/c/src/lib/libcpu/mips/mongoosev/duart/mg5uart.h @ acdb6558

4.104.114.84.9
Last change on this file since acdb6558 was acdb6558, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 14, 2001 at 12:49:17 AM

2001-03-13 Joel Sherrill <joel@…>

  • Added mongoose-v, mongoose-v/include, and mongoose-v/vectorisrs directories.
  • mongoosev/.cvsignore, mongoosev/Makefile.am, mongoosev/README, mongoosev/duart/.cvsignore, mongoosev/duart/Makefile.am, mongoosev/duart/README.mguart, mongoosev/duart/mg5uart.c, mongoosev/duart/mg5uart.h, mongoosev/duart/mg5uart_reg.c, mongoosev/include/.cvsignore, mongoosev/include/Makefile.am, mongoosev/include/mongoose-v.h, mongoosev/vectorisrs/.cvsignore, mongoosev/vectorisrs/Makefile.am, mongoosev/vectorisrs/vectorisrs.c: New files.
  • Makefile.am, configure.in, shared/interrupts/Makefile.am, shared/interrupts/maxvectors.c: Added support for mongoosev.
  • tx39/vectorisrs/vectorisrs.c: Corrected warning.
  • Property mode set to 100644
File size: 2.1 KB
Line 
1/*
2 *
3 *  COPYRIGHT (c) 1989-1999.
4 *  On-Line Applications Research Corporation (OAR).
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#ifndef _MG5UART_H_
14#define _MG5UART_H_
15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20/*
21 *  This is the ASCII for "MG5U" which should be unique enough to
22 *  distinguish this type of serial device from others.
23 */
24
25#define SERIAL_MG5UART 0x474D5535
26
27#define MG5UART_UART0  0
28#define MG5UART_UART1  1
29
30/*
31 *  These are just used in the interface between this driver and
32 *  the read/write register routines when accessing the first
33 *  control port.  They are indices of registers from the bases.
34 */
35
36/* shared registers from peripheral base (i.e. from ulCtrlPort1) */
37#define MG5UART_COMMAND_REGISTER          0
38#define MG5UART_STATUS_REGISTER           1
39#define MG5UART_INTERRUPT_CAUSE_REGISTER  2
40#define MG5UART_INTERRUPT_MASK_REGISTER   3
41
42/* port specific registers from uart base (i.e. from ulCtrlPort2) */
43#define MG5UART_RX_BUFFER 0
44#define MG5UART_TX_BUFFER 1
45#define MG5UART_BAUD_RATE 2
46
47/*
48 *  Interrupt mask values
49 */
50
51#define MG5UART_ENABLE_ALL_EXCEPT_TX MONGOOSEV_UART_ALL_RX_STATUS_BITS
52#define MG5UART_ENABLE_ALL           (MONGOOSEV_UART_ALL_STATUS_BITS)
53#define MG5UART_DISABLE_ALL          0x0000
54
55/*
56 *  Assume vectors are sequential.
57 */
58
59#define MG5UART_IRQ_RX_FRAME_ERROR   0
60#define MG5UART_IRQ_RX_OVERRUN_ERROR 1
61#define MG5UART_IRQ_TX_EMPTY         2
62#define MG5UART_IRQ_TX_READY         3
63#define MG5UART_IRQ_RX_READY         4
64/*
65 * Driver function table
66 */
67
68extern console_fns mg5uart_fns;
69extern console_fns mg5uart_fns_polled;
70
71/*
72 * Default register access routines
73 */
74
75unsigned32 mg5uart_get_register(    /* registers are on 32-bit boundaries */
76  unsigned32  ulCtrlPort,           /*   and accessed as word             */
77  unsigned32  ucRegNum
78);
79
80void  mg5uart_set_register(
81  unsigned32  ulCtrlPort,
82  unsigned32  ucRegNum,
83  unsigned32  ucData
84);
85
86#ifdef __cplusplus
87}
88#endif
89
90#endif /* _MG5UART_H_ */
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