1 | /** |
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2 | * @file |
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3 | * |
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4 | * This file contains the termios TTY driver for the UART found |
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5 | * on the Synova Mongoose-V. |
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6 | */ |
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7 | |
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8 | /* |
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9 | * COPYRIGHT (c) 1989-2012. |
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10 | * On-Line Applications Research Corporation (OAR). |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE. |
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15 | */ |
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16 | |
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17 | #include <rtems.h> |
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18 | #include <rtems/libio.h> |
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19 | #include <rtems/score/sysstate.h> |
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20 | #include <stdlib.h> |
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21 | |
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22 | #include <libchip/serial.h> |
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23 | #include <libchip/mg5uart.h> |
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24 | #include <libchip/sersupp.h> |
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25 | #include <libcpu/mongoose-v.h> |
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26 | |
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27 | #include <bsp/irq.h> |
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28 | #include <bsp.h> |
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29 | |
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30 | /* |
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31 | * Indices of registers |
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32 | */ |
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33 | |
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34 | /* |
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35 | * Per chip context control |
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36 | */ |
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37 | |
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38 | typedef struct _mg5uart_context |
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39 | { |
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40 | int mate; |
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41 | } mg5uart_context; |
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42 | |
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43 | /* |
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44 | * Define MG5UART_STATIC to nothing while debugging so the entry points |
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45 | * will show up in the symbol table. |
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46 | */ |
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47 | |
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48 | #define MG5UART_STATIC |
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49 | |
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50 | /* #define MG5UART_STATIC static */ |
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51 | |
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52 | |
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53 | |
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54 | #define MG5UART_SETREG( _base, _register, _value ) \ |
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55 | MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) |
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56 | |
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57 | #define MG5UART_GETREG( _base, _register ) \ |
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58 | MONGOOSEV_READ_REGISTER( _base, _register ) |
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59 | |
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60 | |
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61 | /* |
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62 | * Console Device Driver Support Functions |
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63 | */ |
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64 | |
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65 | MG5UART_STATIC int mg5uart_baud_rate( |
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66 | int minor, |
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67 | uint32_t baud, |
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68 | uint32_t *code |
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69 | ); |
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70 | |
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71 | MG5UART_STATIC void mg5uart_enable_interrupts( |
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72 | int minor, |
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73 | int mask |
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74 | ); |
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75 | |
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76 | /* |
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77 | * mg5uart_isr_XXX |
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78 | * |
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79 | * This is the single interrupt entry point which parcels interrupts |
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80 | * out to the handlers for specific sources and makes sure that the |
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81 | * shared handler gets the right arguments. |
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82 | * |
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83 | * NOTE: Yes .. this is ugly but it provides 5 interrupt source |
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84 | * wrappers which are nearly functionally identical. |
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85 | */ |
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86 | |
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87 | |
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88 | extern void mips_default_isr(int vector); |
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89 | |
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90 | #define __ISR(_TYPE, _OFFSET) \ |
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91 | MG5UART_STATIC void mg5uart_process_isr_ ## _TYPE ( \ |
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92 | int minor \ |
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93 | ); \ |
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94 | \ |
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95 | MG5UART_STATIC rtems_isr mg5uart_isr_ ## _TYPE ( \ |
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96 | void *arg \ |
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97 | ) \ |
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98 | { \ |
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99 | rtems_vector_number vector = (rtems_vector_number) arg; \ |
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100 | int minor; \ |
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101 | \ |
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102 | for(minor=0 ; minor<Console_Port_Count ; minor++) { \ |
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103 | if( Console_Port_Tbl[minor]->deviceType == SERIAL_MG5UART && \ |
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104 | vector == Console_Port_Tbl[minor]->ulIntVector + _OFFSET ) { \ |
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105 | mg5uart_process_isr_ ## _TYPE (minor); \ |
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106 | return; \ |
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107 | } \ |
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108 | } \ |
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109 | mips_default_isr( vector ); \ |
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110 | } |
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111 | |
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112 | __ISR(rx_frame_error, MG5UART_IRQ_RX_FRAME_ERROR) |
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113 | __ISR(rx_overrun_error, MG5UART_IRQ_RX_OVERRUN_ERROR) |
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114 | __ISR(tx_empty, MG5UART_IRQ_TX_EMPTY) |
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115 | __ISR(tx_ready, MG5UART_IRQ_TX_READY) |
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116 | __ISR(rx_ready, MG5UART_IRQ_RX_READY) |
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117 | |
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118 | /* |
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119 | * mg5uart_set_attributes |
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120 | * |
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121 | * This function sets the UART channel to reflect the requested termios |
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122 | * port settings. |
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123 | */ |
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124 | |
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125 | MG5UART_STATIC int mg5uart_set_attributes( |
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126 | int minor, |
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127 | const struct termios *t |
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128 | ) |
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129 | { |
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130 | uint32_t pMG5UART_port; |
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131 | uint32_t pMG5UART; |
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132 | uint32_t cmd, cmdSave; |
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133 | uint32_t baudcmd; |
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134 | uint32_t shift; |
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135 | rtems_interrupt_level Irql; |
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136 | |
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137 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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138 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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139 | |
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140 | /* |
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141 | * Set the baud rate |
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142 | */ |
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143 | |
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144 | if (mg5uart_baud_rate( minor, t->c_cflag, &baudcmd ) == -1) |
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145 | return -1; |
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146 | |
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147 | /* |
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148 | * Base settings |
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149 | */ |
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150 | |
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151 | /* |
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152 | * Base settings |
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153 | */ |
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154 | |
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155 | cmd = MONGOOSEV_UART_CMD_RX_ENABLE | MONGOOSEV_UART_CMD_TX_ENABLE; |
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156 | |
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157 | /* |
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158 | * Parity |
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159 | */ |
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160 | |
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161 | if (t->c_cflag & PARENB) { |
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162 | cmd |= MONGOOSEV_UART_CMD_PARITY_ENABLE; |
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163 | if (t->c_cflag & PARODD) |
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164 | cmd |= MONGOOSEV_UART_CMD_PARITY_ODD; |
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165 | else |
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166 | cmd |= MONGOOSEV_UART_CMD_PARITY_EVEN; |
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167 | } else { |
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168 | cmd |= MONGOOSEV_UART_CMD_PARITY_DISABLE; |
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169 | } |
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170 | |
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171 | /* |
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172 | * Character Size |
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173 | */ |
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174 | |
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175 | if (t->c_cflag & CSIZE) { |
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176 | switch (t->c_cflag & CSIZE) { |
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177 | case CS5: |
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178 | case CS6: |
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179 | case CS7: |
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180 | return -1; |
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181 | break; |
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182 | case CS8: |
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183 | /* Mongoose-V only supports CS8 */ |
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184 | break; |
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185 | |
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186 | } |
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187 | } /* else default to CS8 */ |
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188 | |
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189 | /* |
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190 | * Stop Bits |
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191 | */ |
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192 | |
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193 | #if 0 |
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194 | if (t->c_cflag & CSTOPB) { |
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195 | /* 2 stop bits not supported by Mongoose-V uart */ |
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196 | return -1; |
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197 | } |
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198 | #endif |
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199 | |
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200 | /* |
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201 | * XXX what about CTS/RTS |
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202 | */ |
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203 | |
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204 | /* XXX */ |
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205 | |
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206 | /* |
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207 | * Now write the registers |
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208 | */ |
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209 | |
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210 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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211 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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212 | else |
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213 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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214 | |
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215 | |
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216 | |
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217 | rtems_interrupt_disable(Irql); |
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218 | |
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219 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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220 | |
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221 | MG5UART_SETREG( pMG5UART, |
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222 | MG5UART_COMMAND_REGISTER, |
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223 | (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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224 | |
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225 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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226 | |
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227 | rtems_interrupt_enable(Irql); |
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228 | return 0; |
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229 | } |
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230 | |
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231 | /* |
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232 | * mg5uart_initialize_context |
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233 | * |
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234 | * This function sets the default values of the per port context structure. |
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235 | */ |
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236 | |
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237 | MG5UART_STATIC void mg5uart_initialize_context( |
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238 | int minor, |
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239 | mg5uart_context *pmg5uartContext |
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240 | ) |
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241 | { |
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242 | int port; |
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243 | unsigned int pMG5UART; |
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244 | unsigned int pMG5UART_port; |
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245 | |
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246 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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247 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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248 | |
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249 | pmg5uartContext->mate = -1; |
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250 | |
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251 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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252 | if ( Console_Port_Tbl[port]->ulCtrlPort1 == pMG5UART && |
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253 | Console_Port_Tbl[port]->ulCtrlPort2 != pMG5UART_port ) { |
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254 | pmg5uartContext->mate = port; |
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255 | break; |
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256 | } |
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257 | } |
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258 | |
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259 | } |
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260 | |
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261 | /* |
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262 | * mg5uart_init |
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263 | * |
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264 | * This function initializes the DUART to a quiecsent state. |
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265 | */ |
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266 | |
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267 | MG5UART_STATIC void mg5uart_init(int minor) |
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268 | { |
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269 | uint32_t pMG5UART_port; |
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270 | uint32_t pMG5UART; |
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271 | uint32_t cmdSave; |
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272 | uint32_t shift; |
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273 | |
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274 | mg5uart_context *pmg5uartContext; |
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275 | |
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276 | pmg5uartContext = (mg5uart_context *) malloc(sizeof(mg5uart_context)); |
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277 | |
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278 | Console_Port_Data[minor].pDeviceContext = (void *)pmg5uartContext; |
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279 | |
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280 | mg5uart_initialize_context( minor, pmg5uartContext ); |
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281 | |
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282 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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283 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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284 | |
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285 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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286 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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287 | else |
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288 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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289 | |
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290 | /* |
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291 | * Disable the uart and leave this port disabled. |
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292 | */ |
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293 | |
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294 | cmdSave = MG5UART_GETREG(pMG5UART, MG5UART_COMMAND_REGISTER) & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift); |
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295 | |
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296 | MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmdSave ); |
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297 | |
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298 | /* |
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299 | * Disable interrupts on RX and TX for this port |
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300 | */ |
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301 | mg5uart_enable_interrupts( minor, MG5UART_DISABLE_ALL ); |
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302 | } |
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303 | |
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304 | /* |
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305 | * mg5uart_open |
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306 | * |
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307 | * This function opens a port for communication. |
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308 | * |
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309 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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310 | */ |
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311 | |
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312 | MG5UART_STATIC int mg5uart_open( |
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313 | int major, |
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314 | int minor, |
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315 | void *arg |
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316 | ) |
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317 | { |
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318 | uint32_t pMG5UART; |
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319 | uint32_t pMG5UART_port; |
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320 | uint32_t vector; |
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321 | uint32_t cmd, cmdSave; |
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322 | uint32_t baudcmd; |
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323 | uint32_t shift; |
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324 | |
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325 | rtems_interrupt_level Irql; |
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326 | |
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327 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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328 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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329 | vector = Console_Port_Tbl[minor]->ulIntVector; |
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330 | |
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331 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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332 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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333 | else |
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334 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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335 | |
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336 | |
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337 | /* XXX default baud rate could be from configuration table */ |
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338 | |
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339 | (void) mg5uart_baud_rate( minor, B19200, &baudcmd ); |
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340 | |
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341 | /* |
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342 | * Set the DUART channel to a default useable state |
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343 | * B19200, 8Nx since there is no stop bit control. |
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344 | */ |
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345 | |
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346 | cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_RX_ENABLE; |
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347 | |
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348 | rtems_interrupt_disable(Irql); |
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349 | |
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350 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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351 | |
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352 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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353 | |
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354 | MG5UART_SETREG( pMG5UART, |
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355 | MG5UART_COMMAND_REGISTER, |
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356 | cmd = (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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357 | |
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358 | rtems_interrupt_enable(Irql); |
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359 | |
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360 | return RTEMS_SUCCESSFUL; |
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361 | } |
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362 | |
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363 | /* |
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364 | * mg5uart_close |
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365 | * |
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366 | * This function shuts down the requested port. |
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367 | */ |
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368 | |
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369 | MG5UART_STATIC int mg5uart_close( |
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370 | int major, |
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371 | int minor, |
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372 | void *arg |
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373 | ) |
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374 | { |
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375 | uint32_t pMG5UART; |
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376 | uint32_t pMG5UART_port; |
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377 | uint32_t cmd, cmdSave; |
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378 | uint32_t shift; |
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379 | rtems_interrupt_level Irql; |
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380 | |
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381 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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382 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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383 | |
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384 | /* |
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385 | * Disable interrupts from this channel and then disable it totally. |
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386 | */ |
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387 | |
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388 | /* XXX interrupts */ |
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389 | |
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390 | cmd = MONGOOSEV_UART_CMD_TX_DISABLE | MONGOOSEV_UART_CMD_RX_DISABLE; |
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391 | |
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392 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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393 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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394 | else |
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395 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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396 | |
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397 | |
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398 | rtems_interrupt_disable(Irql); |
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399 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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400 | |
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401 | MG5UART_SETREG( pMG5UART, |
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402 | MG5UART_COMMAND_REGISTER, |
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403 | (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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404 | rtems_interrupt_enable(Irql); |
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405 | |
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406 | return(RTEMS_SUCCESSFUL); |
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407 | } |
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408 | |
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409 | |
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410 | |
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411 | |
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412 | /* |
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413 | * mg5uart_write_polled |
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414 | * |
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415 | * This routine polls out the requested character. |
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416 | */ |
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417 | |
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418 | MG5UART_STATIC void mg5uart_write_polled( |
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419 | int minor, |
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420 | char c |
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421 | ) |
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422 | { |
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423 | uint32_t pMG5UART; |
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424 | uint32_t pMG5UART_port; |
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425 | uint32_t status; |
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426 | int shift; |
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427 | int timeout; |
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428 | |
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429 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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430 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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431 | |
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432 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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433 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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434 | else |
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435 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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436 | |
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437 | /* |
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438 | * wait for transmitter holding register to be empty |
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439 | */ |
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440 | timeout = 2000; |
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441 | |
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442 | while( --timeout ) |
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443 | { |
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444 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
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445 | |
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446 | /* |
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447 | if ( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) == |
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448 | (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY) ) |
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449 | break; |
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450 | */ |
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451 | |
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452 | if( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) ) |
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453 | break; |
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454 | |
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455 | /* |
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456 | * Yield while we wait |
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457 | */ |
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458 | |
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459 | #if 0 |
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460 | if(_System_state_Is_up(_System_state_Get())) |
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461 | { |
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462 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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463 | } |
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464 | #endif |
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465 | } |
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466 | |
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467 | /* |
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468 | * transmit character |
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469 | */ |
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470 | |
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471 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, c); |
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472 | } |
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473 | |
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474 | MG5UART_STATIC void mg5uart_process_isr_rx_error( |
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475 | int minor, |
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476 | uint32_t mask |
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477 | ) |
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478 | { |
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479 | uint32_t pMG5UART; |
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480 | int shift; |
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481 | |
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482 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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483 | |
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484 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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485 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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486 | else |
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487 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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488 | |
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489 | /* now clear the error */ |
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490 | |
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491 | MG5UART_SETREG( |
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492 | pMG5UART, |
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493 | MG5UART_STATUS_REGISTER, |
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494 | mask << shift ); |
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495 | } |
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496 | |
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497 | |
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498 | MG5UART_STATIC void mg5uart_process_isr_rx_frame_error( |
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499 | int minor |
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500 | ) |
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501 | { |
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502 | mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_FRAME_ERROR ); |
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503 | } |
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504 | |
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505 | MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error( |
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506 | int minor |
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507 | ) |
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508 | { |
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509 | mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_OVERRUN_ERROR ); |
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510 | } |
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511 | |
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512 | |
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513 | |
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514 | |
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515 | |
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516 | |
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517 | |
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518 | |
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519 | MG5UART_STATIC void mg5uart_process_tx_isr( |
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520 | int minor, |
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521 | uint32_t source |
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522 | ) |
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523 | { |
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524 | uint32_t pMG5UART; |
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525 | int shift; |
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526 | |
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527 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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528 | |
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529 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
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530 | |
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531 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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532 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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533 | else |
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534 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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535 | |
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536 | MG5UART_SETREG( |
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537 | pMG5UART, |
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538 | MG5UART_STATUS_REGISTER, |
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539 | source << shift ); |
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540 | |
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541 | if( rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1) ) |
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542 | { |
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543 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); |
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544 | return; |
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545 | } |
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546 | |
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547 | /* |
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548 | * There are no more characters to transmit. The tx interrupts are be cleared |
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549 | * by writing data to the uart, so just disable the tx interrupt sources. |
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550 | */ |
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551 | |
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552 | Console_Port_Data[minor].bActive = FALSE; |
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553 | |
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554 | /* mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); */ |
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555 | } |
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556 | |
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557 | |
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558 | |
---|
559 | MG5UART_STATIC void mg5uart_process_isr_tx_empty( |
---|
560 | int minor |
---|
561 | ) |
---|
562 | { |
---|
563 | /* mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_EMPTY ); */ |
---|
564 | } |
---|
565 | |
---|
566 | MG5UART_STATIC void mg5uart_process_isr_tx_ready( |
---|
567 | int minor |
---|
568 | ) |
---|
569 | { |
---|
570 | mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_READY ); |
---|
571 | } |
---|
572 | |
---|
573 | |
---|
574 | |
---|
575 | |
---|
576 | |
---|
577 | MG5UART_STATIC void mg5uart_process_isr_rx_ready( |
---|
578 | int minor |
---|
579 | ) |
---|
580 | { |
---|
581 | uint32_t pMG5UART_port; |
---|
582 | char c; |
---|
583 | |
---|
584 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
585 | |
---|
586 | /* reading the RX buffer automatically resets the interrupt flag */ |
---|
587 | |
---|
588 | c = (char) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
---|
589 | |
---|
590 | rtems_termios_enqueue_raw_characters( |
---|
591 | Console_Port_Data[minor].termios_data, |
---|
592 | &c, 1 ); |
---|
593 | } |
---|
594 | |
---|
595 | static rtems_irq_connect_data mg5uart_rx_frame_error_cd = { \ |
---|
596 | 0, /* filled in at initialization */ |
---|
597 | mg5uart_isr_rx_frame_error, /* filled in at initialization */ |
---|
598 | NULL, /* (void *) minor */ |
---|
599 | NULL, |
---|
600 | NULL, |
---|
601 | NULL |
---|
602 | }; |
---|
603 | |
---|
604 | static rtems_irq_connect_data mg5uart_rx_overrun_error_cd = { \ |
---|
605 | 0, /* filled in at initialization */ |
---|
606 | mg5uart_isr_rx_overrun_error, /* filled in at initialization */ |
---|
607 | NULL, /* (void *) minor */ |
---|
608 | NULL, |
---|
609 | NULL, |
---|
610 | NULL |
---|
611 | }; |
---|
612 | |
---|
613 | static rtems_irq_connect_data mg5uart_tx_empty_cd = { \ |
---|
614 | 0, /* filled in at initialization */ |
---|
615 | mg5uart_isr_tx_empty, /* filled in at initialization */ |
---|
616 | NULL, /* (void *) minor */ |
---|
617 | NULL, |
---|
618 | NULL, |
---|
619 | NULL |
---|
620 | }; |
---|
621 | |
---|
622 | static rtems_irq_connect_data mg5uart_tx_ready_cd = { \ |
---|
623 | 0, /* filled in at initialization */ |
---|
624 | mg5uart_isr_tx_ready, /* filled in at initialization */ |
---|
625 | NULL, /* (void *) minor */ |
---|
626 | NULL, |
---|
627 | NULL, |
---|
628 | NULL |
---|
629 | }; |
---|
630 | |
---|
631 | static rtems_irq_connect_data mg5uart_rx_ready_cd = { \ |
---|
632 | 0, /* filled in at initialization */ |
---|
633 | mg5uart_isr_rx_ready, /* filled in at initialization */ |
---|
634 | NULL, /* (void *) minor */ |
---|
635 | NULL, |
---|
636 | NULL, |
---|
637 | NULL |
---|
638 | }; |
---|
639 | |
---|
640 | |
---|
641 | /* |
---|
642 | * mg5uart_initialize_interrupts |
---|
643 | * |
---|
644 | * This routine initializes the console's receive and transmit |
---|
645 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
---|
646 | */ |
---|
647 | |
---|
648 | MG5UART_STATIC void mg5uart_initialize_interrupts(int minor) |
---|
649 | { |
---|
650 | unsigned long v; |
---|
651 | mg5uart_init(minor); |
---|
652 | |
---|
653 | Console_Port_Data[minor].bActive = FALSE; |
---|
654 | v = Console_Port_Tbl[minor]->ulIntVector; |
---|
655 | |
---|
656 | mg5uart_rx_frame_error_cd.name = v + MG5UART_IRQ_RX_FRAME_ERROR; |
---|
657 | mg5uart_rx_overrun_error_cd.name = v + MG5UART_IRQ_RX_OVERRUN_ERROR; |
---|
658 | mg5uart_tx_empty_cd.name = v + MG5UART_IRQ_TX_EMPTY; |
---|
659 | mg5uart_tx_ready_cd.name = v + MG5UART_IRQ_TX_READY; |
---|
660 | mg5uart_rx_ready_cd.name = v + MG5UART_IRQ_RX_READY; |
---|
661 | |
---|
662 | mg5uart_rx_frame_error_cd.handle = (void *)mg5uart_rx_frame_error_cd.name; |
---|
663 | mg5uart_rx_overrun_error_cd.handle = (void *)mg5uart_rx_overrun_error_cd.name; |
---|
664 | mg5uart_tx_empty_cd.handle = (void *)mg5uart_tx_empty_cd.name; |
---|
665 | mg5uart_tx_ready_cd.handle = (void *)mg5uart_tx_ready_cd.name; |
---|
666 | mg5uart_rx_ready_cd.handle = (void *)mg5uart_rx_ready_cd.name; |
---|
667 | |
---|
668 | |
---|
669 | BSP_install_rtems_irq_handler( &mg5uart_rx_frame_error_cd ); |
---|
670 | BSP_install_rtems_irq_handler( &mg5uart_rx_overrun_error_cd ); |
---|
671 | BSP_install_rtems_irq_handler( &mg5uart_tx_empty_cd ); |
---|
672 | BSP_install_rtems_irq_handler( &mg5uart_tx_ready_cd ); |
---|
673 | BSP_install_rtems_irq_handler( &mg5uart_rx_ready_cd ); |
---|
674 | |
---|
675 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
---|
676 | } |
---|
677 | |
---|
678 | /* |
---|
679 | * mg5uart_write_support_int |
---|
680 | * |
---|
681 | * Console Termios output entry point when using interrupt driven output. |
---|
682 | */ |
---|
683 | |
---|
684 | MG5UART_STATIC int mg5uart_write_support_int( |
---|
685 | int minor, |
---|
686 | const char *buf, |
---|
687 | size_t len |
---|
688 | ) |
---|
689 | { |
---|
690 | uint32_t pMG5UART_port; |
---|
691 | |
---|
692 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
693 | |
---|
694 | /* |
---|
695 | * We are using interrupt driven output and termios only sends us |
---|
696 | * one character at a time. |
---|
697 | */ |
---|
698 | |
---|
699 | if ( !len ) |
---|
700 | return 0; |
---|
701 | |
---|
702 | /* |
---|
703 | * Put the character out and enable interrupts if necessary. |
---|
704 | */ |
---|
705 | |
---|
706 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf); |
---|
707 | |
---|
708 | if( Console_Port_Data[minor].bActive == FALSE ) |
---|
709 | { |
---|
710 | Console_Port_Data[minor].bActive = TRUE; |
---|
711 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); |
---|
712 | } |
---|
713 | |
---|
714 | return 1; |
---|
715 | } |
---|
716 | |
---|
717 | |
---|
718 | |
---|
719 | |
---|
720 | /* |
---|
721 | * mg5uart_write_support_polled |
---|
722 | * |
---|
723 | * Console Termios output entry point when using polled output. |
---|
724 | * |
---|
725 | */ |
---|
726 | |
---|
727 | MG5UART_STATIC ssize_t mg5uart_write_support_polled( |
---|
728 | int minor, |
---|
729 | const char *buf, |
---|
730 | size_t len |
---|
731 | ) |
---|
732 | { |
---|
733 | int nwrite = 0; |
---|
734 | |
---|
735 | /* |
---|
736 | * poll each byte in the string out of the port. |
---|
737 | */ |
---|
738 | while (nwrite < len) |
---|
739 | { |
---|
740 | mg5uart_write_polled(minor, *buf++); |
---|
741 | nwrite++; |
---|
742 | } |
---|
743 | |
---|
744 | /* |
---|
745 | * return the number of bytes written. |
---|
746 | */ |
---|
747 | return nwrite; |
---|
748 | } |
---|
749 | |
---|
750 | /* |
---|
751 | * mg5uart_inbyte_nonblocking_polled |
---|
752 | * |
---|
753 | * Console Termios polling input entry point. |
---|
754 | */ |
---|
755 | |
---|
756 | MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled( |
---|
757 | int minor |
---|
758 | ) |
---|
759 | { |
---|
760 | uint32_t pMG5UART; |
---|
761 | uint32_t pMG5UART_port; |
---|
762 | uint32_t status; |
---|
763 | uint32_t tmp,shift; |
---|
764 | |
---|
765 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
766 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
767 | |
---|
768 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
---|
769 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
---|
770 | else |
---|
771 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
---|
772 | |
---|
773 | /* reset overrrun or framing errors */ |
---|
774 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
---|
775 | |
---|
776 | if( (tmp = (status & 0x3)) ) |
---|
777 | { |
---|
778 | MG5UART_SETREG(pMG5UART, MG5UART_STATUS_REGISTER, (tmp << shift) ); |
---|
779 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
---|
780 | } |
---|
781 | |
---|
782 | if ( status & MONGOOSEV_UART_RX_READY ) |
---|
783 | { |
---|
784 | return (int) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
---|
785 | } |
---|
786 | else |
---|
787 | { |
---|
788 | return -1; |
---|
789 | } |
---|
790 | } |
---|
791 | |
---|
792 | /* |
---|
793 | * mg5uart_baud_rate |
---|
794 | */ |
---|
795 | |
---|
796 | MG5UART_STATIC int mg5uart_baud_rate( |
---|
797 | int minor, |
---|
798 | uint32_t baud, |
---|
799 | uint32_t *code |
---|
800 | ) |
---|
801 | { |
---|
802 | uint32_t clock; |
---|
803 | uint32_t tmp_code; |
---|
804 | uint32_t baud_requested; |
---|
805 | |
---|
806 | baud_requested = baud & CBAUD; |
---|
807 | if (!baud_requested) |
---|
808 | baud_requested = B9600; /* default to 9600 baud */ |
---|
809 | |
---|
810 | baud_requested = rtems_termios_baud_to_number( baud_requested ); |
---|
811 | |
---|
812 | clock = (uint32_t) Console_Port_Tbl[minor]->ulClock; |
---|
813 | if (!clock) |
---|
814 | rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER); |
---|
815 | |
---|
816 | /* |
---|
817 | * Formula is Code = round(ClockFrequency / Baud - 1). |
---|
818 | * |
---|
819 | * Since this is integer math, we will divide by twice the baud and |
---|
820 | * check the remaining odd bit. |
---|
821 | */ |
---|
822 | |
---|
823 | tmp_code = (clock / baud_requested) - 1; |
---|
824 | |
---|
825 | /* |
---|
826 | * From section 12.7, "Keep C>100 for best receiver operation." |
---|
827 | * That is 100 cycles which is not a lot of instructions. It is |
---|
828 | * reasonable to think that the Mongoose-V could not keep |
---|
829 | * up with C < 100. |
---|
830 | */ |
---|
831 | |
---|
832 | if ( tmp_code < 100 ) |
---|
833 | return RTEMS_INVALID_NUMBER; |
---|
834 | |
---|
835 | /* |
---|
836 | * upper word is receiver baud and lower word is transmitter baud |
---|
837 | */ |
---|
838 | |
---|
839 | *code = (tmp_code << 16) | tmp_code; |
---|
840 | |
---|
841 | return 0; |
---|
842 | } |
---|
843 | |
---|
844 | |
---|
845 | |
---|
846 | |
---|
847 | /* |
---|
848 | * mg5uart_enable_interrupts |
---|
849 | * |
---|
850 | * This function enables specific interrupt sources on the DUART. |
---|
851 | */ |
---|
852 | |
---|
853 | MG5UART_STATIC void mg5uart_enable_interrupts( |
---|
854 | int minor, |
---|
855 | int mask |
---|
856 | ) |
---|
857 | { |
---|
858 | uint32_t pMG5UART; |
---|
859 | uint32_t maskSave; |
---|
860 | uint32_t shift; |
---|
861 | rtems_interrupt_level Irql; |
---|
862 | |
---|
863 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
864 | |
---|
865 | /* |
---|
866 | * Enable interrupts on RX and TX -- not break |
---|
867 | */ |
---|
868 | |
---|
869 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
---|
870 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
---|
871 | else |
---|
872 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
---|
873 | |
---|
874 | |
---|
875 | rtems_interrupt_disable(Irql); |
---|
876 | |
---|
877 | maskSave = MG5UART_GETREG( pMG5UART, MG5UART_INTERRUPT_MASK_REGISTER ); |
---|
878 | |
---|
879 | MG5UART_SETREG( |
---|
880 | pMG5UART, |
---|
881 | MG5UART_INTERRUPT_MASK_REGISTER, |
---|
882 | (maskSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (mask << shift) ); |
---|
883 | |
---|
884 | rtems_interrupt_enable(Irql); |
---|
885 | } |
---|
886 | |
---|
887 | |
---|
888 | |
---|
889 | /* |
---|
890 | * Flow control is only supported when using interrupts |
---|
891 | */ |
---|
892 | |
---|
893 | const console_fns mg5uart_fns = |
---|
894 | { |
---|
895 | libchip_serial_default_probe, /* deviceProbe */ |
---|
896 | mg5uart_open, /* deviceFirstOpen */ |
---|
897 | NULL, /* deviceLastClose */ |
---|
898 | NULL, /* deviceRead */ |
---|
899 | mg5uart_write_support_int, /* deviceWrite */ |
---|
900 | mg5uart_initialize_interrupts, /* deviceInitialize */ |
---|
901 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
902 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
903 | TRUE /* deviceOutputUsesInterrupts */ |
---|
904 | }; |
---|
905 | |
---|
906 | const console_fns mg5uart_fns_polled = |
---|
907 | { |
---|
908 | libchip_serial_default_probe, /* deviceProbe */ |
---|
909 | mg5uart_open, /* deviceFirstOpen */ |
---|
910 | mg5uart_close, /* deviceLastClose */ |
---|
911 | mg5uart_inbyte_nonblocking_polled, /* deviceRead */ |
---|
912 | mg5uart_write_support_polled, /* deviceWrite */ |
---|
913 | mg5uart_init, /* deviceInitialize */ |
---|
914 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
915 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
916 | FALSE, /* deviceOutputUsesInterrupts */ |
---|
917 | }; |
---|