[acdb6558] | 1 | /* |
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| 2 | * This file contains the termios TTY driver for the UART found |
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| 3 | * on the Synova Mongoose-V. |
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| 4 | * |
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| 5 | * COPYRIGHT (c) 1989-2001. |
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| 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * |
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| 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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| 10 | * http://www.OARcorp.com/rtems/license.html. |
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| 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | |
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| 15 | #include <rtems.h> |
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| 16 | #include <rtems/libio.h> |
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| 17 | #include <stdlib.h> |
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| 18 | |
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| 19 | #include <libchip/serial.h> |
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| 20 | #include <libchip/mg5uart.h> |
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| 21 | #include <libchip/sersupp.h> |
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| 22 | #include <libcpu/mongoose-v.h> |
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| 23 | |
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| 24 | extern void set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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| 25 | |
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| 26 | /* |
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| 27 | * Indices of registers |
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| 28 | */ |
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| 29 | |
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| 30 | /* |
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| 31 | * Per chip context control |
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| 32 | */ |
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| 33 | |
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| 34 | typedef struct _mg5uart_context |
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| 35 | { |
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| 36 | int mate; |
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| 37 | } mg5uart_context; |
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| 38 | |
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| 39 | /* |
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| 40 | * Define MG5UART_STATIC to nothing while debugging so the entry points |
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| 41 | * will show up in the symbol table. |
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| 42 | */ |
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| 43 | |
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| 44 | #define MG5UART_STATIC |
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| 45 | |
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| 46 | /* #define MG5UART_STATIC static */ |
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| 47 | |
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| 48 | #define MG5UART_SETREG( _base, _register, _value ) \ |
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| 49 | MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) |
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| 50 | |
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| 51 | #define MG5UART_GETREG( _base, _register ) \ |
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| 52 | MONGOOSEV_READ_REGISTER( _base, _register ) |
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| 53 | |
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| 54 | /* |
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| 55 | * Console Device Driver Support Functions |
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| 56 | */ |
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| 57 | |
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| 58 | MG5UART_STATIC int mg5uart_baud_rate( |
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| 59 | int minor, |
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| 60 | int baud, |
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| 61 | unsigned int *code |
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| 62 | ); |
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| 63 | |
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| 64 | MG5UART_STATIC void mg5uart_enable_interrupts( |
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| 65 | int minor, |
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| 66 | int mask |
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| 67 | ); |
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| 68 | |
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| 69 | /* |
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| 70 | * mg5uart_set_attributes |
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| 71 | * |
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| 72 | * This function sets the UART channel to reflect the requested termios |
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| 73 | * port settings. |
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| 74 | */ |
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| 75 | |
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| 76 | MG5UART_STATIC int mg5uart_set_attributes( |
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| 77 | int minor, |
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| 78 | const struct termios *t |
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| 79 | ) |
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| 80 | { |
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| 81 | unsigned32 pMG5UART_port; |
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| 82 | unsigned32 pMG5UART; |
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| 83 | unsigned int cmd; |
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| 84 | unsigned int baudcmd; |
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| 85 | unsigned int portshift; |
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| 86 | rtems_interrupt_level Irql; |
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| 87 | |
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| 88 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 89 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 90 | |
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| 91 | /* |
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| 92 | * Set the baud rate |
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| 93 | */ |
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| 94 | |
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| 95 | if (mg5uart_baud_rate( minor, t->c_cflag, &baudcmd ) == -1) |
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| 96 | return -1; |
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| 97 | |
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| 98 | /* |
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| 99 | * Base settings |
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| 100 | */ |
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| 101 | |
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| 102 | /* |
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| 103 | * Base settings |
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| 104 | */ |
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| 105 | |
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| 106 | cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_TX_ENABLE; |
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| 107 | |
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| 108 | /* |
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| 109 | * Parity |
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| 110 | */ |
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| 111 | |
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| 112 | if (t->c_cflag & PARENB) { |
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| 113 | cmd |= MONGOOSEV_UART_CMD_PARITY_ENABLE; |
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| 114 | if (t->c_cflag & PARODD) |
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| 115 | cmd |= MONGOOSEV_UART_CMD_PARITY_ODD; |
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| 116 | else |
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| 117 | cmd |= MONGOOSEV_UART_CMD_PARITY_EVEN; |
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| 118 | } else { |
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| 119 | cmd |= MONGOOSEV_UART_CMD_PARITY_DISABLE; |
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| 120 | } |
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| 121 | |
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| 122 | /* |
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| 123 | * Character Size |
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| 124 | */ |
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| 125 | |
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| 126 | if (t->c_cflag & CSIZE) { |
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| 127 | switch (t->c_cflag & CSIZE) { |
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| 128 | case CS5: |
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| 129 | case CS6: |
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| 130 | case CS7: |
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| 131 | return -1; |
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| 132 | break; |
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| 133 | case CS8: |
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| 134 | /* Mongoose-V only supports CS8 */ |
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| 135 | break; |
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| 136 | |
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| 137 | } |
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| 138 | } /* else default to CS8 */ |
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| 139 | |
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| 140 | /* |
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| 141 | * Stop Bits |
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| 142 | */ |
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| 143 | |
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| 144 | #if 0 |
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| 145 | if (t->c_cflag & CSTOPB) { |
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| 146 | /* 2 stop bits not supported by Mongoose-V uart */ |
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| 147 | return -1; |
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| 148 | } |
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| 149 | #endif |
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| 150 | |
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| 151 | /* |
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| 152 | * XXX what about CTS/RTS |
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| 153 | */ |
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| 154 | |
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| 155 | /* XXX */ |
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| 156 | |
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| 157 | /* |
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| 158 | * Now write the registers |
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| 159 | */ |
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| 160 | |
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| 161 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 162 | portshift = MONGOOSEV_UART0_CMD_SHIFT; |
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| 163 | else |
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| 164 | portshift = MONGOOSEV_UART1_CMD_SHIFT; |
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| 165 | |
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| 166 | rtems_interrupt_disable(Irql); |
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| 167 | MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmd << portshift ); |
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| 168 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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| 169 | rtems_interrupt_enable(Irql); |
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| 170 | return 0; |
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| 171 | } |
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| 172 | |
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| 173 | /* |
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| 174 | * mg5uart_initialize_context |
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| 175 | * |
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| 176 | * This function sets the default values of the per port context structure. |
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| 177 | */ |
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| 178 | |
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| 179 | MG5UART_STATIC void mg5uart_initialize_context( |
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| 180 | int minor, |
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| 181 | mg5uart_context *pmg5uartContext |
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| 182 | ) |
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| 183 | { |
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| 184 | int port; |
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| 185 | unsigned int pMG5UART; |
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| 186 | unsigned int pMG5UART_port; |
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| 187 | |
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| 188 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 189 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 190 | |
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| 191 | pmg5uartContext->mate = -1; |
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| 192 | |
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| 193 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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| 194 | if ( Console_Port_Tbl[port].ulCtrlPort1 == pMG5UART && |
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| 195 | Console_Port_Tbl[port].ulCtrlPort2 != pMG5UART_port ) { |
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| 196 | pmg5uartContext->mate = port; |
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| 197 | break; |
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| 198 | } |
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| 199 | } |
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| 200 | |
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| 201 | } |
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| 202 | |
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| 203 | /* |
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| 204 | * mg5uart_init |
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| 205 | * |
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| 206 | * This function initializes the DUART to a quiecsent state. |
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| 207 | */ |
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| 208 | |
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| 209 | MG5UART_STATIC void mg5uart_init(int minor) |
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| 210 | { |
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| 211 | unsigned32 pMG5UART_port; |
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| 212 | unsigned32 pMG5UART; |
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| 213 | mg5uart_context *pmg5uartContext; |
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| 214 | |
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| 215 | pmg5uartContext = (mg5uart_context *) malloc(sizeof(mg5uart_context)); |
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| 216 | |
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| 217 | Console_Port_Data[minor].pDeviceContext = (void *)pmg5uartContext; |
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| 218 | |
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| 219 | mg5uart_initialize_context( minor, pmg5uartContext ); |
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| 220 | |
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| 221 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 222 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 223 | |
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| 224 | /* |
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| 225 | * Reset everything and leave this port disabled. |
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| 226 | */ |
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| 227 | |
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| 228 | MG5UART_SETREG( pMG5UART, 0, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS ); |
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| 229 | |
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| 230 | /* |
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| 231 | * Disable interrupts on RX and TX for this port |
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| 232 | */ |
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| 233 | |
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| 234 | mg5uart_enable_interrupts( minor, MG5UART_DISABLE_ALL ); |
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| 235 | } |
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| 236 | |
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| 237 | /* |
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| 238 | * mg5uart_open |
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| 239 | * |
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| 240 | * This function opens a port for communication. |
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| 241 | * |
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| 242 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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| 243 | */ |
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| 244 | |
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| 245 | MG5UART_STATIC int mg5uart_open( |
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| 246 | int major, |
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| 247 | int minor, |
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| 248 | void *arg |
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| 249 | ) |
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| 250 | { |
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| 251 | unsigned32 pMG5UART; |
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| 252 | unsigned32 pMG5UART_port; |
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| 253 | unsigned int vector; |
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| 254 | unsigned int cmd; |
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| 255 | unsigned int baudcmd; |
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| 256 | unsigned int portshift; |
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| 257 | rtems_interrupt_level Irql; |
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| 258 | |
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| 259 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 260 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 261 | vector = Console_Port_Tbl[minor].ulIntVector; |
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| 262 | |
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| 263 | /* XXX default baud rate could be from configuration table */ |
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| 264 | |
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| 265 | (void) mg5uart_baud_rate( minor, B9600, &baudcmd ); |
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| 266 | |
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| 267 | /* |
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| 268 | * Set the DUART channel to a default useable state |
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| 269 | * B9600, 8Nx since there is no stop bit control. |
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| 270 | */ |
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| 271 | |
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| 272 | cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_RX_ENABLE; |
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| 273 | |
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| 274 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 275 | portshift = MONGOOSEV_UART0_CMD_SHIFT; |
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| 276 | else |
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| 277 | portshift = MONGOOSEV_UART1_CMD_SHIFT; |
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| 278 | |
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| 279 | rtems_interrupt_disable(Irql); |
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| 280 | MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmd << portshift ); |
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| 281 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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| 282 | rtems_interrupt_enable(Irql); |
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| 283 | |
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| 284 | return RTEMS_SUCCESSFUL; |
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| 285 | } |
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| 286 | |
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| 287 | /* |
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| 288 | * mg5uart_close |
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| 289 | * |
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| 290 | * This function shuts down the requested port. |
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| 291 | */ |
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| 292 | |
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| 293 | MG5UART_STATIC int mg5uart_close( |
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| 294 | int major, |
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| 295 | int minor, |
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| 296 | void *arg |
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| 297 | ) |
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| 298 | { |
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| 299 | unsigned32 pMG5UART; |
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| 300 | unsigned32 pMG5UART_port; |
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| 301 | unsigned int cmd; |
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| 302 | unsigned int portshift; |
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| 303 | |
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| 304 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 305 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 306 | |
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| 307 | /* |
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| 308 | * Disable interrupts from this channel and then disable it totally. |
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| 309 | */ |
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| 310 | |
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| 311 | /* XXX interrupts */ |
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| 312 | |
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| 313 | cmd = MONGOOSEV_UART_CMD_TX_DISABLE | MONGOOSEV_UART_CMD_RX_DISABLE; |
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| 314 | |
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| 315 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 316 | portshift = MONGOOSEV_UART0_CMD_SHIFT; |
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| 317 | else |
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| 318 | portshift = MONGOOSEV_UART1_CMD_SHIFT; |
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| 319 | |
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| 320 | MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmd << portshift ); |
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| 321 | |
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| 322 | return(RTEMS_SUCCESSFUL); |
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| 323 | } |
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| 324 | |
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| 325 | /* |
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| 326 | * mg5uart_write_polled |
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| 327 | * |
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| 328 | * This routine polls out the requested character. |
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| 329 | */ |
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| 330 | |
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| 331 | MG5UART_STATIC void mg5uart_write_polled( |
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| 332 | int minor, |
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| 333 | char c |
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| 334 | ) |
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| 335 | { |
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| 336 | unsigned32 pMG5UART; |
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| 337 | unsigned32 pMG5UART_port; |
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| 338 | unsigned32 status; |
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| 339 | int shift; |
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| 340 | int timeout; |
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| 341 | |
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| 342 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 343 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 344 | |
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| 345 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 346 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 347 | else |
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| 348 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 349 | |
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| 350 | /* |
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| 351 | * wait for transmitter holding register to be empty |
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| 352 | */ |
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| 353 | timeout = 1000; |
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| 354 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER); |
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| 355 | while ( 1 ) { |
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| 356 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
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| 357 | |
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| 358 | if ( (status & (MONGOOSEV_UART_TX_READY|MONGOOSEV_UART_TX_EMPTY_0)) == |
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| 359 | (MONGOOSEV_UART_TX_READY|MONGOOSEV_UART_TX_EMPTY_0) ) |
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| 360 | break; |
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| 361 | |
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| 362 | /* |
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| 363 | * Yield while we wait |
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| 364 | */ |
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| 365 | |
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| 366 | #if 0 |
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| 367 | if(_System_state_Is_up(_System_state_Get())) { |
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| 368 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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| 369 | } |
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| 370 | #endif |
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| 371 | if(!--timeout) { |
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| 372 | break; |
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| 373 | } |
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| 374 | } |
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| 375 | |
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| 376 | /* |
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| 377 | * transmit character |
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| 378 | */ |
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| 379 | |
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| 380 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, c); |
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| 381 | } |
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| 382 | |
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| 383 | /* |
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| 384 | * mg5uart_isr_XXX |
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| 385 | * |
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| 386 | * This is the single interrupt entry point which parcels interrupts |
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| 387 | * out to the handlers for specific sources and makes sure that the |
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| 388 | * shared handler gets the right arguments. |
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| 389 | * |
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| 390 | * NOTE: Yes .. this is ugly but it provides 5 interrupt source |
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| 391 | * wrappers which are nearly functionally identical. |
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| 392 | */ |
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| 393 | |
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| 394 | |
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| 395 | #define __ISR(_TYPE, _OFFSET) \ |
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| 396 | MG5UART_STATIC void mg5uart_process_isr_ ## _TYPE ( \ |
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| 397 | int minor \ |
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| 398 | ); \ |
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| 399 | \ |
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| 400 | MG5UART_STATIC rtems_isr mg5uart_isr_ ## _TYPE ( \ |
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| 401 | rtems_vector_number vector \ |
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| 402 | ) \ |
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| 403 | { \ |
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| 404 | int minor; \ |
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| 405 | \ |
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| 406 | for(minor=0 ; minor<Console_Port_Count ; minor++) { \ |
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| 407 | if( Console_Port_Tbl[minor].deviceType == SERIAL_MG5UART && \ |
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| 408 | vector == Console_Port_Tbl[minor].ulIntVector + _OFFSET ) { \ |
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| 409 | mg5uart_process_isr_ ## _TYPE (minor); \ |
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| 410 | } \ |
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| 411 | } \ |
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| 412 | } |
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| 413 | |
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| 414 | __ISR(rx_frame_error, MG5UART_IRQ_RX_FRAME_ERROR) |
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| 415 | __ISR(rx_overrun_error, MG5UART_IRQ_RX_OVERRUN_ERROR) |
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| 416 | __ISR(tx_empty, MG5UART_IRQ_TX_EMPTY) |
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| 417 | __ISR(tx_ready, MG5UART_IRQ_TX_READY) |
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| 418 | __ISR(rx_ready, MG5UART_IRQ_RX_READY) |
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| 419 | |
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| 420 | |
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| 421 | MG5UART_STATIC void mg5uart_process_isr_rx_frame_error( |
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| 422 | int minor |
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| 423 | ) |
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| 424 | { |
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| 425 | unsigned32 pMG5UART; |
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| 426 | int shift; |
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| 427 | |
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| 428 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 429 | |
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| 430 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 431 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 432 | else |
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| 433 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 434 | |
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| 435 | /* now clear the error */ |
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| 436 | |
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| 437 | MG5UART_SETREG( |
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| 438 | pMG5UART, |
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| 439 | MG5UART_STATUS_REGISTER, |
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| 440 | MONGOOSEV_UART_RX_FRAME_ERROR << shift |
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| 441 | ); |
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| 442 | } |
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| 443 | |
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| 444 | MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error( |
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| 445 | int minor |
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| 446 | ) |
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| 447 | { |
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| 448 | unsigned32 pMG5UART; |
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| 449 | int shift; |
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| 450 | |
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| 451 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 452 | |
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| 453 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 454 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 455 | else |
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| 456 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 457 | |
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| 458 | /* now clear the error */ |
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| 459 | |
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| 460 | MG5UART_SETREG( |
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| 461 | pMG5UART, |
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| 462 | MG5UART_STATUS_REGISTER, |
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| 463 | MONGOOSEV_UART_RX_OVERRUN_ERROR << shift |
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| 464 | ); |
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| 465 | } |
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| 466 | |
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| 467 | MG5UART_STATIC void mg5uart_process_tx_isr( |
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| 468 | int minor, |
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| 469 | unsigned32 source_mask |
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| 470 | ); |
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| 471 | |
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| 472 | MG5UART_STATIC void mg5uart_process_isr_tx_empty( |
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| 473 | int minor |
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| 474 | ) |
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| 475 | { |
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| 476 | mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_EMPTY ); |
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| 477 | } |
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| 478 | |
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| 479 | MG5UART_STATIC void mg5uart_process_isr_tx_ready( |
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| 480 | int minor |
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| 481 | ) |
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| 482 | { |
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| 483 | mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_READY ); |
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| 484 | } |
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| 485 | |
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| 486 | MG5UART_STATIC void mg5uart_process_tx_isr( |
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| 487 | int minor, |
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| 488 | unsigned32 source_mask |
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| 489 | ) |
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| 490 | { |
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| 491 | unsigned32 pMG5UART; |
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| 492 | int shift; |
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| 493 | |
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| 494 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 495 | |
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| 496 | if (!rtems_termios_dequeue_characters( |
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| 497 | Console_Port_Data[minor].termios_data, 1)) |
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| 498 | return; |
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| 499 | |
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| 500 | |
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| 501 | /* |
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| 502 | * There are no more characters to transmit so clear the interrupt |
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| 503 | * source and disable TX interrupts. |
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| 504 | */ |
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| 505 | |
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| 506 | Console_Port_Data[minor].bActive = FALSE; |
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| 507 | |
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| 508 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 509 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 510 | else |
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| 511 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 512 | |
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| 513 | /* now clear the interrupt source */ |
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| 514 | |
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| 515 | MG5UART_SETREG( |
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| 516 | pMG5UART, |
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| 517 | MG5UART_STATUS_REGISTER, |
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| 518 | source_mask << shift |
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| 519 | ); |
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| 520 | |
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| 521 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
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| 522 | |
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| 523 | } |
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| 524 | |
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| 525 | MG5UART_STATIC void mg5uart_process_isr_rx_ready( |
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| 526 | int minor |
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| 527 | ) |
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| 528 | { |
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| 529 | unsigned32 pMG5UART_port; |
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| 530 | unsigned char c; |
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| 531 | |
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| 532 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 533 | |
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| 534 | c = (unsigned char) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
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| 535 | rtems_termios_enqueue_raw_characters( |
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| 536 | Console_Port_Data[minor].termios_data, |
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| 537 | &c, |
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| 538 | 1 |
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| 539 | ); |
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| 540 | |
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| 541 | /* reading the RX buffer automatically resets the error */ |
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| 542 | } |
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| 543 | |
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| 544 | /* |
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| 545 | * mg5uart_initialize_interrupts |
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| 546 | * |
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| 547 | * This routine initializes the console's receive and transmit |
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| 548 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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| 549 | */ |
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| 550 | |
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| 551 | MG5UART_STATIC void mg5uart_initialize_interrupts(int minor) |
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| 552 | { |
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| 553 | unsigned long v; |
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| 554 | mg5uart_init(minor); |
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| 555 | |
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| 556 | Console_Port_Data[minor].bActive = FALSE; |
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| 557 | v = Console_Port_Tbl[minor].ulIntVector; |
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| 558 | |
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| 559 | set_vector(mg5uart_isr_rx_frame_error, v + MG5UART_IRQ_RX_FRAME_ERROR, 1); |
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| 560 | set_vector(mg5uart_isr_rx_overrun_error, v + MG5UART_IRQ_RX_OVERRUN_ERROR, 1); |
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| 561 | set_vector(mg5uart_isr_tx_empty, v + MG5UART_IRQ_TX_EMPTY, 1); |
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| 562 | set_vector(mg5uart_isr_tx_ready, v + MG5UART_IRQ_TX_READY, 1); |
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| 563 | set_vector(mg5uart_isr_rx_ready, v + MG5UART_IRQ_RX_READY, 1); |
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| 564 | |
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| 565 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
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| 566 | } |
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| 567 | |
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| 568 | /* |
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| 569 | * mg5uart_write_support_int |
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| 570 | * |
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| 571 | * Console Termios output entry point when using interrupt driven output. |
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| 572 | */ |
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| 573 | |
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| 574 | MG5UART_STATIC int mg5uart_write_support_int( |
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| 575 | int minor, |
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| 576 | const char *buf, |
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| 577 | int len |
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| 578 | ) |
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| 579 | { |
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| 580 | unsigned32 Irql; |
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| 581 | unsigned32 pMG5UART_port; |
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| 582 | |
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| 583 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 584 | |
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| 585 | /* |
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| 586 | * We are using interrupt driven output and termios only sends us |
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| 587 | * one character at a time. |
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| 588 | */ |
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| 589 | |
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| 590 | if ( !len ) |
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| 591 | return 0; |
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| 592 | |
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| 593 | /* |
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| 594 | * Put the character out and enable interrupts if necessary. |
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| 595 | */ |
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| 596 | |
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| 597 | rtems_interrupt_disable(Irql); |
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| 598 | if ( Console_Port_Data[minor].bActive == FALSE ) { |
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| 599 | Console_Port_Data[minor].bActive = TRUE; |
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| 600 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); |
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| 601 | } |
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| 602 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf); |
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| 603 | rtems_interrupt_enable(Irql); |
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| 604 | |
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| 605 | return 1; |
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| 606 | } |
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| 607 | |
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| 608 | /* |
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| 609 | * mg5uart_write_support_polled |
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| 610 | * |
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| 611 | * Console Termios output entry point when using polled output. |
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| 612 | * |
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| 613 | */ |
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| 614 | |
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| 615 | MG5UART_STATIC int mg5uart_write_support_polled( |
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| 616 | int minor, |
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| 617 | const char *buf, |
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| 618 | int len |
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| 619 | ) |
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| 620 | { |
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| 621 | int nwrite = 0; |
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| 622 | |
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| 623 | /* |
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| 624 | * poll each byte in the string out of the port. |
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| 625 | */ |
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| 626 | while (nwrite < len) { |
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| 627 | /* |
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| 628 | * transmit character |
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| 629 | */ |
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| 630 | mg5uart_write_polled(minor, *buf++); |
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| 631 | nwrite++; |
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| 632 | } |
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| 633 | |
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| 634 | /* |
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| 635 | * return the number of bytes written. |
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| 636 | */ |
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| 637 | return nwrite; |
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| 638 | } |
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| 639 | |
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| 640 | /* |
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| 641 | * mg5uart_inbyte_nonblocking_polled |
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| 642 | * |
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| 643 | * Console Termios polling input entry point. |
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| 644 | */ |
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| 645 | |
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| 646 | MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled( |
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| 647 | int minor |
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| 648 | ) |
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| 649 | { |
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| 650 | unsigned32 pMG5UART; |
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| 651 | unsigned32 pMG5UART_port; |
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| 652 | unsigned32 status; |
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| 653 | int shift; |
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| 654 | |
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| 655 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 656 | pMG5UART_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 657 | |
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| 658 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 659 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 660 | else |
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| 661 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 662 | |
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| 663 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
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| 664 | if ( status & MONGOOSEV_UART_RX_READY ) { |
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| 665 | return (int) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
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| 666 | } else { |
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| 667 | return -1; |
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| 668 | } |
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| 669 | } |
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| 670 | |
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| 671 | /* |
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| 672 | * mg5uart_baud_rate |
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| 673 | */ |
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| 674 | |
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| 675 | MG5UART_STATIC int mg5uart_baud_rate( |
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| 676 | int minor, |
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| 677 | int baud, |
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| 678 | unsigned int *code |
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| 679 | ) |
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| 680 | { |
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| 681 | rtems_unsigned32 clock; |
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| 682 | rtems_unsigned32 tmp_code; |
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| 683 | rtems_unsigned32 baud_requested; |
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| 684 | |
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| 685 | baud_requested = baud & CBAUD; |
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| 686 | if (!baud_requested) |
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| 687 | baud_requested = B9600; /* default to 9600 baud */ |
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| 688 | |
---|
| 689 | baud_requested = termios_baud_to_number( B9600 ); |
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| 690 | |
---|
| 691 | clock = (rtems_unsigned32) Console_Port_Tbl[minor].ulClock; |
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| 692 | if (!clock) |
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| 693 | rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER); |
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| 694 | |
---|
| 695 | /* |
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| 696 | * Formula is Code = round(ClockFrequency / Baud - 1). |
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| 697 | * |
---|
| 698 | * Since this is integer math, we will divide by twice the baud and |
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| 699 | * check the remaining odd bit. |
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| 700 | */ |
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| 701 | |
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| 702 | tmp_code = (clock / (baud_requested * 2)); |
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| 703 | if ( tmp_code & 0x01 ) |
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| 704 | tmp_code = (tmp_code >> 1) + 1; |
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| 705 | else |
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| 706 | tmp_code = (tmp_code >> 1); |
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| 707 | |
---|
| 708 | /* |
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| 709 | * From section 12.7, "Keep C>100 for best receiver operation." |
---|
| 710 | * That is 100 cycles which is not a lot of instructions. It is |
---|
| 711 | * reasonable to think that the Mongoose-V could not keep |
---|
| 712 | * up with C < 200. |
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| 713 | */ |
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| 714 | |
---|
| 715 | if ( tmp_code < 100 ) |
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| 716 | return RTEMS_INVALID_NUMBER; |
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| 717 | |
---|
| 718 | /* |
---|
| 719 | * upper word is receiver baud and lower word is transmitter baud |
---|
| 720 | */ |
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| 721 | |
---|
| 722 | *code = (tmp_code << 16) | tmp_code; |
---|
| 723 | return 0; |
---|
| 724 | } |
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| 725 | |
---|
| 726 | /* |
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| 727 | * mg5uart_enable_interrupts |
---|
| 728 | * |
---|
| 729 | * This function enables specific interrupt sources on the DUART. |
---|
| 730 | */ |
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| 731 | |
---|
| 732 | MG5UART_STATIC void mg5uart_enable_interrupts( |
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| 733 | int minor, |
---|
| 734 | int mask |
---|
| 735 | ) |
---|
| 736 | { |
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| 737 | unsigned32 pMG5UART; |
---|
| 738 | unsigned int shift; |
---|
| 739 | |
---|
| 740 | pMG5UART = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 741 | |
---|
| 742 | /* |
---|
| 743 | * Enable interrupts on RX and TX -- not break |
---|
| 744 | */ |
---|
| 745 | |
---|
| 746 | if ( Console_Port_Tbl[minor].ulDataPort == MG5UART_UART0 ) |
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| 747 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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| 748 | else |
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| 749 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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| 750 | |
---|
| 751 | MG5UART_SETREG( |
---|
| 752 | pMG5UART, |
---|
| 753 | MG5UART_INTERRUPT_MASK_REGISTER, |
---|
| 754 | mask << shift |
---|
| 755 | ); |
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| 756 | } |
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| 757 | |
---|
| 758 | /* |
---|
| 759 | * Flow control is only supported when using interrupts |
---|
| 760 | */ |
---|
| 761 | |
---|
| 762 | console_fns mg5uart_fns = |
---|
| 763 | { |
---|
| 764 | libchip_serial_default_probe, /* deviceProbe */ |
---|
| 765 | mg5uart_open, /* deviceFirstOpen */ |
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| 766 | NULL, /* deviceLastClose */ |
---|
| 767 | NULL, /* deviceRead */ |
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| 768 | mg5uart_write_support_int, /* deviceWrite */ |
---|
| 769 | mg5uart_initialize_interrupts, /* deviceInitialize */ |
---|
| 770 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
| 771 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
| 772 | TRUE /* deviceOutputUsesInterrupts */ |
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| 773 | }; |
---|
| 774 | |
---|
| 775 | console_fns mg5uart_fns_polled = |
---|
| 776 | { |
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| 777 | libchip_serial_default_probe, /* deviceProbe */ |
---|
| 778 | mg5uart_open, /* deviceFirstOpen */ |
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| 779 | mg5uart_close, /* deviceLastClose */ |
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| 780 | mg5uart_inbyte_nonblocking_polled, /* deviceRead */ |
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| 781 | mg5uart_write_support_polled, /* deviceWrite */ |
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| 782 | mg5uart_init, /* deviceInitialize */ |
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| 783 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
| 784 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
| 785 | FALSE, /* deviceOutputUsesInterrupts */ |
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| 786 | }; |
---|
| 787 | |
---|