source: rtems/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S @ d3d9ef37

4.104.114.84.95
Last change on this file since d3d9ef37 was 64bb079, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 26, 2004 at 1:59:35 AM

2004-11-25 Joel Sherrill <joel@…>

  • timer/timerisr.S: Include rtems/asm.h not asm.h
  • Property mode set to 100644
File size: 1.3 KB
Line 
1/*
2 *  Handle MCF5272 TIMER2 interrupts.
3 *
4 * All code in this routine is pure overhead which can perturb the
5 * accuracy of RTEMS' timing test suite.
6 *
7 * See also:    Read_timer()
8 *
9 * To reduce overhead this is best to be the "rawest" hardware interupt
10 * handler you can write.  This should be the only interrupt which can
11 * occur during the measured time period.
12 *
13 * An external counter, Timer_interrupts, is incremented.
14 *
15 *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
16 *  Author: Victor V. Vengerov <vvv@oktet.ru>
17 *
18 *  This file based on work:
19 *  Author:
20 *    David Fiddes, D.J@fiddes.surfaid.org
21 *    http://www.calm.hw.ac.uk/davidf/coldfire/
22 *
23 *  COPYRIGHT (c) 1989-1998.
24 *  On-Line Applications Research Corporation (OAR).
25 *  Copyright assigned to U.S. Government, 1994.
26 *
27 *  The license and distribution terms for this file may be
28 *  found in the file LICENSE in this distribution or at
29 *
30 *  http://www.OARcorp.com/rtems/license.html.
31 *
32 *  timerisr.S,v 1.1 2001/10/26 19:32:40 joel Exp
33 */
34
35#include <rtems/asm.h>
36#include <bsp.h>
37/*
38#include "mcf5272/mcf5272.h"
39*/
40
41BEGIN_CODE
42        PUBLIC(timerisr)
43SYM(timerisr):
44        move.l   a0, a7@-
45        move.b   # (MCF5272_TER_REF + MCF5272_TER_CAP), (a0)
46        addq.l   #1,SYM(Timer_interrupts) | increment timer value
47        move.l   a7@+, a0
48        rte
49END_CODE
50END
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