source: rtems/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S @ 8fbe2e6

4.115
Last change on this file since 8fbe2e6 was 8fbe2e6, checked in by Joel Sherrill <joel.sherrill@…>, on 09/04/14 at 13:59:49

Use correct prototype of benchmark_timer_read()

This change starts with removing the effectively empty file
timerdrv.h. The prototypes for benchmark_timer_XXX() were in
btimer.h which was not universally used. Thus every use of
timerdrv.h had to be changed to btimer.h. Then the prototypes
for benchmark_timer_read() had to be adjusted to return
benchmark_timer_t rather than int or uint32_t.

I took this opportunity to also correct the file headers to
separate the copyright from the file description comments which
is needed to ensure the copyright isn't propagated into Doxygen
output.

  • Property mode set to 100644
File size: 1.2 KB
RevLine 
[8fbe2e6]1/**
2 * @file
3 * @brief Handle MCF5272 TIMER2 interrupts.
[3cfd520]4 *
5 * All code in this routine is pure overhead which can perturb the
6 * accuracy of RTEMS' timing test suite.
7 *
[a5cd2271]8 * See also:    benchmark_timer_read()
[3cfd520]9 *
10 * To reduce overhead this is best to be the "rawest" hardware interupt
11 * handler you can write.  This should be the only interrupt which can
12 * occur during the measured time period.
13 *
14 * An external counter, Timer_interrupts, is incremented.
[8fbe2e6]15 */
16
17/*
[3cfd520]18 *  Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
19 *  Author: Victor V. Vengerov <vvv@oktet.ru>
20 *
21 *  This file based on work:
22 *  Author:
23 *    David Fiddes, D.J@fiddes.surfaid.org
24 *    http://www.calm.hw.ac.uk/davidf/coldfire/
25 *
26 *  COPYRIGHT (c) 1989-1998.
27 *  On-Line Applications Research Corporation (OAR).
28 *
29 *  The license and distribution terms for this file may be
30 *  found in the file LICENSE in this distribution or at
[c499856]31 *  http://www.rtems.org/license/LICENSE.
[3cfd520]32 */
33
[64bb079]34#include <rtems/asm.h>
35#include <bsp.h>
[3cfd520]36
37BEGIN_CODE
38        PUBLIC(timerisr)
39SYM(timerisr):
40        move.l   a0, a7@-
41        move.b   # (MCF5272_TER_REF + MCF5272_TER_CAP), (a0)
42        addq.l   #1,SYM(Timer_interrupts) | increment timer value
43        move.l   a7@+, a0
44        rte
45END_CODE
46END
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