[3cfd520] | 1 | /* |
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| 2 | * Clock Driver for MCF5272 CPU |
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| 3 | * |
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[023f1dd9] | 4 | * This driver initailizes timer1 on the MCF5272 as the |
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| 5 | * main system clock |
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[5105833c] | 6 | */ |
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| 7 | |
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| 8 | /* |
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[3cfd520] | 9 | * Copyright 2004 Cogent Computer Systems |
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| 10 | * Author: Jay Monkman <jtm@lopingdog.com> |
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| 11 | * |
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| 12 | * Based on MCF5206 clock driver by |
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| 13 | * Victor V. Vengerov <vvv@oktet.ru> |
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| 14 | * |
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| 15 | * Based on work: |
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| 16 | * David Fiddes, D.J@fiddes.surfaid.org |
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| 17 | * http://www.calm.hw.ac.uk/davidf/coldfire/ |
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| 18 | * |
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| 19 | * COPYRIGHT (c) 1989-1998. |
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| 20 | * On-Line Applications Research Corporation (OAR). |
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| 21 | * |
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| 22 | * The license and distribution terms for this file may be |
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| 23 | * found in the file LICENSE in this distribution or at |
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[c499856] | 24 | * http://www.rtems.org/license/LICENSE. |
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[3cfd520] | 25 | */ |
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| 26 | |
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| 27 | #include <stdlib.h> |
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| 28 | #include <bsp.h> |
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| 29 | #include <rtems/libio.h> |
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| 30 | #include <mcf5272/mcf5272.h> |
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| 31 | |
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| 32 | /* |
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| 33 | * Clock_driver_ticks is a monotonically increasing counter of the |
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| 34 | * number of clock ticks since the driver was initialized. |
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| 35 | */ |
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[ee5769ad] | 36 | volatile uint32_t Clock_driver_ticks; |
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[3cfd520] | 37 | |
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| 38 | rtems_isr (*rtems_clock_hook)(rtems_vector_number) = NULL; |
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| 39 | |
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[5105833c] | 40 | static rtems_isr |
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[3cfd520] | 41 | Clock_isr (rtems_vector_number vector) |
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| 42 | { |
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[5105833c] | 43 | /* Clear pending interrupt... */ |
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| 44 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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| 45 | |
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| 46 | /* Announce the clock tick */ |
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| 47 | Clock_driver_ticks++; |
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| 48 | rtems_clock_tick(); |
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| 49 | if (rtems_clock_hook != NULL) { |
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| 50 | rtems_clock_hook(vector); |
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| 51 | } |
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[3cfd520] | 52 | } |
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| 53 | |
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| 54 | void |
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| 55 | Clock_exit(void) |
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| 56 | { |
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[5105833c] | 57 | uint32_t icr; |
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[3cfd520] | 58 | |
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[5105833c] | 59 | /* disable all timer1 interrupts */ |
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| 60 | icr = g_intctrl_regs->icr1; |
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| 61 | icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); |
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| 62 | icr |= (MCF5272_ICR1_TMR1_IPL(0) | MCF5272_ICR1_TMR1_PI); |
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| 63 | g_intctrl_regs->icr1 = icr; |
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| 64 | |
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| 65 | /* reset timer1 */ |
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| 66 | g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; |
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| 67 | |
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| 68 | /* clear pending */ |
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| 69 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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| 70 | } |
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[3cfd520] | 71 | |
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| 72 | static void |
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| 73 | Install_clock(rtems_isr_entry clock_isr) |
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| 74 | { |
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[0f9ecc4e] | 75 | uint32_t icr; |
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[5105833c] | 76 | |
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[0f9ecc4e] | 77 | Clock_driver_ticks = 0; |
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[3cfd520] | 78 | |
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[5105833c] | 79 | /* Register the interrupt handler */ |
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| 80 | set_vector(clock_isr, BSP_INTVEC_TMR1, 1); |
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| 81 | |
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| 82 | /* Reset timer 1 */ |
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| 83 | g_timer_regs->tmr1 = MCF5272_TMR_RST; |
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| 84 | g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; |
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| 85 | g_timer_regs->tmr1 = MCF5272_TMR_RST; |
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| 86 | g_timer_regs->tcn1 = 0; /* reset counter */ |
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| 87 | g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; |
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| 88 | |
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| 89 | /* Set Timer 1 prescaler so that it counts in microseconds */ |
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| 90 | g_timer_regs->tmr1 = ( |
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| 91 | ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | |
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| 92 | MCF5272_TMR_CE_DISABLE | |
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| 93 | MCF5272_TMR_ORI | |
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| 94 | MCF5272_TMR_FRR | |
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| 95 | MCF5272_TMR_CLK_MSTR | |
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| 96 | MCF5272_TMR_RST)); |
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| 97 | |
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| 98 | /* Set the timer timeout value from the BSP config */ |
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| 99 | g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1; |
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| 100 | |
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| 101 | /* Feed system frequency to the timer */ |
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| 102 | g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR; |
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| 103 | |
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| 104 | /* Configure timer1 interrupts */ |
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| 105 | icr = g_intctrl_regs->icr1; |
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| 106 | icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); |
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| 107 | icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI); |
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| 108 | g_intctrl_regs->icr1 = icr; |
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| 109 | |
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| 110 | /* Register the driver exit procedure so we can shutdown */ |
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| 111 | atexit(Clock_exit); |
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| 112 | } |
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[3cfd520] | 113 | |
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| 114 | rtems_device_driver |
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[5105833c] | 115 | Clock_initialize( |
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| 116 | rtems_device_major_number major, |
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| 117 | rtems_device_minor_number minor, |
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| 118 | void *pargp |
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| 119 | ) |
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[3cfd520] | 120 | { |
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[5105833c] | 121 | Install_clock (Clock_isr); |
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[023f1dd9] | 122 | |
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[5105833c] | 123 | return RTEMS_SUCCESSFUL; |
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[3cfd520] | 124 | } |
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