[00717a3] | 1 | /* |
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| 2 | * Handle MCF5206 TIMER2 interrupts. |
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| 3 | * |
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| 4 | * All code in this routine is pure overhead which can perturb the |
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| 5 | * accuracy of RTEMS' timing test suite. |
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| 6 | * |
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[a5cd2271] | 7 | * See also: benchmark_timer_read() |
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[00717a3] | 8 | * |
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| 9 | * To reduce overhead this is best to be the "rawest" hardware interupt |
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| 10 | * handler you can write. This should be the only interrupt which can |
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| 11 | * occur during the measured time period. |
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| 12 | * |
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| 13 | * An external counter, Timer_interrupts, is incremented. |
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| 14 | * |
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| 15 | * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia |
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| 16 | * Author: Victor V. Vengerov <vvv@oktet.ru> |
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| 17 | * |
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| 18 | * This file based on work: |
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| 19 | * Author: |
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| 20 | * David Fiddes, D.J@fiddes.surfaid.org |
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| 21 | * http://www.calm.hw.ac.uk/davidf/coldfire/ |
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| 22 | * |
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| 23 | * COPYRIGHT (c) 1989-1998. |
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| 24 | * On-Line Applications Research Corporation (OAR). |
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| 25 | * |
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| 26 | * The license and distribution terms for this file may be |
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| 27 | * found in the file LICENSE in this distribution or at |
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[c499856] | 28 | * http://www.rtems.org/license/LICENSE. |
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[00717a3] | 29 | */ |
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| 30 | |
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[fbb8e6a] | 31 | #include <rtems/asm.h> |
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[5567097] | 32 | #include "bsp.h" |
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[00717a3] | 33 | #include "mcf5206/mcf5206e.h" |
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| 34 | |
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| 35 | BEGIN_CODE |
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| 36 | PUBLIC(timerisr) |
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| 37 | SYM(timerisr): |
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| 38 | move.l a0, a7@- |
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| 39 | move.l #MCF5206E_TER(BSP_MEM_ADDR_IMM, 2), a0 |
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| 40 | move.b # (MCF5206E_TER_REF + MCF5206E_TER_CAP), (a0) |
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| 41 | addq.l #1,SYM(Timer_interrupts) | increment timer value |
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| 42 | move.l a7@+, a0 |
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| 43 | rte |
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| 44 | END_CODE |
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| 45 | END |
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