[00717a3] | 1 | /* |
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| 2 | * Generic UART Serial driver for Motorola Coldfire processors |
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| 3 | * |
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| 4 | * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed. |
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| 5 | * Author: Victor V. Vengerov <vvv@oktet.ru> |
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| 6 | * |
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| 7 | * COPYRIGHT (c) 1989-2000. |
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| 8 | * On-Line Applications Research Corporation (OAR). |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * |
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[57e9580f] | 13 | * http://www.rtems.com/license/LICENSE. |
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[00717a3] | 14 | * |
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| 15 | * $Id$ |
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| 16 | * |
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| 17 | */ |
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| 18 | |
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| 19 | #include <rtems.h> |
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| 20 | #include <termios.h> |
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| 21 | #include <rtems/libio.h> |
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| 22 | #include "mcf5206/mcfuart.h" |
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| 23 | |
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| 24 | /* |
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| 25 | * int_driven_uart -- mapping between interrupt vector number and |
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| 26 | * UART descriptor structures |
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| 27 | */ |
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| 28 | static struct { |
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| 29 | mcfuart *uart; |
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| 30 | int vec; |
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| 31 | } int_driven_uart[2]; |
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| 32 | |
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| 33 | /* Forward function declarations */ |
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| 34 | static rtems_isr |
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| 35 | mcfuart_interrupt_handler(rtems_vector_number vec); |
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| 36 | |
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| 37 | /* |
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| 38 | * mcfuart_init -- |
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| 39 | * This function verifies the input parameters and perform initialization |
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| 40 | * of the Motorola Coldfire on-chip UART descriptor structure. |
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| 41 | * |
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| 42 | * PARAMETERS: |
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| 43 | * uart - pointer to the UART channel descriptor structure |
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| 44 | * tty - pointer to termios structure |
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| 45 | * int_driven - interrupt-driven (1) or polled (0) I/O mode |
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| 46 | * chn - channel number (0/1) |
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| 47 | * rx_buf - pointer to receive buffer |
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| 48 | * rx_buf_len - receive buffer length |
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| 49 | * |
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| 50 | * RETURNS: |
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| 51 | * RTEMS_SUCCESSFUL if all parameters are valid, or error code |
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| 52 | */ |
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| 53 | rtems_status_code |
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[8bc4430b] | 54 | mcfuart_init(mcfuart *uart, void *tty, uint8_t intvec, |
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| 55 | uint32_t chn) |
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[00717a3] | 56 | { |
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| 57 | if (uart == NULL) |
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| 58 | return RTEMS_INVALID_ADDRESS; |
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| 59 | |
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| 60 | if ((chn <= 0) || (chn > MCF5206E_UART_CHANNELS)) |
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| 61 | return RTEMS_INVALID_NUMBER; |
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| 62 | |
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| 63 | uart->chn = chn; |
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| 64 | uart->intvec = intvec; |
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| 65 | uart->tty = tty; |
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| 66 | |
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| 67 | return RTEMS_SUCCESSFUL; |
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| 68 | } |
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| 69 | |
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| 70 | /* mcfuart_set_baudrate -- |
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| 71 | * Program the UART timer to specified baudrate |
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| 72 | * |
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| 73 | * PARAMETERS: |
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| 74 | * uart - pointer to UART descriptor structure |
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| 75 | * baud - termios baud rate (B50, B9600, etc...) |
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| 76 | * |
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| 77 | * RETURNS: |
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| 78 | * none |
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| 79 | */ |
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| 80 | static void |
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| 81 | mcfuart_set_baudrate(mcfuart *uart, speed_t baud) |
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| 82 | { |
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[8bc4430b] | 83 | uint32_t div; |
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| 84 | uint32_t rate; |
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[00717a3] | 85 | switch (baud) |
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| 86 | { |
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| 87 | case B50: rate = 50; break; |
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| 88 | case B75: rate = 75; break; |
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| 89 | case B110: rate = 110; break; |
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| 90 | case B134: rate = 134; break; |
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| 91 | case B150: rate = 150; break; |
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| 92 | case B200: rate = 200; break; |
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| 93 | case B300: rate = 300; break; |
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| 94 | case B600: rate = 600; break; |
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| 95 | case B1200: rate = 1200; break; |
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| 96 | case B2400: rate = 2400; break; |
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| 97 | case B4800: rate = 4800; break; |
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| 98 | case B9600: rate = 9600; break; |
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| 99 | case B19200: rate = 19200; break; |
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| 100 | case B38400: rate = 38400; break; |
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| 101 | case B57600: rate = 57600; break; |
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| 102 | #ifdef B115200 |
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| 103 | case B115200: rate = 115200; break; |
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| 104 | #endif |
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| 105 | #ifdef B230400 |
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| 106 | case B230400: rate = 230400; break; |
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| 107 | #endif |
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| 108 | default: rate = 9600; break; |
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| 109 | } |
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| 110 | |
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| 111 | div = SYSTEM_CLOCK_FREQUENCY / (rate * 32); |
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| 112 | |
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[2ab000f] | 113 | *MCF5206E_UBG1(MBAR,uart->chn) = (uint8_t)((div >> 8) & 0xff); |
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| 114 | *MCF5206E_UBG2(MBAR,uart->chn) = (uint8_t)(div & 0xff); |
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[00717a3] | 115 | } |
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| 116 | |
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| 117 | /* |
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| 118 | * mcfuart_reset -- |
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| 119 | * This function perform the hardware initialization of Motorola |
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| 120 | * Coldfire processor on-chip UART controller using parameters |
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| 121 | * filled by the mcfuart_init function. |
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| 122 | * |
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| 123 | * PARAMETERS: |
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| 124 | * uart - pointer to UART channel descriptor structure |
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| 125 | * |
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| 126 | * RETURNS: |
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| 127 | * RTEMS_SUCCESSFUL if channel is initialized successfully, error |
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| 128 | * code in other case |
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| 129 | * |
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| 130 | * ALGORITHM: |
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| 131 | * This function in general follows to algorith described in MCF5206e |
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| 132 | * User's Manual, 12.5 UART Module Initialization Sequence |
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| 133 | */ |
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| 134 | rtems_status_code |
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| 135 | mcfuart_reset(mcfuart *uart) |
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| 136 | { |
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[8bc4430b] | 137 | register uint32_t chn; |
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[00717a3] | 138 | rtems_status_code rc; |
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| 139 | |
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| 140 | if (uart == NULL) |
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| 141 | return RTEMS_INVALID_ADDRESS; |
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| 142 | |
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| 143 | chn = uart->chn; |
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| 144 | |
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| 145 | /* Reset the receiver and transmitter */ |
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| 146 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_RX; |
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| 147 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_TX; |
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| 148 | |
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| 149 | /* |
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| 150 | * Program the vector number for a UART module interrupt, or |
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| 151 | * disable UART interrupts if polled I/O. Enable the desired |
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| 152 | * interrupt sources. |
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| 153 | */ |
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| 154 | if (uart->intvec != 0) |
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| 155 | { |
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| 156 | int_driven_uart[chn - 1].uart = uart; |
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| 157 | int_driven_uart[chn - 1].vec = uart->intvec; |
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| 158 | rc = rtems_interrupt_catch(mcfuart_interrupt_handler, uart->intvec, |
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| 159 | &uart->old_handler); |
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| 160 | if (rc != RTEMS_SUCCESSFUL) |
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| 161 | return rc; |
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| 162 | *MCF5206E_UIVR(MBAR,chn) = uart->intvec; |
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| 163 | *MCF5206E_UIMR(MBAR,chn) = MCF5206E_UIMR_FFULL; |
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| 164 | *MCF5206E_UACR(MBAR,chn) = MCF5206E_UACR_IEC; |
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| 165 | *MCF5206E_IMR(MBAR) &= ~MCF5206E_INTR_BIT(uart->chn == 1 ? |
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| 166 | MCF5206E_INTR_UART_1 : |
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| 167 | MCF5206E_INTR_UART_2); |
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| 168 | } |
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| 169 | else |
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| 170 | { |
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| 171 | *MCF5206E_UIMR(MBAR,chn) = 0; |
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| 172 | } |
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| 173 | |
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| 174 | /* Select the receiver and transmitter clock. */ |
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| 175 | mcfuart_set_baudrate(uart, B19200); /* dBUG defaults (unfortunately, |
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| 176 | it is differ to termios default */ |
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| 177 | *MCF5206E_UCSR(MBAR,chn) = |
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| 178 | MCF5206E_UCSR_RCS_TIMER | MCF5206E_UCSR_TCS_TIMER; |
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| 179 | |
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| 180 | /* Mode Registers 1,2 - set termios defaults (8N1) */ |
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| 181 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_MR; |
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| 182 | *MCF5206E_UMR(MBAR,chn) = |
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| 183 | /* MCF5206E_UMR1_RXRTS | */ |
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| 184 | MCF5206E_UMR1_PM_NO_PARITY | |
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| 185 | MCF5206E_UMR1_BC_8; |
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| 186 | *MCF5206E_UMR(MBAR,chn) = |
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| 187 | MCF5206E_UMR2_CM_NORMAL | |
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| 188 | /* MCF5206E_UMR2_TXCTS | */ |
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| 189 | MCF5206E_UMR2_SB_1; |
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| 190 | |
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| 191 | /* Enable Receiver and Transmitter */ |
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| 192 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_MISC_RESET_ERR; |
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| 193 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_TC_ENABLE; |
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| 194 | *MCF5206E_UCR(MBAR,chn) = MCF5206E_UCR_RC_ENABLE; |
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| 195 | |
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| 196 | return RTEMS_SUCCESSFUL; |
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| 197 | } |
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| 198 | |
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| 199 | /* |
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| 200 | * mcfuart_disable -- |
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| 201 | * This function disable the operations on Motorola Coldfire UART |
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| 202 | * controller |
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| 203 | * |
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| 204 | * PARAMETERS: |
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| 205 | * uart - pointer to UART channel descriptor structure |
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| 206 | * |
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| 207 | * RETURNS: |
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| 208 | * RTEMS_SUCCESSFUL if UART closed successfuly, or error code in |
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| 209 | * other case |
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| 210 | */ |
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| 211 | rtems_status_code |
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| 212 | mcfuart_disable(mcfuart *uart) |
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| 213 | { |
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| 214 | rtems_status_code rc; |
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| 215 | *MCF5206E_UCR(MBAR,uart->chn) = |
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| 216 | MCF5206E_UCR_TC_DISABLE | |
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| 217 | MCF5206E_UCR_RC_DISABLE; |
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| 218 | if (uart->intvec != 0) |
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| 219 | { |
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| 220 | *MCF5206E_IMR(MBAR) |= MCF5206E_INTR_BIT(uart->chn == 1 ? |
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| 221 | MCF5206E_INTR_UART_1 : |
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| 222 | MCF5206E_INTR_UART_2); |
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| 223 | rc = rtems_interrupt_catch(uart->old_handler, uart->intvec, NULL); |
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| 224 | int_driven_uart[uart->chn - 1].uart = NULL; |
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| 225 | int_driven_uart[uart->chn - 1].vec = 0; |
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| 226 | if (rc != RTEMS_SUCCESSFUL) |
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| 227 | return rc; |
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| 228 | } |
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| 229 | return RTEMS_SUCCESSFUL; |
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| 230 | } |
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| 231 | |
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| 232 | /* |
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| 233 | * mcfuart_set_attributes -- |
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| 234 | * This function parse the termios attributes structure and perform |
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| 235 | * the appropriate settings in hardware. |
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| 236 | * |
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| 237 | * PARAMETERS: |
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| 238 | * uart - pointer to the UART descriptor structure |
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| 239 | * t - pointer to termios parameters |
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| 240 | * |
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| 241 | * RETURNS: |
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| 242 | * RTEMS_SUCCESSFUL |
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| 243 | */ |
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| 244 | int |
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| 245 | mcfuart_set_attributes(mcfuart *uart, const struct termios *t) |
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| 246 | { |
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| 247 | int level; |
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| 248 | speed_t baud; |
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[8bc4430b] | 249 | uint8_t umr1, umr2; |
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[00717a3] | 250 | |
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| 251 | baud = cfgetospeed(t); |
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| 252 | umr1 = 0; |
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| 253 | umr2 = MCF5206E_UMR2_CM_NORMAL; |
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| 254 | |
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| 255 | /* Set flow control */ |
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| 256 | if ((t->c_cflag & CRTSCTS) != 0) |
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| 257 | { |
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| 258 | umr1 |= MCF5206E_UMR1_RXRTS; |
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| 259 | umr2 |= MCF5206E_UMR2_TXCTS; |
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| 260 | } |
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| 261 | |
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| 262 | /* Set character size */ |
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| 263 | switch (t->c_cflag & CSIZE) |
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| 264 | { |
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| 265 | case CS5: umr1 |= MCF5206E_UMR1_BC_5; break; |
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| 266 | case CS6: umr1 |= MCF5206E_UMR1_BC_6; break; |
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| 267 | case CS7: umr1 |= MCF5206E_UMR1_BC_7; break; |
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| 268 | case CS8: umr1 |= MCF5206E_UMR1_BC_8; break; |
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| 269 | } |
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| 270 | |
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| 271 | /* Set number of stop bits */ |
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| 272 | if ((t->c_cflag & CSTOPB) != 0) |
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| 273 | { |
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| 274 | if ((t->c_cflag & CSIZE) == CS5) |
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| 275 | { |
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| 276 | umr2 |= MCF5206E_UMR2_SB5_2; |
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| 277 | } |
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| 278 | else |
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| 279 | { |
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| 280 | umr2 |= MCF5206E_UMR2_SB_2; |
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| 281 | } |
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| 282 | } |
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| 283 | else |
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| 284 | { |
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| 285 | if ((t->c_cflag & CSIZE) == CS5) |
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| 286 | { |
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| 287 | umr2 |= MCF5206E_UMR2_SB5_1; |
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| 288 | } |
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| 289 | else |
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| 290 | { |
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| 291 | umr2 |= MCF5206E_UMR2_SB_1; |
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| 292 | } |
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| 293 | } |
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| 294 | |
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| 295 | /* Set parity mode */ |
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| 296 | if ((t->c_cflag & PARENB) != 0) |
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| 297 | { |
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| 298 | if ((t->c_cflag & PARODD) != 0) |
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| 299 | { |
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| 300 | umr1 |= MCF5206E_UMR1_PM_ODD; |
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| 301 | } |
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| 302 | else |
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| 303 | { |
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| 304 | umr1 |= MCF5206E_UMR1_PM_EVEN; |
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| 305 | } |
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| 306 | } |
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| 307 | else |
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| 308 | { |
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| 309 | umr1 |= MCF5206E_UMR1_PM_NO_PARITY; |
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| 310 | } |
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| 311 | |
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| 312 | rtems_interrupt_disable(level); |
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| 313 | *MCF5206E_UCR(MBAR,uart->chn) = |
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| 314 | MCF5206E_UCR_TC_DISABLE | MCF5206E_UCR_RC_DISABLE; |
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| 315 | mcfuart_set_baudrate(uart, baud); |
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| 316 | *MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_MISC_RESET_MR; |
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| 317 | *MCF5206E_UMR(MBAR,uart->chn) = umr1; |
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| 318 | *MCF5206E_UMR(MBAR,uart->chn) = umr2; |
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| 319 | if ((t->c_cflag & CREAD) != 0) |
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| 320 | { |
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| 321 | *MCF5206E_UCR(MBAR,uart->chn) = |
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| 322 | MCF5206E_UCR_TC_ENABLE | MCF5206E_UCR_RC_ENABLE; |
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| 323 | } |
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| 324 | else |
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| 325 | { |
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| 326 | *MCF5206E_UCR(MBAR,uart->chn) = MCF5206E_UCR_TC_ENABLE; |
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| 327 | } |
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| 328 | rtems_interrupt_enable(level); |
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| 329 | |
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| 330 | return RTEMS_SUCCESSFUL; |
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| 331 | } |
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| 332 | |
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| 333 | /* |
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| 334 | * mcfuart_poll_read -- |
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| 335 | * This function tried to read character from MCF UART and perform |
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| 336 | * error handling. When parity or framing error occured, return |
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| 337 | * value dependent on termios input mode flags: |
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| 338 | * - received character, if IGNPAR == 1 |
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| 339 | * - 0, if IGNPAR == 0 and PARMRK == 0 |
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| 340 | * - 0xff and 0x00 on next poll_read invocation, if IGNPAR == 0 and |
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| 341 | * PARMRK == 1 |
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| 342 | * |
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| 343 | * PARAMETERS: |
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| 344 | * uart - pointer to UART descriptor structure |
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| 345 | * |
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| 346 | * RETURNS: |
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| 347 | * code of received character or -1 if no characters received. |
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| 348 | */ |
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| 349 | int |
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| 350 | mcfuart_poll_read(mcfuart *uart) |
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| 351 | { |
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[8bc4430b] | 352 | uint8_t usr; |
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[00717a3] | 353 | int ch; |
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[9a73f421] | 354 | if (uart->parerr_mark_flag == true) |
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[00717a3] | 355 | { |
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[9a73f421] | 356 | uart->parerr_mark_flag = false; |
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[00717a3] | 357 | return 0; |
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| 358 | } |
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| 359 | usr = *MCF5206E_USR(MBAR,uart->chn); |
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| 360 | if ((usr & MCF5206E_USR_RXRDY) != 0) |
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| 361 | { |
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| 362 | if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) && |
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| 363 | !(uart->c_iflag & IGNPAR)) |
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| 364 | { |
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| 365 | ch = *MCF5206E_URB(MBAR,uart->chn); /* Clear error bits */ |
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| 366 | if (uart->c_iflag & PARMRK) |
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| 367 | { |
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[9a73f421] | 368 | uart->parerr_mark_flag = true; |
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[00717a3] | 369 | ch = 0xff; |
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| 370 | } |
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| 371 | else |
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| 372 | { |
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| 373 | ch = 0; |
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| 374 | } |
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| 375 | } |
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| 376 | else |
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| 377 | { |
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| 378 | ch = *MCF5206E_URB(MBAR,uart->chn); |
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| 379 | } |
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| 380 | } |
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| 381 | else |
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| 382 | ch = -1; |
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| 383 | return ch; |
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| 384 | } |
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| 385 | |
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| 386 | /* |
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| 387 | * mcfuart_poll_write -- |
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| 388 | * This function transmit buffer byte-by-byte in polling mode. |
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| 389 | * |
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| 390 | * PARAMETERS: |
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| 391 | * uart - pointer to the UART descriptor structure |
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| 392 | * buf - pointer to transmit buffer |
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| 393 | * len - transmit buffer length |
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| 394 | * |
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| 395 | * RETURNS: |
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| 396 | * 0 |
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| 397 | */ |
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| 398 | int |
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| 399 | mcfuart_poll_write(mcfuart *uart, const char *buf, int len) |
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| 400 | { |
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| 401 | while (len--) |
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| 402 | { |
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| 403 | while ((*MCF5206E_USR(MBAR, uart->chn) & MCF5206E_USR_TXRDY) == 0); |
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| 404 | *MCF5206E_UTB(MBAR, uart->chn) = *buf++; |
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| 405 | } |
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| 406 | return 0; |
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| 407 | } |
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| 408 | |
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| 409 | /* mcfuart_interrupt_handler -- |
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| 410 | * UART interrupt handler routine |
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| 411 | * |
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| 412 | * PARAMETERS: |
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| 413 | * vec - interrupt vector number |
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| 414 | * |
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| 415 | * RETURNS: |
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| 416 | * none |
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| 417 | */ |
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| 418 | static rtems_isr |
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| 419 | mcfuart_interrupt_handler(rtems_vector_number vec) |
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| 420 | { |
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| 421 | mcfuart *uart; |
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[8bc4430b] | 422 | register uint8_t usr; |
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| 423 | register uint8_t uisr; |
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[00717a3] | 424 | register int chn; |
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| 425 | register int bp = 0; |
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| 426 | |
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| 427 | /* Find UART descriptor from vector number */ |
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| 428 | if (int_driven_uart[0].vec == vec) |
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| 429 | uart = int_driven_uart[0].uart; |
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| 430 | else if (int_driven_uart[1].vec == vec) |
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| 431 | uart = int_driven_uart[1].uart; |
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| 432 | else |
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| 433 | return; |
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| 434 | |
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| 435 | chn = uart->chn; |
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| 436 | |
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| 437 | uisr = *MCF5206E_UISR(MBAR, chn); |
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| 438 | if (uisr & MCF5206E_UISR_DB) |
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| 439 | { |
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| 440 | *MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_BRK; |
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| 441 | } |
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| 442 | |
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| 443 | /* Receiving */ |
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| 444 | while (1) |
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| 445 | { |
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| 446 | char buf[32]; |
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| 447 | usr = *MCF5206E_USR(MBAR,chn); |
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| 448 | if ((bp < sizeof(buf) - 1) && ((usr & MCF5206E_USR_RXRDY) != 0)) |
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| 449 | { |
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| 450 | /* Receive character and handle frame/parity errors */ |
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| 451 | if (((usr & (MCF5206E_USR_FE | MCF5206E_USR_PE)) != 0) && |
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| 452 | !(uart->c_iflag & IGNPAR)) |
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| 453 | { |
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| 454 | if (uart->c_iflag & PARMRK) |
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| 455 | { |
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| 456 | buf[bp++] = 0xff; |
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| 457 | buf[bp++] = 0x00; |
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| 458 | } |
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| 459 | else |
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| 460 | { |
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| 461 | buf[bp++] = 0x00; |
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| 462 | } |
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| 463 | } |
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| 464 | else |
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| 465 | { |
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| 466 | buf[bp++] = *MCF5206E_URB(MBAR, chn); |
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| 467 | } |
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| 468 | |
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| 469 | /* Reset error condition if any errors has been detected */ |
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| 470 | if (usr & (MCF5206E_USR_RB | MCF5206E_USR_FE | |
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| 471 | MCF5206E_USR_PE | MCF5206E_USR_OE)) |
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| 472 | { |
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| 473 | *MCF5206E_UCR(MBAR, chn) = MCF5206E_UCR_MISC_RESET_ERR; |
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| 474 | } |
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| 475 | } |
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| 476 | else |
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| 477 | { |
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| 478 | if (bp != 0) |
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| 479 | rtems_termios_enqueue_raw_characters(uart->tty, buf, bp); |
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| 480 | break; |
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| 481 | } |
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| 482 | } |
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| 483 | |
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| 484 | /* Transmitting */ |
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| 485 | while (1) |
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| 486 | { |
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| 487 | if ((*MCF5206E_USR(MBAR, chn) & MCF5206E_USR_TXRDY) == 0) |
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| 488 | break; |
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| 489 | if (uart->tx_buf != NULL) |
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| 490 | { |
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| 491 | if (uart->tx_ptr >= uart->tx_buf_len) |
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| 492 | { |
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| 493 | register int dequeue = uart->tx_buf_len; |
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| 494 | *MCF5206E_UIMR(MBAR, uart->chn) = MCF5206E_UIMR_FFULL; |
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| 495 | uart->tx_buf = NULL; |
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| 496 | uart->tx_ptr = uart->tx_buf_len = 0; |
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| 497 | rtems_termios_dequeue_characters(uart->tty, dequeue); |
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| 498 | } |
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| 499 | else |
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| 500 | { |
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| 501 | *MCF5206E_UTB(MBAR, chn) = uart->tx_buf[uart->tx_ptr++]; |
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| 502 | } |
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| 503 | } |
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| 504 | else |
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| 505 | break; |
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| 506 | } |
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| 507 | } |
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| 508 | |
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| 509 | /* mcfuart_interrupt_write -- |
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| 510 | * This function initiate transmitting of the buffer in interrupt mode. |
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| 511 | * |
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| 512 | * PARAMETERS: |
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| 513 | * uart - pointer to the UART descriptor structure |
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| 514 | * buf - pointer to transmit buffer |
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| 515 | * len - transmit buffer length |
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| 516 | * |
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| 517 | * RETURNS: |
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| 518 | * 0 |
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| 519 | */ |
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| 520 | int |
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| 521 | mcfuart_interrupt_write(mcfuart *uart, const char *buf, int len) |
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| 522 | { |
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| 523 | int level; |
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| 524 | rtems_interrupt_disable(level); |
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| 525 | uart->tx_buf = buf; |
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| 526 | uart->tx_buf_len = len; |
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| 527 | uart->tx_ptr = 0; |
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| 528 | *MCF5206E_UIMR(MBAR, uart->chn) = |
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| 529 | MCF5206E_UIMR_FFULL | MCF5206E_UIMR_TXRDY; |
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| 530 | while (((*MCF5206E_USR(MBAR,uart->chn) & MCF5206E_USR_TXRDY) != 0) && |
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| 531 | (uart->tx_ptr < uart->tx_buf_len)) |
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| 532 | { |
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| 533 | *MCF5206E_UTB(MBAR,uart->chn) = uart->tx_buf[uart->tx_ptr++]; |
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| 534 | } |
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| 535 | rtems_interrupt_enable(level); |
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| 536 | return 0; |
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| 537 | } |
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| 538 | |
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| 539 | /* mcfuart_stop_remote_tx -- |
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| 540 | * This function stop data flow from remote device. |
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| 541 | * |
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| 542 | * PARAMETERS: |
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| 543 | * uart - pointer to the UART descriptor structure |
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| 544 | * |
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| 545 | * RETURNS: |
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| 546 | * RTEMS_SUCCESSFUL |
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| 547 | */ |
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| 548 | int |
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| 549 | mcfuart_stop_remote_tx(mcfuart *uart) |
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| 550 | { |
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| 551 | *MCF5206E_UOP0(MBAR, uart->chn) = 1; |
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| 552 | return RTEMS_SUCCESSFUL; |
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| 553 | } |
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| 554 | |
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| 555 | /* mcfuart_start_remote_tx -- |
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| 556 | * This function resume data flow from remote device. |
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| 557 | * |
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| 558 | * PARAMETERS: |
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| 559 | * uart - pointer to the UART descriptor structure |
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| 560 | * |
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| 561 | * RETURNS: |
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| 562 | * RTEMS_SUCCESSFUL |
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| 563 | */ |
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| 564 | int |
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| 565 | mcfuart_start_remote_tx(mcfuart *uart) |
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| 566 | { |
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| 567 | *MCF5206E_UOP1(MBAR, uart->chn) = 1; |
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| 568 | return RTEMS_SUCCESSFUL; |
---|
| 569 | } |
---|