source: rtems/c/src/lib/libcpu/i960/include/i960KA.h @ 073e2411

4.104.114.84.95
Last change on this file since 073e2411 was bc85fd5a, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 11, 2000 at 7:31:04 PM

Reworked score/cpu/i960 so it can be safely compiled multilib. All
routines and structures that require CPU model specific information
are now in libcpu. This required significant rework of the
score/cpu header files and the creation of multiple header files
and subdirectories in libcpu/i960.

  • Property mode set to 100644
File size: 3.3 KB
Line 
1/*
2 *  i960ka.h -- hacked version of CA.  Not checked on real hardware.
3 *
4 *  $Id$
5 */
6
7#ifndef __i960KA_h
8#define __i960KA_h
9
10
11/* i960KA control structures */
12 
13/* Intel i960KA Control Table */
14 
15typedef struct {
16                            /* Control Group 0 */
17  unsigned int ipb0;              /* IP breakpoint 0 */
18  unsigned int ipb1;              /* IP breakpoint 1 */
19  unsigned int dab0;              /* data address breakpoint 0 */
20  unsigned int dab1;              /* data address breakpoint 1 */
21                            /* Control Group 1 */
22  unsigned int imap0;             /* interrupt map 0 */
23  unsigned int imap1;             /* interrupt map 1 */
24  unsigned int imap2;             /* interrupt map 2 */
25  unsigned int icon;              /* interrupt control */
26                            /* Control Group 2 */
27  unsigned int mcon0;             /* memory region 0 configuration */
28  unsigned int mcon1;             /* memory region 1 configuration */
29  unsigned int mcon2;             /* memory region 2 configuration */
30  unsigned int mcon3;             /* memory region 3 configuration */
31                            /* Control Group 3 */
32  unsigned int mcon4;             /* memory region 4 configuration */
33  unsigned int mcon5;             /* memory region 5 configuration */
34  unsigned int mcon6;             /* memory region 6 configuration */
35  unsigned int mcon7;             /* memory region 7 configuration */
36                            /* Control Group 4 */
37  unsigned int mcon8;             /* memory region 8 configuration */
38  unsigned int mcon9;             /* memory region 9 configuration */
39  unsigned int mcon10;            /* memory region 10 configuration */
40  unsigned int mcon11;            /* memory region 11 configuration */
41                            /* Control Group 5 */
42  unsigned int mcon12;            /* memory region 12 configuration */
43  unsigned int mcon13;            /* memory region 13 configuration */
44  unsigned int mcon14;            /* memory region 14 configuration */
45  unsigned int mcon15;            /* memory region 15 configuration */
46                            /* Control Group 6 */
47  unsigned int reserved;          /* reserved */
48  unsigned int bpcon;             /* breakpoint control */
49  unsigned int tc;                /* trace control */
50  unsigned int bcon;              /* bus configuration control */
51}   i960ka_control_table;
52 
53/* Intel i960KA Processor Control Block */
54 
55typedef struct {
56  unsigned int    *fault_tbl;     /* fault table base address */
57  i960ka_control_table
58                  *control_tbl;   /* control table base address */
59  unsigned int     initial_ac;    /* AC register initial value */
60  unsigned int     fault_config;  /* fault configuration word */
61  void           **intr_tbl;      /* interrupt table base address */
62  void            *sys_proc_tbl;  /* system procedure table
63                                     base address */
64  unsigned int     reserved;      /* reserved */
65  unsigned int    *intr_stack;    /* interrupt stack pointer */
66  unsigned int     ins_cache_cfg; /* instruction cache
67                                     configuration word */
68  unsigned int     reg_cache_cfg; /* register cache configuration word */
69}   i960ka_PRCB;
70
71typedef i960ka_control_table i960_control_table;
72typedef i960ka_PRCB i960_PRCB;
73
74#endif
75/* end of include file */
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