[adbaa61] | 1 | /* |
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| 2 | * page.c :- This file contains implementation of C function to |
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| 3 | * Instanciate paging. More detailled information |
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| 4 | * can be found on Intel site and more precisely in |
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| 5 | * the following book : |
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| 6 | * |
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| 7 | * Pentium Processor familly |
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| 8 | * Developper's Manual |
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| 9 | * |
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| 10 | * Volume 3 : Architecture and Programming Manual |
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| 11 | * |
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| 12 | * Copyright (C) 1999 Emmanuel Raguet (raguet@crf.canon.fr) |
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| 13 | * Canon Centre Recherche France. |
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| 14 | * |
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| 15 | * The license and distribution terms for this file may be |
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| 16 | * found in found in the file LICENSE in this distribution or at |
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| 17 | * http://www.OARcorp.com/rtems/license.html. |
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| 18 | * |
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| 19 | * $Header$ |
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| 20 | */ |
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| 21 | |
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| 22 | #include <stdio.h> |
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| 23 | #include <stdlib.h> |
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| 24 | #include <string.h> |
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| 25 | #include <rtems.h> |
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| 26 | #include <libcpu/cpu.h> |
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| 27 | |
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| 28 | #define MEMORY_SIZE 0x4000000 /* 64Mo */ |
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| 29 | |
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| 30 | static int directoryEntry=0; |
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| 31 | static int tableEntry=0; |
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| 32 | static page_directory *pageDirectory; |
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| 33 | |
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| 34 | extern rtems_unsigned32 rtemsFreeMemStart; |
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| 35 | |
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| 36 | |
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| 37 | /*************************************************************************/ |
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| 38 | /************** IT IS A ONE-TO-ONE TRANSLATION ***************************/ |
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| 39 | /*************************************************************************/ |
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| 40 | |
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| 41 | |
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| 42 | /* |
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| 43 | * Disable the paging |
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| 44 | */ |
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| 45 | void _CPU_disable_paging() { |
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| 46 | cr0 regCr0; |
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| 47 | |
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| 48 | flush_cache(); |
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| 49 | regCr0.i = i386_get_cr0(); |
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| 50 | regCr0.cr0.paging = 0; |
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| 51 | i386_set_cr0( regCr0.i ); |
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| 52 | } |
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| 53 | |
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| 54 | /* |
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| 55 | * Enable the paging |
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| 56 | */ |
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| 57 | void _CPU_enable_paging() { |
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| 58 | cr0 regCr0; |
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| 59 | |
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| 60 | regCr0.i = i386_get_cr0(); |
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| 61 | regCr0.cr0.paging = 1; |
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| 62 | i386_set_cr0( regCr0.i ); |
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| 63 | flush_cache(); |
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| 64 | } |
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| 65 | |
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| 66 | |
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| 67 | /* |
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| 68 | * Initialize the paging with 1-to-1 mapping |
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| 69 | */ |
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| 70 | |
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| 71 | int init_paging() { |
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| 72 | |
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| 73 | int memorySize; |
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| 74 | int nbPages; |
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| 75 | int nbInitPages; |
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| 76 | char *Tables; |
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| 77 | cr3 regCr3; |
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| 78 | page_table *pageTable; |
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| 79 | unsigned int physPage; |
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| 80 | int nbTables=0; |
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| 81 | |
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| 82 | /* |
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| 83 | * rtemsFreeMemStart is the last valid 32-bits address |
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| 84 | * so the size is rtemsFreeMemStart + 4 |
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| 85 | */ |
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| 86 | memorySize = rtemsFreeMemStart + 4; |
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| 87 | |
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| 88 | nbPages = ( (memorySize - 1) / PG_SIZE ) + 1; |
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| 89 | nbTables = ( (memorySize - 1) / FOUR_MB ) + 2; |
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| 90 | |
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| 91 | /* allocate 1 page more to page alignement */ |
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| 92 | Tables = (char *)malloc( (nbTables + 1)*sizeof(page_table) ); |
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| 93 | if ( Tables == NULL ){ |
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| 94 | return -1; /*unable to allocate memory */ |
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| 95 | } |
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| 96 | |
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| 97 | /* 4K-page alignement */ |
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| 98 | Tables += (PG_SIZE - (int)Tables) & 0xFFF; |
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| 99 | |
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| 100 | /* Reset Tables */ |
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[c629812] | 101 | memset( Tables, 0, nbTables*sizeof(page_table) ); |
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[adbaa61] | 102 | pageDirectory = (page_directory *) Tables; |
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| 103 | pageTable = (page_table *)((int)Tables + PG_SIZE); |
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| 104 | |
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| 105 | nbInitPages = 0; |
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| 106 | directoryEntry = 0; |
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| 107 | tableEntry = 0; |
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| 108 | physPage = 0; |
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| 109 | |
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| 110 | while ( nbInitPages != nbPages ){ |
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| 111 | if ( tableEntry == 0 ){ |
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| 112 | pageDirectory->pageDirEntry[directoryEntry].bits.page_frame_address = (unsigned int)pageTable >> 12; |
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| 113 | pageDirectory->pageDirEntry[directoryEntry].bits.available = 0; |
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| 114 | pageDirectory->pageDirEntry[directoryEntry].bits.page_size = 0; |
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| 115 | pageDirectory->pageDirEntry[directoryEntry].bits.accessed = 0; |
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| 116 | pageDirectory->pageDirEntry[directoryEntry].bits.cache_disable = 0; |
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| 117 | pageDirectory->pageDirEntry[directoryEntry].bits.write_through = 0; |
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| 118 | pageDirectory->pageDirEntry[directoryEntry].bits.user = 1; |
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| 119 | pageDirectory->pageDirEntry[directoryEntry].bits.writable = 1; |
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| 120 | pageDirectory->pageDirEntry[directoryEntry].bits.present = 1; |
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| 121 | } |
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| 122 | pageTable->pageTableEntry[tableEntry].bits.page_frame_address = physPage; |
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| 123 | pageTable->pageTableEntry[tableEntry].bits.available = 0; |
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| 124 | pageTable->pageTableEntry[tableEntry].bits.dirty = 0; |
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| 125 | pageTable->pageTableEntry[tableEntry].bits.accessed = 0; |
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| 126 | pageTable->pageTableEntry[tableEntry].bits.cache_disable = 0; |
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| 127 | pageTable->pageTableEntry[tableEntry].bits.write_through = 0; |
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| 128 | pageTable->pageTableEntry[tableEntry].bits.user = 1; |
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| 129 | pageTable->pageTableEntry[tableEntry].bits.writable = 1; |
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| 130 | pageTable->pageTableEntry[tableEntry].bits.present = 1; |
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| 131 | |
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| 132 | physPage ++; |
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| 133 | tableEntry ++; |
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| 134 | |
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| 135 | if (tableEntry >= MAX_ENTRY){ |
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| 136 | tableEntry = 0; |
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| 137 | directoryEntry ++; |
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| 138 | pageTable ++; |
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| 139 | } |
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| 140 | |
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| 141 | nbInitPages++; |
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| 142 | } |
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| 143 | |
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| 144 | regCr3.cr3.page_write_transparent = 0; |
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| 145 | regCr3.cr3.page_cache_disable = 0; |
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| 146 | regCr3.cr3.page_directory_base = (unsigned int)pageDirectory >> 12; |
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| 147 | |
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| 148 | i386_set_cr3( regCr3.i ); |
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| 149 | |
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| 150 | _CPU_enable_cache(); |
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| 151 | _CPU_enable_paging(); |
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| 152 | |
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| 153 | return 0; |
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| 154 | } |
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| 155 | |
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| 156 | /* |
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| 157 | * Disable the entire cache |
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| 158 | */ |
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| 159 | void _CPU_disable_cache() { |
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| 160 | cr0 regCr0; |
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| 161 | |
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| 162 | regCr0.i = i386_get_cr0(); |
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| 163 | regCr0.cr0.page_level_cache_disable = 1; |
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| 164 | regCr0.cr0.no_write_through = 1; |
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| 165 | i386_set_cr0( regCr0.i ); |
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| 166 | flush_cache(); |
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| 167 | } |
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| 168 | |
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| 169 | /* |
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| 170 | * Disable the entire cache |
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| 171 | */ |
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| 172 | void _CPU_enable_cache() { |
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| 173 | cr0 regCr0; |
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| 174 | |
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| 175 | regCr0.i = i386_get_cr0(); |
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| 176 | regCr0.cr0.page_level_cache_disable = 0; |
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| 177 | regCr0.cr0.no_write_through = 0; |
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| 178 | i386_set_cr0( regCr0.i ); |
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| 179 | /*flush_cache();*/ |
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| 180 | } |
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| 181 | |
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| 182 | /* |
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| 183 | * Is cache enable |
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| 184 | */ |
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| 185 | int _CPU_is_cache_enabled() { |
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| 186 | cr0 regCr0; |
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| 187 | |
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| 188 | regCr0.i = i386_get_cr0(); |
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| 189 | return( ~(regCr0.cr0.page_level_cache_disable) ); |
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| 190 | } |
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| 191 | |
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| 192 | /* |
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| 193 | * Is paging enable |
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| 194 | */ |
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| 195 | int _CPU_is_paging_enabled() { |
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| 196 | cr0 regCr0; |
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| 197 | |
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| 198 | regCr0.i = i386_get_cr0(); |
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| 199 | return(regCr0.cr0.paging); |
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| 200 | } |
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| 201 | |
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| 202 | |
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| 203 | /* |
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| 204 | * Translate the physical address in the virtual space and return |
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| 205 | * the translated address in mappedAddress |
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| 206 | */ |
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| 207 | |
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| 208 | int _CPU_map_phys_address |
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| 209 | (void **mappedAddress, void *physAddress, int size, int flag){ |
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| 210 | |
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| 211 | page_table *localPageTable; |
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| 212 | unsigned int lastAddress, countAddress; |
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| 213 | char *Tables; |
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| 214 | linear_address virtualAddress; |
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| 215 | unsigned char pagingWasEnabled; |
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| 216 | |
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| 217 | pagingWasEnabled = 0; |
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| 218 | |
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| 219 | if (_CPU_is_paging_enabled()){ |
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| 220 | pagingWasEnabled = 1; |
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| 221 | _CPU_disable_paging(); |
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| 222 | } |
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| 223 | |
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| 224 | countAddress = (unsigned int)physAddress; |
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| 225 | lastAddress = (unsigned int)physAddress + (size - 1); |
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| 226 | virtualAddress.address = 0; |
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| 227 | |
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| 228 | while (1){ |
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| 229 | |
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| 230 | if ((countAddress & ~MASK_OFFSET) > (lastAddress & ~MASK_OFFSET)) |
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| 231 | break; |
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| 232 | |
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| 233 | /* Need to allocate a new page table */ |
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| 234 | if (pageDirectory->pageDirEntry[directoryEntry].bits.page_frame_address == 0){ |
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| 235 | /* We allocate 2 pages to perform 4k-page alignement */ |
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| 236 | Tables = (char *)malloc(2*sizeof(page_table)); |
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| 237 | if ( Tables == NULL ){ |
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| 238 | if (pagingWasEnabled) |
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| 239 | _CPU_enable_paging(); |
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| 240 | return -1; /* unable to allocate memory */ |
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| 241 | } |
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| 242 | /* 4K-page alignement */ |
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| 243 | Tables += (PG_SIZE - (int)Tables) & 0xFFF; |
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| 244 | |
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| 245 | /* Reset Table */ |
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[c629812] | 246 | memset( Tables, 0, sizeof(page_table) ); |
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[adbaa61] | 247 | pageDirectory->pageDirEntry[directoryEntry].bits.page_frame_address = |
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| 248 | (unsigned int)Tables >> 12; |
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| 249 | pageDirectory->pageDirEntry[directoryEntry].bits.available = 0; |
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| 250 | pageDirectory->pageDirEntry[directoryEntry].bits.page_size = 0; |
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| 251 | pageDirectory->pageDirEntry[directoryEntry].bits.accessed = 0; |
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| 252 | pageDirectory->pageDirEntry[directoryEntry].bits.cache_disable = 0; |
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| 253 | pageDirectory->pageDirEntry[directoryEntry].bits.write_through = 0; |
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| 254 | pageDirectory->pageDirEntry[directoryEntry].bits.user = 1; |
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| 255 | pageDirectory->pageDirEntry[directoryEntry].bits.writable = 1; |
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| 256 | pageDirectory->pageDirEntry[directoryEntry].bits.present = 1; |
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| 257 | } |
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| 258 | |
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| 259 | |
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| 260 | localPageTable = (page_table *)(pageDirectory-> |
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| 261 | pageDirEntry[directoryEntry].bits. |
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| 262 | page_frame_address << 12); |
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| 263 | |
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| 264 | if (virtualAddress.address == 0){ |
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| 265 | virtualAddress.bits.directory = directoryEntry; |
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| 266 | virtualAddress.bits.page = tableEntry; |
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| 267 | virtualAddress.bits.offset = (unsigned int)physAddress & MASK_OFFSET; |
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| 268 | } |
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| 269 | |
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| 270 | localPageTable->pageTableEntry[tableEntry].bits.page_frame_address = |
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| 271 | ((unsigned int)countAddress & ~MASK_OFFSET) >> 12; |
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| 272 | localPageTable->pageTableEntry[tableEntry].bits.available = 0; |
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| 273 | localPageTable->pageTableEntry[tableEntry].bits.dirty = 0; |
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| 274 | localPageTable->pageTableEntry[tableEntry].bits.accessed = 0; |
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| 275 | localPageTable->pageTableEntry[tableEntry].bits.cache_disable = 0; |
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| 276 | localPageTable->pageTableEntry[tableEntry].bits.write_through = 0; |
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| 277 | localPageTable->pageTableEntry[tableEntry].bits.user = 1; |
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| 278 | localPageTable->pageTableEntry[tableEntry].bits.writable = 0; |
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| 279 | localPageTable->pageTableEntry[tableEntry].bits.present = 1; |
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| 280 | |
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| 281 | localPageTable->pageTableEntry[tableEntry].table_entry |= flag ; |
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| 282 | |
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| 283 | countAddress += PG_SIZE; |
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| 284 | tableEntry++; |
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| 285 | if (tableEntry >= MAX_ENTRY){ |
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| 286 | tableEntry = 0; |
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| 287 | directoryEntry++; |
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| 288 | } |
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| 289 | } |
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| 290 | |
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| 291 | if (mappedAddress != 0) |
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| 292 | *mappedAddress = (void *)(virtualAddress.address); |
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| 293 | if (pagingWasEnabled) |
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| 294 | _CPU_enable_paging(); |
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| 295 | return 0; |
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| 296 | } |
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| 297 | |
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| 298 | /* |
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| 299 | * "Compress" the Directory and Page tables to avoid |
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| 300 | * important loss of address range |
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| 301 | */ |
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| 302 | static void Paging_Table_Compress() { |
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| 303 | unsigned int dirCount, pageCount; |
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| 304 | page_table *localPageTable; |
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| 305 | |
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| 306 | if (tableEntry == 0){ |
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| 307 | dirCount = directoryEntry - 1; |
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| 308 | pageCount = MAX_ENTRY - 1; |
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| 309 | } |
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| 310 | else { |
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| 311 | dirCount = directoryEntry; |
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| 312 | pageCount = tableEntry - 1; |
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| 313 | } |
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| 314 | |
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| 315 | while (1){ |
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| 316 | |
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| 317 | localPageTable = (page_table *)(pageDirectory-> |
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| 318 | pageDirEntry[dirCount].bits. |
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| 319 | page_frame_address << 12); |
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| 320 | |
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| 321 | if (localPageTable->pageTableEntry[pageCount].bits.present == 1){ |
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| 322 | pageCount++; |
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| 323 | if (pageCount >= MAX_ENTRY){ |
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| 324 | pageCount = 0; |
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| 325 | dirCount++; |
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| 326 | } |
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| 327 | break; |
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| 328 | } |
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| 329 | |
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| 330 | |
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| 331 | if (pageCount == 0) { |
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| 332 | if (dirCount == 0){ |
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| 333 | break; |
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| 334 | } |
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| 335 | else { |
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| 336 | pageCount = MAX_ENTRY - 1; |
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| 337 | dirCount-- ; |
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| 338 | } |
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| 339 | } |
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| 340 | else |
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| 341 | pageCount-- ; |
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| 342 | } |
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| 343 | |
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| 344 | directoryEntry = dirCount; |
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| 345 | tableEntry = pageCount; |
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| 346 | } |
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| 347 | |
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| 348 | |
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| 349 | /* |
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| 350 | * Unmap the virtual address from the tables |
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| 351 | * (we do not deallocate the table already allocated) |
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| 352 | */ |
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| 353 | |
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| 354 | int _CPU_unmap_virt_address(void *mappedAddress, int size){ |
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| 355 | |
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| 356 | linear_address linearAddr; |
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| 357 | page_table *localPageTable; |
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| 358 | unsigned int lastAddr ; |
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| 359 | unsigned int dirCount ; |
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| 360 | unsigned char pagingWasEnabled; |
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| 361 | |
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| 362 | pagingWasEnabled = 0; |
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| 363 | |
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| 364 | if (_CPU_is_paging_enabled()){ |
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| 365 | pagingWasEnabled = 1; |
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| 366 | _CPU_disable_paging(); |
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| 367 | } |
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| 368 | |
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| 369 | linearAddr.address = (unsigned int)mappedAddress; |
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| 370 | lastAddr = (unsigned int)mappedAddress + (size - 1); |
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| 371 | dirCount = linearAddr.bits.directory; |
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| 372 | |
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| 373 | while (1){ |
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| 374 | |
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| 375 | if ((linearAddr.address & ~MASK_OFFSET) > (lastAddr & ~MASK_OFFSET)) |
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| 376 | break; |
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| 377 | |
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| 378 | if (pageDirectory->pageDirEntry[linearAddr.bits.directory].bits.present == 0){ |
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| 379 | if (pagingWasEnabled) |
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| 380 | _CPU_enable_paging(); |
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| 381 | return -1; |
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| 382 | } |
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| 383 | |
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| 384 | localPageTable = (page_table *)(pageDirectory-> |
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| 385 | pageDirEntry[linearAddr.bits.directory].bits. |
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| 386 | page_frame_address << 12); |
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| 387 | |
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| 388 | if (localPageTable->pageTableEntry[linearAddr.bits.page].bits.present == 0){ |
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| 389 | if (pagingWasEnabled) |
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| 390 | _CPU_enable_paging(); |
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| 391 | return -1; |
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| 392 | } |
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| 393 | |
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| 394 | localPageTable->pageTableEntry[linearAddr.bits.page].bits.present = 0; |
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| 395 | |
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| 396 | linearAddr.address += PG_SIZE ; |
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| 397 | } |
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| 398 | Paging_Table_Compress(); |
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| 399 | if (pagingWasEnabled) |
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| 400 | _CPU_enable_paging(); |
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| 401 | |
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| 402 | return 0; |
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| 403 | } |
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| 404 | |
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| 405 | /* |
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| 406 | * Modify the flags PRESENT, WRITABLE, USER, WRITE_TROUGH, CACHE_DISABLE |
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| 407 | * of the page's descriptor. |
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| 408 | */ |
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| 409 | |
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| 410 | int _CPU_change_memory_mapping_attribute |
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| 411 | (void **newAddress, void *mappedAddress, unsigned int size, unsigned int flag){ |
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| 412 | |
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| 413 | linear_address linearAddr; |
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| 414 | page_table *localPageTable; |
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| 415 | unsigned int lastAddr ; |
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| 416 | unsigned char pagingWasEnabled; |
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| 417 | |
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| 418 | pagingWasEnabled = 0; |
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| 419 | |
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| 420 | if (_CPU_is_paging_enabled()){ |
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| 421 | pagingWasEnabled = 1; |
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| 422 | _CPU_disable_paging(); |
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| 423 | } |
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| 424 | |
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| 425 | linearAddr.address = (unsigned int)mappedAddress; |
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| 426 | lastAddr = (unsigned int)mappedAddress + (size - 1); |
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| 427 | |
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| 428 | while (1){ |
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| 429 | |
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| 430 | if ((linearAddr.address & ~MASK_OFFSET) > (lastAddr & ~MASK_OFFSET)) |
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| 431 | break; |
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| 432 | |
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| 433 | if (pageDirectory->pageDirEntry[linearAddr.bits.directory].bits.present == 0){ |
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| 434 | if (pagingWasEnabled) |
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| 435 | _CPU_enable_paging(); |
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| 436 | return -1; |
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| 437 | } |
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| 438 | localPageTable = (page_table *)(pageDirectory-> |
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| 439 | pageDirEntry[linearAddr.bits.directory].bits. |
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| 440 | page_frame_address << 12); |
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| 441 | |
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| 442 | if (localPageTable->pageTableEntry[linearAddr.bits.page].bits.present == 0){ |
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| 443 | if (pagingWasEnabled) |
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| 444 | _CPU_enable_paging(); |
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| 445 | return -1; |
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| 446 | } |
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| 447 | |
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| 448 | localPageTable->pageTableEntry[linearAddr.bits.page].table_entry &= ~MASK_FLAGS ; |
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| 449 | localPageTable->pageTableEntry[linearAddr.bits.page].table_entry |= flag ; |
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| 450 | |
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| 451 | linearAddr.address += PG_SIZE ; |
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| 452 | } |
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| 453 | |
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| 454 | if (newAddress != NULL) |
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| 455 | *newAddress = mappedAddress ; |
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| 456 | |
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| 457 | if (pagingWasEnabled) |
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| 458 | _CPU_enable_paging(); |
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| 459 | |
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| 460 | return 0; |
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| 461 | } |
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| 462 | |
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| 463 | /* |
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| 464 | * Display the page descriptor flags |
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| 465 | * CACHE_DISABLE of the whole memory |
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| 466 | */ |
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| 467 | |
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[3dd7a72] | 468 | /* hack to avoid dependency on bsp.h */ |
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| 469 | void printk(char *fmt, ...); /* from 'printk.c' */ |
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| 470 | |
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[adbaa61] | 471 | int _CPU_display_memory_attribute(){ |
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| 472 | unsigned int dirCount, pageCount; |
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| 473 | cr0 regCr0; |
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| 474 | page_table *localPageTable; |
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| 475 | unsigned int prevCache; |
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| 476 | unsigned int prevPresent; |
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| 477 | unsigned int maxPage; |
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| 478 | unsigned char pagingWasEnabled; |
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| 479 | |
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| 480 | regCr0.i = i386_get_cr0(); |
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| 481 | |
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| 482 | printk("\n\n >>>>>>>>> MEMORY CACHE CONFIGURATION <<<<<<<<<<\n\n"); |
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| 483 | |
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| 484 | printk("CR0 -> paging : %s\n",(regCr0.cr0.paging ? "ENABLE ":"DISABLE")); |
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| 485 | printk(" page-level cache : %s\n\n",(regCr0.cr0.page_level_cache_disable ? "DISABLE":"ENABLE")); |
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| 486 | |
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| 487 | if (regCr0.cr0.paging == 0) |
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| 488 | return 0; |
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| 489 | |
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| 490 | prevPresent = 0; |
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| 491 | prevCache = 1; |
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| 492 | |
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| 493 | pagingWasEnabled = 0; |
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| 494 | |
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| 495 | if (_CPU_is_paging_enabled()){ |
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| 496 | pagingWasEnabled = 1; |
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| 497 | _CPU_disable_paging(); |
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| 498 | } |
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| 499 | |
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| 500 | for (dirCount = 0; dirCount < directoryEntry+1; dirCount++) { |
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| 501 | |
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| 502 | localPageTable = (page_table *)(pageDirectory-> |
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| 503 | pageDirEntry[dirCount].bits. |
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| 504 | page_frame_address << 12); |
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| 505 | |
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| 506 | maxPage = MAX_ENTRY; |
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| 507 | /*if ( dirCount == (directoryEntry-1)) |
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| 508 | maxPage = tableEntry;*/ |
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| 509 | for (pageCount = 0; pageCount < maxPage; pageCount++) { |
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| 510 | |
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| 511 | if (localPageTable->pageTableEntry[pageCount].bits.present != 0){ |
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| 512 | if (prevPresent == 0){ |
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| 513 | prevPresent = 1; |
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| 514 | printk ("present page from address %x \n", ((dirCount << 22)|(pageCount << 12))); |
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| 515 | } |
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| 516 | if (prevCache != localPageTable->pageTableEntry[pageCount].bits.cache_disable ) { |
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| 517 | prevCache = localPageTable->pageTableEntry[pageCount]. |
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| 518 | bits.cache_disable; |
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| 519 | printk (" cache %s from %x <phy %x>\n", |
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| 520 | (prevCache ? "DISABLE" : "ENABLE "), |
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| 521 | ((dirCount << 22)|(pageCount << 12)), |
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| 522 | localPageTable->pageTableEntry[pageCount].bits.page_frame_address << 12); |
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| 523 | } |
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| 524 | } |
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| 525 | else { |
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| 526 | if (prevPresent == 1){ |
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| 527 | prevPresent = 0; |
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| 528 | printk ("Absent from %x \n", ((dirCount << 22)|(pageCount << 12))); |
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| 529 | } |
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| 530 | } |
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| 531 | } |
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| 532 | } |
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| 533 | if (pagingWasEnabled) |
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| 534 | _CPU_enable_paging(); |
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| 535 | return 0; |
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| 536 | |
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| 537 | } |
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| 538 | |
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| 539 | |
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| 540 | |
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| 541 | |
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| 542 | |
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