source: rtems/c/src/lib/libcpu/i386/displayCpu.c @ b1ce6f29

4.115
Last change on this file since b1ce6f29 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 6.0 KB
Line 
1/*  displayCpu.c
2 *
3 *  This file contains code for displaying the Intel Cpu identification
4 *  that has been performed by checkCPUtypeSetCr0 function.
5 *
6 *  This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com>
7 *  to define more capability bits, pick up more CPU model information,
8 *  and add more model strings. --joel (April 2010)
9 *
10 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
11 *  COPYRIGHT (c) 2010 OAR Corporation
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.com/license/LICENSE.
16 */
17
18/*
19 * Tell us the machine setup..
20 */
21#include <stdio.h>
22#include <libcpu/cpu.h>
23#include <string.h>
24#include <libcpu/cpuModel.h>
25#include <rtems/bspIo.h>
26#include <rtems.h>
27
28unsigned char Cx86_step = 0;
29
30static const char *Cx86_type[] = {
31  "unknown", "1.3", "1.4", "1.5", "1.6",
32  "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
33  };
34
35static const char *i486model(unsigned int nr)
36{
37  static const char *model[] = {
38    "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB",
39    "10","11","12","13","Am5x86-WT","Am5x86-WB"
40  };
41
42  if (nr < sizeof(model)/sizeof(char *))
43    return model[nr];
44  return NULL;
45}
46
47static const char * i586model(unsigned int nr)
48{
49  static const char *model[] = {
50    "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83",
51    "Pentium MMX", NULL, NULL, "Mobile Pentium 75+",
52    "Mobile Pentium MMX"
53  };
54  if (nr < sizeof(model)/sizeof(char *))
55    return model[nr];
56  return NULL;
57}
58
59static const char *Cx86model(void)
60{
61  unsigned char nr6x86 = 0;
62  static const char *model[] = {
63    "unknown", "6x86", "6x86L", "6x86MX", "MII"
64  };
65
66  switch (x86) {
67    case 5:
68      /* cx8 flag only on 6x86L */
69      nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1);
70      break;
71    case 6:
72      nr6x86 = 3;
73      break;
74    default:
75      nr6x86 = 0;
76  }
77
78  /* We must get the stepping number by reading DIR1 */
79  outport_byte(0x22,0xff);
80  inport_byte(0x23, x86_mask);
81  switch (x86_mask) {
82    case 0x03:
83      Cx86_step =  1;  /* 6x86MX Rev 1.3 */
84      break;
85    case 0x04:
86      Cx86_step =  2;  /* 6x86MX Rev 1.4 */
87      break;
88    case 0x05:
89      Cx86_step =  3;  /* 6x86MX Rev 1.5 */
90      break;
91    case 0x06:
92      Cx86_step =  4;  /* 6x86MX Rev 1.6 */
93      break;
94    case 0x14:
95      Cx86_step =  5;  /* 6x86 Rev 2.4 */
96      break;
97    case 0x15:
98      Cx86_step =  6;  /* 6x86 Rev 2.5 */
99      break;
100    case 0x16:
101      Cx86_step =  7;  /* 6x86 Rev 2.6 */
102      break;
103    case 0x17:
104      Cx86_step =  8;  /* 6x86 Rev 2.7 or 3.7 */
105      break;
106    case 0x22:
107      Cx86_step =  9;  /* 6x86L Rev 4.2 */
108      break;
109    default:
110      Cx86_step = 0;
111  }
112  return model[nr6x86];
113}
114
115static const char * i686model(unsigned int nr)
116{
117  static const char *model[] = {
118    "PPro A-step",
119    "Pentium Pro"
120  };
121  if (nr < sizeof(model)/sizeof(char *))
122    return model[nr];
123  return NULL;
124}
125
126struct cpu_model_info {
127  int x86;
128  char *model_names[16];
129};
130
131static struct cpu_model_info amd_models[] = {
132  { 4,
133    { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4",
134      "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }},
135  { 5,
136    { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)",
137      "K5 (PR-166)", "K5 (PR-200)", NULL, NULL,
138      "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)",
139      "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }},
140};
141
142static const char * AMDmodel(void)
143{
144  const char *p=NULL;
145  int i;
146
147  if (x86_model < 16)
148    for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++)
149      if (amd_models[i].x86 == x86) {
150        p = amd_models[i].model_names[(int)x86_model];
151        break;
152      }
153  return p;
154}
155
156static const char * getmodel(int x86, int model)
157{
158  const char *p = NULL;
159  static char nbuf[12];
160
161  if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
162    p = Cx86model();
163  else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
164    p = AMDmodel();
165  else {
166    switch (x86) {
167      case 4:
168        p = i486model(model);
169        break;
170      case 5:
171        p = i586model(model);
172        break;
173      case 6:
174        p = i686model(model);
175        break;
176    }
177  }
178  if (p)
179    return p;
180
181  sprintf(nbuf, "%d", model);
182  return nbuf;
183}
184
185void printCpuInfo(void)
186{
187  int i,j;
188  static const char *x86_cap_flags[] = {
189    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
190    "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov",
191    "pat", "pse36", "psn", "cflsh", "20", "ds", "acpi", "mmx",
192    "fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe"
193  };
194  static const char *x86_cap_x_flags[] = {
195    "sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est",
196    "tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm",
197    "16",  "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt"
198    "24",  "aesni", "xsave", "xsave", "avx", "29", "30", "31"
199  };
200
201  printk("cpu         : %c86\n", x86+'0');
202  printk("model       : %s\n",
203   have_cpuid ? getmodel(x86, x86_model) : "unknown");
204  if (x86_vendor_id [0] == '\0')
205    strcpy(x86_vendor_id, "unknown");
206  printk("vendor_id   : %s\n", x86_vendor_id);
207
208  if (x86_mask) {
209    if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
210      printk("stepping    : %d\n", x86_mask);
211    }
212    else {       /* we have a Cyrix */
213      printk("stepping    : %s\n", Cx86_type[Cx86_step]);
214    }
215  } else
216    printk("stepping    : unknown\n");
217
218  printk("fpu         : %s\n", (hard_math ? "yes" : "no"));
219  printk("cpuid       : %s\n", (have_cpuid ? "yes" : "no"));
220  printk("flags       :");
221  for ( i = j = 0 ; i < 32 ; i++ ) {
222    if ( x86_capability & (1 << i) ) {
223      if ( j && 0 == (j & 7) )
224    printk("\n             ");
225      printk(" %s", x86_cap_flags[i]);
226      j++;
227    }
228  }
229  printk("\n");
230  printk("flags (ext.):");
231  for ( i = j = 0 ; i < 32 ; i++ ) {
232    if ( x86_capability_x & (1 << i) ) {
233      if ( j && 0 == (j & 7) )
234    printk("\n             ");
235      printk(" %s", x86_cap_x_flags[i]);
236      j++;
237    }
238  }
239  printk("\n");
240  printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx);
241  printk( "x86_capability_cores=0x%08x\n", x86_capability_cores);
242}
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