source: rtems/c/src/lib/libcpu/i386/displayCpu.c @ a3579d3b

4.115
Last change on this file since a3579d3b was 9e95e54, checked in by Joel Sherrill <joel.sherrill@…>, on 04/15/10 at 14:09:57

2010-04-15 Joel Sherrill <joel.sherrill@…>

  • cpuModel.S, cpuModel.h, displayCpu.c: Update to include more reserved bits and pick out a bit more information.
  • Property mode set to 100644
File size: 6.1 KB
Line 
1/*  displayCpu.c
2 *
3 *  This file contains code for displaying the Intel Cpu identification
4 *  that has been performed by checkCPUtypeSetCr0 function.
5 *
6 *  This file was updated by Joel Sherrill <joel.sherrill@oarcorp.com>
7 *  to define more capability bits, pick up more CPU model information,
8 *  and add more model strings. --joel (April 2010)
9 *
10 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
11 *  COPYRIGHT (c) 2010 OAR Corporation
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.com/license/LICENSE.
16 *
17 *  $Id$
18 */
19
20/*
21 * Tell us the machine setup..
22 */
23#include <stdio.h>
24#include <libcpu/cpu.h>
25#include <string.h>
26#include <libcpu/cpuModel.h>
27#include <rtems/bspIo.h>
28#include <rtems.h>
29
30unsigned char Cx86_step = 0;
31
32static const char *Cx86_type[] = {
33  "unknown", "1.3", "1.4", "1.5", "1.6",
34  "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
35  };
36
37static const char *i486model(unsigned int nr)
38{
39  static const char *model[] = {
40    "0","DX","SX","DX/2","4","SX/2","6","DX/2-WB","DX/4","DX/4-WB",
41    "10","11","12","13","Am5x86-WT","Am5x86-WB"
42  };
43
44  if (nr < sizeof(model)/sizeof(char *))
45    return model[nr];
46  return NULL;
47}
48
49static const char * i586model(unsigned int nr)
50{
51  static const char *model[] = {
52    "0", "Pentium 60/66","Pentium 75+","OverDrive PODP5V83",
53    "Pentium MMX", NULL, NULL, "Mobile Pentium 75+",
54    "Mobile Pentium MMX"
55  };
56  if (nr < sizeof(model)/sizeof(char *))
57    return model[nr];
58  return NULL;
59}
60
61static const char *Cx86model(void)
62{
63  unsigned char nr6x86 = 0;
64  static const char *model[] = {
65    "unknown", "6x86", "6x86L", "6x86MX", "MII"
66  };
67
68  switch (x86) {
69    case 5:
70      /* cx8 flag only on 6x86L */
71      nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1);
72      break;
73    case 6:
74      nr6x86 = 3;
75      break;
76    default:
77      nr6x86 = 0;
78  }
79
80  /* We must get the stepping number by reading DIR1 */
81  outport_byte(0x22,0xff);
82  inport_byte(0x23, x86_mask);
83  switch (x86_mask) {
84    case 0x03:
85      Cx86_step =  1;  /* 6x86MX Rev 1.3 */
86      break;
87    case 0x04:
88      Cx86_step =  2;  /* 6x86MX Rev 1.4 */
89      break;
90    case 0x05:
91      Cx86_step =  3;  /* 6x86MX Rev 1.5 */
92      break;
93    case 0x06:
94      Cx86_step =  4;  /* 6x86MX Rev 1.6 */
95      break;
96    case 0x14:
97      Cx86_step =  5;  /* 6x86 Rev 2.4 */
98      break;
99    case 0x15:
100      Cx86_step =  6;  /* 6x86 Rev 2.5 */
101      break;
102    case 0x16:
103      Cx86_step =  7;  /* 6x86 Rev 2.6 */
104      break;
105    case 0x17:
106      Cx86_step =  8;  /* 6x86 Rev 2.7 or 3.7 */
107      break;
108    case 0x22:
109      Cx86_step =  9;  /* 6x86L Rev 4.2 */
110      break;
111    default:
112      Cx86_step = 0;
113  }
114  return model[nr6x86];
115}
116
117static const char * i686model(unsigned int nr)
118{
119  static const char *model[] = {
120    "PPro A-step",
121    "Pentium Pro"
122  };
123  if (nr < sizeof(model)/sizeof(char *))
124    return model[nr];
125  return NULL;
126}
127
128struct cpu_model_info {
129  int x86;
130  char *model_names[16];
131};
132
133static struct cpu_model_info amd_models[] = {
134  { 4,
135    { NULL, NULL, NULL, "DX/2", NULL, NULL, NULL, "DX/2-WB", "DX/4",
136      "DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT", "Am5x86-WB" }},
137  { 5,
138    { "K5/SSA5 (PR-75, PR-90, PR-100)", "K5 (PR-120, PR-133)",
139      "K5 (PR-166)", "K5 (PR-200)", NULL, NULL,
140      "K6 (166 - 266)", "K6 (166 - 300)", "K6-2 (200 - 450)",
141      "K6-3D-Plus (200 - 450)", NULL, NULL, NULL, NULL, NULL, NULL }},
142};
143
144static const char * AMDmodel(void)
145{
146  const char *p=NULL;
147  int i;
148
149  if (x86_model < 16)
150    for (i=0; i<sizeof(amd_models)/sizeof(struct cpu_model_info); i++)
151      if (amd_models[i].x86 == x86) {
152        p = amd_models[i].model_names[(int)x86_model];
153        break;
154      }
155  return p;
156}
157
158static const char * getmodel(int x86, int model)
159{
160  const char *p = NULL;
161  static char nbuf[12];
162
163  if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
164    p = Cx86model();
165  else if(strcmp(x86_vendor_id, "AuthenticAMD")==0)
166    p = AMDmodel();
167  else {
168    switch (x86) {
169      case 4:
170        p = i486model(model);
171        break;
172      case 5:
173        p = i586model(model);
174        break;
175      case 6:
176        p = i686model(model);
177        break;
178    }
179  }
180  if (p)
181    return p;
182
183  sprintf(nbuf, "%d", model);
184  return nbuf;
185}
186
187void printCpuInfo(void)
188{
189  int i,j;
190  static const char *x86_cap_flags[] = {
191    "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
192    "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov",
193    "pat", "pse36", "psn", "cflsh", "20", "ds", "acpi", "mmx",
194    "fxsr", "sse", "sse2", "ss", "htt", "tm", "30", "pbe"
195  };
196  static const char *x86_cap_x_flags[] = {
197    "sse3", "pclmulqdq", "dtes64", "monitor", "ds-cpl", "vmx", "smx", "est",
198    "tm2", "ssse3", "cnxt-id", "11", "12", "cmpxchg16b", "xtpr", "pdcm",
199    "16",  "pcid", "dca", "sse4.1", "sse4.2", "x2APIC", "movbe", "popcnt"
200    "24",  "aesni", "xsave", "xsave", "avx", "29", "30", "31"
201  };
202
203  printk("cpu         : %c86\n", x86+'0');
204  printk("model       : %s\n",
205   have_cpuid ? getmodel(x86, x86_model) : "unknown");
206  if (x86_vendor_id [0] == '\0')
207    strcpy(x86_vendor_id, "unknown");
208  printk("vendor_id   : %s\n", x86_vendor_id);
209
210  if (x86_mask) {
211    if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
212      printk("stepping    : %d\n", x86_mask);
213    }
214    else {       /* we have a Cyrix */
215      printk("stepping    : %s\n", Cx86_type[Cx86_step]);
216    }
217  } else
218    printk("stepping    : unknown\n");
219
220  printk("fpu         : %s\n", (hard_math ? "yes" : "no"));
221  printk("cpuid       : %s\n", (have_cpuid ? "yes" : "no"));
222  printk("flags       :");
223  for ( i = j = 0 ; i < 32 ; i++ ) {
224    if ( x86_capability & (1 << i) ) {
225      if ( j && 0 == (j & 7) )
226    printk("\n             ");
227      printk(" %s", x86_cap_flags[i]);
228      j++;
229    }
230  }
231  printk("\n");
232  printk("flags (ext.):");
233  for ( i = j = 0 ; i < 32 ; i++ ) {
234    if ( x86_capability_x & (1 << i) ) {
235      if ( j && 0 == (j & 7) )
236    printk("\n             ");
237      printk(" %s", x86_cap_x_flags[i]);
238      j++;
239    }
240  }
241  printk("\n");
242  printk( "x86_capability_ebx=0x%08x\n", x86_capability_ebx);
243  printk( "x86_capability_cores=0x%08x\n", x86_capability_cores);
244}
Note: See TracBrowser for help on using the repository browser.