source: rtems/c/src/lib/libcpu/i386/cpu_asm.S @ b2b4835

4.104.114.84.95
Last change on this file since b2b4835 was 67a2288, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 23, 1998 at 10:02:34 PM

Patch from Eric VALETTE <valette@…>:

Here is a enhanced version of my previous patch. This patch enables
to potentially share the new interrupt management code for all Intel targets
(pc386, go32 and force386) bsp.

Note : this patch is complete only for pc386. It still needs to

be completed for go32 and force386. I carrefully checked
that anything needed is in for force386 (only some function
name changes for IDT manipulation and GDT segment
manipulation). But anyway I will not be able to test any
of theses targets...

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*  cpu_asm.S
2 *
3 *  This file contains all assembly code for the Intel i386 IDT
4 *  manipulation.
5 *
6 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  $Id$
13 */
14
15#include <asm.h>
16
17BEGIN_CODE
18/*
19 * C callable function enabling to get easilly usable info from
20 * the actual value of IDT register.
21 *
22extern void i386_get_info_from_IDTR (interrupt_gate_descriptor** table,
23                                     unsigned* limit);
24 */
25PUBLIC (i386_get_info_from_IDTR)
26PUBLIC (i386_set_IDTR)
27PUBLIC (i386_get_info_from_GDTR)
28PUBLIC (i386_set_GDTR)
29               
30SYM (i386_get_info_from_IDTR):
31        movl    4(esp), ecx         /* get location where table address */
32                                    /*    must be stored */
33        movl    8(esp), edx         /* get location table size must be stored */
34
35        subl    $6, esp             /* let room to prepare 48 bit IDTR */
36
37        sidt    (esp)               /* get 48 bit IDTR value */
38
39        movl    2(esp), eax         /* get base */
40        movl    eax, (ecx)
41
42        movzwl  (esp), eax          /* get limit */
43        movl    eax, (edx)
44
45        addl    $6, esp             /* restore %esp */
46        ret
47
48/*
49 * C callable function enabling to change the value of IDT register. Must be called
50 * with inmterrupt masked at processor level!!!.
51 *
52extern void i386_set_IDTR (interrupt_gate_descriptor* table,
53                           unsigned limit);
54 */
55SYM (i386_set_IDTR):                   
56
57        leal    4(esp), edx         /* load in edx address of input */
58                                    /*    parameter "table" */
59
60        movl    (edx), eax          /* load base into eax */
61        movl    4(edx), ecx         /* load limit into ecx */
62
63        movw    cx, (edx)           /* prepare 48 bit pointer */
64        movl    eax, 2(edx)
65
66        lidt    (edx)
67
68        ret
69/*
70 *
71 * C callable function enabling to get easilly usable info from
72 * the actual value of GDT register.
73extern void i386_get_info_from_GDTR (segment_descriptors** table,
74                                     unsigned* limit);
75 */
76       
77SYM (i386_get_info_from_GDTR): 
78        movl    4(esp), ecx         /* get location where table address */
79                                    /*    must be stored */
80        movl    8(esp), edx         /* get location table size must be stored */
81
82        subl    $6, esp             /* let room to prepare 48 bit GDTR */
83
84        sgdt    (esp)               /* get 48 bit GDTR value */
85
86        movl    2(esp), eax         /* get base */
87        movl    eax, (ecx)
88
89        movzwl  (esp), eax          /* get limit */
90        movl    eax, (edx)
91
92        addl    $6, esp             /* restore %esp */
93        ret
94
95/*
96 * C callable function enabling to change the value of GDT register.
97 * Must be called with interrupts masked at processor level!!!.
98 *   extern void i386_set_GDTR (segment_descriptors*, unsigned limit);
99 */
100SYM (i386_set_GDTR):                   
101
102        leal    4(esp), edx         /* load in edx address of input */
103                                    /*   parameter "table" */
104
105        movl    (edx), eax          /* load base into eax */
106        movl    4(edx), ecx         /* load limit into ecx */
107
108        movw    cx, (edx)           /* prepare 48 bit pointer */
109        movl    eax, 2(edx)
110
111        lgdt    (edx)
112
113        ret
114               
115END_CODE
116
117END
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