1 | /* |
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2 | * cpu.h - This file contains definitions for data structure related |
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3 | * to Intel system programming. More information can be found |
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4 | * on Intel site and more precisely in the following book : |
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5 | * |
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6 | * Pentium Processor familly |
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7 | * Developper's Manual |
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8 | * |
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9 | * Volume 3 : Architecture and Programming Manual |
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10 | * |
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11 | * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) |
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12 | * Canon Centre Recherche France. |
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13 | * |
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14 | * The license and distribution terms for this file may be |
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15 | * found in the file LICENSE in this distribution or at |
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16 | * http://www.rtems.org/license/LICENSE. |
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17 | */ |
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18 | |
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19 | #ifndef _LIBCPU_i386_CPU_H |
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20 | #define _LIBCPU_i386_CPU_H |
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21 | |
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22 | #include <rtems/score/registers.h> |
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23 | |
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24 | #ifndef ASM |
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25 | |
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26 | /* |
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27 | * Interrupt Level Macros |
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28 | */ |
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29 | #include <rtems/score/interrupts.h> |
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30 | |
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31 | /* |
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32 | * Segment Access Routines |
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33 | * |
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34 | * NOTE: Unfortunately, these are still static inlines even when the |
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35 | * "macro" implementation of the generic code is used. |
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36 | */ |
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37 | |
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38 | static __inline__ unsigned short i386_get_cs(void) |
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39 | { |
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40 | register unsigned short segment = 0; |
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41 | |
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42 | __asm__ volatile ( "movw %%cs,%0" : "=r" (segment) : "0" (segment) ); |
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43 | |
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44 | return segment; |
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45 | } |
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46 | |
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47 | static __inline__ unsigned short i386_get_ds(void) |
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48 | { |
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49 | register unsigned short segment = 0; |
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50 | |
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51 | __asm__ volatile ( "movw %%ds,%0" : "=r" (segment) : "0" (segment) ); |
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52 | |
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53 | return segment; |
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54 | } |
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55 | |
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56 | static __inline__ unsigned short i386_get_es(void) |
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57 | { |
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58 | register unsigned short segment = 0; |
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59 | |
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60 | __asm__ volatile ( "movw %%es,%0" : "=r" (segment) : "0" (segment) ); |
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61 | |
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62 | return segment; |
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63 | } |
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64 | |
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65 | static __inline__ unsigned short i386_get_ss(void) |
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66 | { |
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67 | register unsigned short segment = 0; |
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68 | |
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69 | __asm__ volatile ( "movw %%ss,%0" : "=r" (segment) : "0" (segment) ); |
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70 | |
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71 | return segment; |
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72 | } |
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73 | |
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74 | static __inline__ unsigned short i386_get_fs(void) |
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75 | { |
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76 | register unsigned short segment = 0; |
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77 | |
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78 | __asm__ volatile ( "movw %%fs,%0" : "=r" (segment) : "0" (segment) ); |
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79 | |
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80 | return segment; |
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81 | } |
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82 | |
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83 | static __inline__ unsigned short i386_get_gs(void) |
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84 | { |
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85 | register unsigned short segment = 0; |
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86 | |
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87 | __asm__ volatile ( "movw %%gs,%0" : "=r" (segment) : "0" (segment) ); |
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88 | |
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89 | return segment; |
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90 | } |
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91 | |
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92 | /* |
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93 | * IO Port Access Routines |
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94 | */ |
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95 | |
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96 | #define i386_outport_byte( _port, _value ) \ |
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97 | do { register unsigned short __port = _port; \ |
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98 | register unsigned char __value = _value; \ |
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99 | \ |
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100 | __asm__ volatile ( "outb %0,%1" : : "a" (__value), "d" (__port) ); \ |
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101 | } while (0) |
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102 | |
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103 | #define i386_outport_word( _port, _value ) \ |
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104 | do { register unsigned short __port = _port; \ |
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105 | register unsigned short __value = _value; \ |
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106 | \ |
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107 | __asm__ volatile ( "outw %0,%1" : : "a" (__value), "d" (__port) ); \ |
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108 | } while (0) |
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109 | |
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110 | #define i386_outport_long( _port, _value ) \ |
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111 | do { register unsigned short __port = _port; \ |
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112 | register unsigned int __value = _value; \ |
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113 | \ |
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114 | __asm__ volatile ( "outl %0,%1" : : "a" (__value), "d" (__port) ); \ |
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115 | } while (0) |
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116 | |
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117 | #define i386_inport_byte( _port, _value ) \ |
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118 | do { register unsigned short __port = _port; \ |
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119 | register unsigned char __value = 0; \ |
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120 | \ |
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121 | __asm__ volatile ( "inb %1,%0" : "=a" (__value) \ |
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122 | : "d" (__port) \ |
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123 | ); \ |
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124 | _value = __value; \ |
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125 | } while (0) |
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126 | |
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127 | #define i386_inport_word( _port, _value ) \ |
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128 | do { register unsigned short __port = _port; \ |
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129 | register unsigned short __value = 0; \ |
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130 | \ |
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131 | __asm__ volatile ( "inw %1,%0" : "=a" (__value) \ |
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132 | : "d" (__port) \ |
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133 | ); \ |
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134 | _value = __value; \ |
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135 | } while (0) |
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136 | |
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137 | #define i386_inport_long( _port, _value ) \ |
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138 | do { register unsigned short __port = _port; \ |
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139 | register unsigned int __value = 0; \ |
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140 | \ |
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141 | __asm__ volatile ( "inl %1,%0" : "=a" (__value) \ |
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142 | : "d" (__port) \ |
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143 | ); \ |
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144 | _value = __value; \ |
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145 | } while (0) |
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146 | |
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147 | /* |
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148 | * Type definition for raw interrupts. |
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149 | */ |
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150 | |
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151 | typedef unsigned char rtems_vector_offset; |
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152 | |
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153 | typedef struct __rtems_raw_irq_connect_data__{ |
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154 | /* |
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155 | * IDT vector offset (IRQ line + PC386_IRQ_VECTOR_BASE) |
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156 | */ |
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157 | rtems_vector_offset idtIndex; |
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158 | /* |
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159 | * IDT raw handler. See comment on handler properties below in function prototype. |
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160 | */ |
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161 | rtems_raw_irq_hdl hdl; |
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162 | /* |
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163 | * function for enabling raw interrupts. In order to be consistent |
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164 | * with the fact that the raw connexion can defined in the |
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165 | * libcpu library, this library should have no knowledge of |
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166 | * board specific hardware to manage interrupts and thus the |
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167 | * "on" routine must enable the irq both at device and PIC level. |
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168 | * |
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169 | */ |
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170 | rtems_raw_irq_enable on; |
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171 | /* |
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172 | * function for disabling raw interrupts. In order to be consistent |
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173 | * with the fact that the raw connexion can defined in the |
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174 | * libcpu library, this library should have no knowledge of |
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175 | * board specific hardware to manage interrupts and thus the |
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176 | * "on" routine must disable the irq both at device and PIC level. |
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177 | * |
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178 | */ |
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179 | rtems_raw_irq_disable off; |
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180 | /* |
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181 | * function enabling to know what interrupt may currently occur |
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182 | */ |
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183 | rtems_raw_irq_is_enabled isOn; |
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184 | }rtems_raw_irq_connect_data; |
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185 | |
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186 | typedef struct { |
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187 | /* |
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188 | * size of all the table fields (*Tbl) described below. |
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189 | */ |
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190 | unsigned int idtSize; |
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191 | /* |
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192 | * Default handler used when disconnecting interrupts. |
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193 | */ |
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194 | rtems_raw_irq_connect_data defaultRawEntry; |
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195 | /* |
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196 | * Table containing initials/current value. |
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197 | */ |
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198 | rtems_raw_irq_connect_data* rawIrqHdlTbl; |
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199 | }rtems_raw_irq_global_settings; |
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200 | |
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201 | #include <rtems/score/idtr.h> |
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202 | |
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203 | /* |
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204 | * C callable function enabling to get handler currently connected to a vector |
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205 | * |
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206 | */ |
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207 | rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset); |
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208 | |
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209 | /* |
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210 | * C callable function enabling to set up one raw idt entry |
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211 | */ |
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212 | extern int i386_set_idt_entry (const rtems_raw_irq_connect_data*); |
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213 | |
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214 | /* |
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215 | * C callable function enabling to get one current raw idt entry |
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216 | */ |
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217 | extern int i386_get_current_idt_entry (rtems_raw_irq_connect_data*); |
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218 | |
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219 | /* |
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220 | * C callable function enabling to remove one current raw idt entry |
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221 | */ |
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222 | extern int i386_delete_idt_entry (const rtems_raw_irq_connect_data*); |
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223 | |
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224 | /* |
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225 | * C callable function enabling to init idt. |
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226 | * |
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227 | * CAUTION : this function assumes that the IDTR register |
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228 | * has been already set. |
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229 | */ |
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230 | extern int i386_init_idt (rtems_raw_irq_global_settings* config); |
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231 | |
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232 | /* |
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233 | * C callable function enabling to get actual idt configuration |
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234 | */ |
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235 | extern int i386_get_idt_config (rtems_raw_irq_global_settings** config); |
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236 | |
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237 | |
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238 | /* |
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239 | * See page 11.12 Figure 11-8. |
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240 | * |
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241 | */ |
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242 | |
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243 | typedef struct { |
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244 | unsigned int limit_15_0 : 16; |
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245 | unsigned int base_address_15_0 : 16; |
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246 | unsigned int base_address_23_16 : 8; |
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247 | unsigned int type : 4; |
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248 | unsigned int descriptor_type : 1; |
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249 | unsigned int privilege : 2; |
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250 | unsigned int present : 1; |
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251 | unsigned int limit_19_16 : 4; |
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252 | unsigned int available : 1; |
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253 | unsigned int fixed_value_bits : 1; |
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254 | unsigned int operation_size : 1; |
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255 | unsigned int granularity : 1; |
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256 | unsigned int base_address_31_24 : 8; |
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257 | }segment_descriptors; |
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258 | |
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259 | /* |
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260 | * C callable function enabling to get easilly usable info from |
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261 | * the actual value of GDT register. |
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262 | */ |
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263 | extern void i386_get_info_from_GDTR (segment_descriptors** table, |
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264 | unsigned* limit); |
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265 | /* |
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266 | * C callable function enabling to change the value of GDT register. Must be called |
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267 | * with interrupts masked at processor level!!!. |
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268 | */ |
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269 | extern void i386_set_GDTR (segment_descriptors*, |
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270 | unsigned limit); |
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271 | |
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272 | /* |
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273 | * C callable function enabling to set up one raw interrupt handler |
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274 | */ |
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275 | extern int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, |
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276 | unsigned limit); |
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277 | |
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278 | /* |
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279 | * See page 11.18 Figure 11-12. |
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280 | * |
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281 | */ |
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282 | |
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283 | typedef struct { |
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284 | unsigned int offset : 12; |
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285 | unsigned int page : 10; |
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286 | unsigned int directory : 10; |
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287 | }la_bits; |
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288 | |
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289 | typedef union { |
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290 | la_bits bits; |
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291 | unsigned int address; |
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292 | }linear_address; |
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293 | |
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294 | |
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295 | /* |
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296 | * See page 11.20 Figure 11-14. |
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297 | * |
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298 | */ |
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299 | |
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300 | typedef struct { |
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301 | unsigned int present : 1; |
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302 | unsigned int writable : 1; |
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303 | unsigned int user : 1; |
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304 | unsigned int write_through : 1; |
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305 | unsigned int cache_disable : 1; |
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306 | unsigned int accessed : 1; |
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307 | unsigned int reserved1 : 1; |
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308 | unsigned int page_size : 1; |
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309 | unsigned int reserved2 : 1; |
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310 | unsigned int available : 3; |
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311 | unsigned int page_frame_address : 20; |
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312 | }page_dir_bits; |
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313 | |
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314 | typedef union { |
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315 | page_dir_bits bits; |
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316 | unsigned int dir_entry; |
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317 | }page_dir_entry; |
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318 | |
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319 | typedef struct { |
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320 | unsigned int present : 1; |
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321 | unsigned int writable : 1; |
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322 | unsigned int user : 1; |
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323 | unsigned int write_through : 1; |
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324 | unsigned int cache_disable : 1; |
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325 | unsigned int accessed : 1; |
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326 | unsigned int dirty : 1; |
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327 | unsigned int reserved2 : 2; |
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328 | unsigned int available : 3; |
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329 | unsigned int page_frame_address : 20; |
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330 | }page_table_bits; |
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331 | |
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332 | typedef union { |
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333 | page_table_bits bits; |
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334 | unsigned int table_entry; |
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335 | } page_table_entry; |
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336 | |
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337 | /* |
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338 | * definitions related to page table entry |
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339 | */ |
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340 | #define PG_SIZE 0x1000 |
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341 | #define MASK_OFFSET 0xFFF |
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342 | #define MAX_ENTRY (PG_SIZE/sizeof(page_dir_entry)) |
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343 | #define FOUR_MB 0x400000 |
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344 | #define MASK_FLAGS 0x1A |
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345 | |
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346 | #define PTE_PRESENT 0x01 |
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347 | #define PTE_WRITABLE 0x02 |
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348 | #define PTE_USER 0x04 |
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349 | #define PTE_WRITE_THROUGH 0x08 |
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350 | #define PTE_CACHE_DISABLE 0x10 |
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351 | |
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352 | typedef struct { |
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353 | page_dir_entry pageDirEntry[MAX_ENTRY]; |
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354 | } page_directory; |
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355 | |
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356 | typedef struct { |
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357 | page_table_entry pageTableEntry[MAX_ENTRY]; |
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358 | } page_table; |
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359 | |
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360 | |
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361 | /* C declaration for paging management */ |
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362 | |
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363 | extern int _CPU_is_cache_enabled(void); |
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364 | extern int _CPU_is_paging_enabled(void); |
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365 | extern int init_paging(void); |
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366 | extern void _CPU_enable_paging(void); |
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367 | extern void _CPU_disable_paging(void); |
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368 | extern void _CPU_disable_cache(void); |
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369 | extern void _CPU_enable_cache(void); |
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370 | extern int _CPU_map_phys_address |
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371 | (void **mappedAddress, void *physAddress, |
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372 | int size, int flag); |
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373 | extern int _CPU_unmap_virt_address (void *mappedAddress, int size); |
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374 | extern int _CPU_change_memory_mapping_attribute |
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375 | (void **newAddress, void *mappedAddress, |
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376 | unsigned int size, unsigned int flag); |
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377 | extern int _CPU_display_memory_attribute(void); |
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378 | |
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379 | # endif /* ASM */ |
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380 | |
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381 | #endif |
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