1 | /* |
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2 | * cpu.h - This file contains definitions for data structure related |
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3 | * to Intel system programming. More information can be found |
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4 | * on Intel site and more precisely in the following book : |
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5 | * |
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6 | * Pentium Processor familly |
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7 | * Developper's Manual |
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8 | * |
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9 | * Volume 3 : Architecture and Programming Manual |
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10 | * |
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11 | * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) |
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12 | * Canon Centre Recherche France. |
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13 | * |
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14 | * The license and distribution terms for this file may be |
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15 | * found in found in the file LICENSE in this distribution or at |
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16 | * http://www.OARcorp.com/rtems/license.html. |
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17 | * |
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18 | * $Id$ |
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19 | */ |
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20 | |
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21 | #ifndef _LIBCPU_i386_CPU_H |
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22 | #define _LIBCPU_i386_CPU_H |
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23 | |
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24 | #include <libcpu/registers.h> |
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25 | |
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26 | |
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27 | #ifndef ASM |
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28 | |
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29 | /* |
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30 | * Interrupt Level Macros |
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31 | */ |
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32 | |
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33 | #define i386_disable_interrupts( _level ) \ |
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34 | { \ |
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35 | _level = 0; /* avoids warnings */ \ |
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36 | asm volatile ( "pushf ; \ |
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37 | cli ; \ |
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38 | pop %0" \ |
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39 | : "=r" ((_level)) : "0" ((_level)) \ |
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40 | ); \ |
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41 | } |
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42 | |
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43 | #define i386_enable_interrupts( _level ) \ |
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44 | { \ |
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45 | asm volatile ( "push %0 ; \ |
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46 | popf" \ |
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47 | : "=r" ((_level)) : "0" ((_level)) \ |
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48 | ); \ |
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49 | } |
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50 | |
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51 | #define i386_flash_interrupts( _level ) \ |
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52 | { \ |
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53 | asm volatile ( "push %0 ; \ |
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54 | popf ; \ |
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55 | cli" \ |
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56 | : "=r" ((_level)) : "0" ((_level)) \ |
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57 | ); \ |
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58 | } |
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59 | |
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60 | #define i386_get_interrupt_level( _level ) \ |
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61 | do { \ |
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62 | register unsigned32 _eflags = 0; \ |
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63 | \ |
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64 | asm volatile ( "pushf ; \ |
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65 | pop %0" \ |
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66 | : "=r" ((_eflags)) : "0" ((_eflags)) \ |
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67 | ); \ |
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68 | \ |
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69 | _level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \ |
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70 | } while (0) |
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71 | |
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72 | #define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level ) |
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73 | #define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level ) |
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74 | |
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75 | /* |
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76 | * Segment Access Routines |
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77 | * |
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78 | * NOTE: Unfortunately, these are still static inlines even when the |
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79 | * "macro" implementation of the generic code is used. |
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80 | */ |
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81 | |
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82 | static inline unsigned short i386_get_cs() |
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83 | { |
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84 | register unsigned short segment = 0; |
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85 | |
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86 | asm volatile ( "movw %%cs,%0" : "=r" (segment) : "0" (segment) ); |
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87 | |
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88 | return segment; |
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89 | } |
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90 | |
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91 | static inline unsigned short i386_get_ds() |
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92 | { |
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93 | register unsigned short segment = 0; |
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94 | |
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95 | asm volatile ( "movw %%ds,%0" : "=r" (segment) : "0" (segment) ); |
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96 | |
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97 | return segment; |
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98 | } |
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99 | |
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100 | static inline unsigned short i386_get_es() |
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101 | { |
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102 | register unsigned short segment = 0; |
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103 | |
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104 | asm volatile ( "movw %%es,%0" : "=r" (segment) : "0" (segment) ); |
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105 | |
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106 | return segment; |
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107 | } |
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108 | |
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109 | static inline unsigned short i386_get_ss() |
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110 | { |
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111 | register unsigned short segment = 0; |
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112 | |
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113 | asm volatile ( "movw %%ss,%0" : "=r" (segment) : "0" (segment) ); |
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114 | |
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115 | return segment; |
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116 | } |
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117 | |
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118 | static inline unsigned short i386_get_fs() |
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119 | { |
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120 | register unsigned short segment = 0; |
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121 | |
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122 | asm volatile ( "movw %%fs,%0" : "=r" (segment) : "0" (segment) ); |
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123 | |
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124 | return segment; |
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125 | } |
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126 | |
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127 | static inline unsigned short i386_get_gs() |
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128 | { |
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129 | register unsigned short segment = 0; |
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130 | |
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131 | asm volatile ( "movw %%gs,%0" : "=r" (segment) : "0" (segment) ); |
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132 | |
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133 | return segment; |
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134 | } |
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135 | |
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136 | /* |
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137 | * IO Port Access Routines |
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138 | */ |
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139 | |
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140 | #define i386_outport_byte( _port, _value ) \ |
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141 | { register unsigned short __port = _port; \ |
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142 | register unsigned char __value = _value; \ |
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143 | \ |
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144 | asm volatile ( "outb %0,%1" : "=a" (__value), "=d" (__port) \ |
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145 | : "0" (__value), "1" (__port) \ |
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146 | ); \ |
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147 | } |
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148 | |
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149 | #define i386_outport_word( _port, _value ) \ |
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150 | { register unsigned short __port = _port; \ |
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151 | register unsigned short __value = _value; \ |
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152 | \ |
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153 | asm volatile ( "outw %0,%1" : "=a" (__value), "=d" (__port) \ |
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154 | : "0" (__value), "1" (__port) \ |
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155 | ); \ |
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156 | } |
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157 | |
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158 | #define i386_outport_long( _port, _value ) \ |
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159 | { register unsigned short __port = _port; \ |
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160 | register unsigned int __value = _value; \ |
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161 | \ |
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162 | asm volatile ( "outl %0,%1" : "=a" (__value), "=d" (__port) \ |
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163 | : "0" (__value), "1" (__port) \ |
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164 | ); \ |
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165 | } |
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166 | |
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167 | #define i386_inport_byte( _port, _value ) \ |
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168 | { register unsigned short __port = _port; \ |
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169 | register unsigned char __value = 0; \ |
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170 | \ |
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171 | asm volatile ( "inb %1,%0" : "=a" (__value), "=d" (__port) \ |
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172 | : "0" (__value), "1" (__port) \ |
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173 | ); \ |
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174 | _value = __value; \ |
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175 | } |
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176 | |
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177 | #define i386_inport_word( _port, _value ) \ |
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178 | { register unsigned short __port = _port; \ |
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179 | register unsigned short __value = 0; \ |
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180 | \ |
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181 | asm volatile ( "inw %1,%0" : "=a" (__value), "=d" (__port) \ |
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182 | : "0" (__value), "1" (__port) \ |
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183 | ); \ |
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184 | _value = __value; \ |
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185 | } |
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186 | |
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187 | #define i386_inport_long( _port, _value ) \ |
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188 | { register unsigned short __port = _port; \ |
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189 | register unsigned int __value = 0; \ |
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190 | \ |
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191 | asm volatile ( "inl %1,%0" : "=a" (__value), "=d" (__port) \ |
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192 | : "0" (__value), "1" (__port) \ |
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193 | ); \ |
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194 | _value = __value; \ |
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195 | } |
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196 | |
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197 | /* |
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198 | * Type definition for raw interrupts. |
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199 | */ |
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200 | |
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201 | typedef unsigned char rtems_vector_offset; |
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202 | |
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203 | struct __rtems_raw_irq_connect_data__; |
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204 | |
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205 | typedef void (*rtems_raw_irq_hdl) (void); |
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206 | typedef void (*rtems_raw_irq_enable) (const struct __rtems_raw_irq_connect_data__*); |
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207 | typedef void (*rtems_raw_irq_disable) (const struct __rtems_raw_irq_connect_data__*); |
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208 | typedef int (*rtems_raw_irq_is_enabled) (const struct __rtems_raw_irq_connect_data__*); |
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209 | |
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210 | typedef struct __rtems_raw_irq_connect_data__{ |
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211 | /* |
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212 | * IDT vector offset (IRQ line + PC386_IRQ_VECTOR_BASE) |
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213 | */ |
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214 | rtems_vector_offset idtIndex; |
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215 | /* |
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216 | * IDT raw handler. See comment on handler properties below in function prototype. |
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217 | */ |
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218 | rtems_raw_irq_hdl hdl; |
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219 | /* |
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220 | * function for enabling raw interrupts. In order to be consistent |
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221 | * with the fact that the raw connexion can defined in the |
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222 | * libcpu library, this library should have no knowledge of |
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223 | * board specific hardware to manage interrupts and thus the |
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224 | * "on" routine must enable the irq both at device and PIC level. |
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225 | * |
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226 | */ |
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227 | rtems_raw_irq_enable on; |
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228 | /* |
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229 | * function for disabling raw interrupts. In order to be consistent |
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230 | * with the fact that the raw connexion can defined in the |
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231 | * libcpu library, this library should have no knowledge of |
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232 | * board specific hardware to manage interrupts and thus the |
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233 | * "on" routine must disable the irq both at device and PIC level. |
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234 | * |
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235 | */ |
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236 | rtems_raw_irq_disable off; |
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237 | /* |
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238 | * function enabling to know what interrupt may currently occur |
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239 | */ |
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240 | rtems_raw_irq_is_enabled isOn; |
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241 | }rtems_raw_irq_connect_data; |
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242 | |
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243 | typedef struct { |
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244 | /* |
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245 | * size of all the table fields (*Tbl) described below. |
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246 | */ |
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247 | unsigned int idtSize; |
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248 | /* |
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249 | * Default handler used when disconnecting interrupts. |
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250 | */ |
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251 | rtems_raw_irq_connect_data defaultRawEntry; |
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252 | /* |
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253 | * Table containing initials/current value. |
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254 | */ |
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255 | rtems_raw_irq_connect_data* rawIrqHdlTbl; |
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256 | }rtems_raw_irq_global_settings; |
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257 | |
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258 | /* |
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259 | * See page 14.9 Figure 14-2. |
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260 | * |
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261 | */ |
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262 | typedef struct { |
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263 | unsigned int low_offsets_bits : 16; |
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264 | unsigned int segment_selector : 16; |
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265 | unsigned int fixed_value_bits : 8; |
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266 | unsigned int gate_type : 5; |
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267 | unsigned int privilege : 2; |
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268 | unsigned int present : 1; |
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269 | unsigned int high_offsets_bits: 16; |
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270 | }interrupt_gate_descriptor; |
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271 | |
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272 | |
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273 | /* |
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274 | * C callable function enabling to create a interrupt_gate_descriptor |
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275 | */ |
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276 | void create_interrupt_gate_descriptor (interrupt_gate_descriptor*, rtems_raw_irq_hdl); |
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277 | |
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278 | /* |
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279 | * C callable function enabling to get handler currently connected to a vector |
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280 | * |
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281 | */ |
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282 | rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset); |
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283 | |
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284 | /* |
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285 | * C callable function enabling to get easilly usable info from |
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286 | * the actual value of IDT register. |
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287 | */ |
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288 | extern void i386_get_info_from_IDTR (interrupt_gate_descriptor** table, |
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289 | unsigned* limit); |
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290 | /* |
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291 | * C callable function enabling to change the value of IDT register. Must be called |
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292 | * with interrupts masked at processor level!!!. |
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293 | */ |
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294 | extern void i386_set_IDTR (interrupt_gate_descriptor* table, |
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295 | unsigned limit); |
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296 | |
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297 | /* |
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298 | * C callable function enabling to set up one raw idt entry |
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299 | */ |
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300 | extern int i386_set_idt_entry (const rtems_raw_irq_connect_data*); |
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301 | |
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302 | /* |
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303 | * C callable function enabling to get one current raw idt entry |
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304 | */ |
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305 | extern int i386_get_current_idt_entry (rtems_raw_irq_connect_data*); |
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306 | |
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307 | /* |
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308 | * C callable function enabling to remove one current raw idt entry |
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309 | */ |
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310 | extern int i386_delete_idt_entry (const rtems_raw_irq_connect_data*); |
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311 | |
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312 | /* |
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313 | * C callable function enabling to init idt. |
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314 | * |
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315 | * CAUTION : this function assumes that the IDTR register |
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316 | * has been already set. |
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317 | */ |
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318 | extern int i386_init_idt (rtems_raw_irq_global_settings* config); |
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319 | |
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320 | /* |
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321 | * C callable function enabling to get actual idt configuration |
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322 | */ |
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323 | extern int i386_get_idt_config (rtems_raw_irq_global_settings** config); |
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324 | |
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325 | |
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326 | /* |
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327 | * See page 11.12 Figure 11-8. |
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328 | * |
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329 | */ |
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330 | |
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331 | typedef struct { |
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332 | unsigned int limit_15_0 : 16; |
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333 | unsigned int base_address_15_0 : 16; |
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334 | unsigned int base_address_23_16 : 8; |
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335 | unsigned int type : 4; |
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336 | unsigned int descriptor_type : 1; |
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337 | unsigned int privilege : 2; |
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338 | unsigned int present : 1; |
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339 | unsigned int limit_19_16 : 4; |
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340 | unsigned int available : 1; |
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341 | unsigned int fixed_value_bits : 1; |
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342 | unsigned int operation_size : 1; |
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343 | unsigned int granularity : 1; |
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344 | unsigned int base_address_31_24 : 8; |
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345 | }segment_descriptors; |
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346 | |
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347 | /* |
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348 | * C callable function enabling to get easilly usable info from |
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349 | * the actual value of GDT register. |
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350 | */ |
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351 | extern void i386_get_info_from_GDTR (segment_descriptors** table, |
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352 | unsigned* limit); |
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353 | /* |
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354 | * C callable function enabling to change the value of GDT register. Must be called |
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355 | * with interrupts masked at processor level!!!. |
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356 | */ |
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357 | extern void i386_set_GDTR (segment_descriptors*, |
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358 | unsigned limit); |
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359 | |
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360 | /* |
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361 | * C callable function enabling to set up one raw interrupt handler |
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362 | */ |
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363 | extern int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, |
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364 | unsigned limit); |
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365 | |
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366 | # endif /* ASM */ |
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367 | |
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368 | #endif |
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