1 | /* |
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2 | * cpu.h - This file contains definitions for data structure related |
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3 | * to Intel system programming. More information can be found |
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4 | * on Intel site and more precisely in the following book : |
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5 | * |
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6 | * Pentium Processor familly |
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7 | * Developper's Manual |
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8 | * |
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9 | * Volume 3 : Architecture and Programming Manual |
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10 | * |
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11 | * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) |
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12 | * Canon Centre Recherche France. |
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13 | * |
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14 | * The license and distribution terms for this file may be |
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15 | * found in found in the file LICENSE in this distribution or at |
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16 | * http://www.OARcorp.com/rtems/license.html. |
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17 | * |
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18 | * $Id$ |
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19 | */ |
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20 | |
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21 | #ifndef _LIBCPU_i386_CPU_H |
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22 | #define _LIBCPU_i386_CPU_H |
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23 | |
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24 | #include <libcpu/registers.h> |
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25 | |
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26 | |
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27 | #ifndef ASM |
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28 | |
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29 | /* |
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30 | * Interrupt Level Macros |
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31 | */ |
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32 | |
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33 | #define i386_disable_interrupts( _level ) \ |
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34 | { \ |
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35 | asm volatile ( "pushf ; \ |
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36 | cli ; \ |
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37 | pop %0" \ |
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38 | : "=rm" ((_level)) \ |
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39 | ); \ |
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40 | } |
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41 | |
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42 | #define i386_enable_interrupts( _level ) \ |
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43 | { \ |
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44 | asm volatile ( "push %0 ; \ |
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45 | popf" \ |
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46 | : : "rm" ((_level)) : "cc" \ |
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47 | ); \ |
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48 | } |
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49 | |
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50 | #define i386_flash_interrupts( _level ) \ |
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51 | { \ |
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52 | asm volatile ( "push %0 ; \ |
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53 | popf ; \ |
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54 | cli" \ |
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55 | : : "rm" ((_level)) : "cc" \ |
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56 | ); \ |
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57 | } |
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58 | |
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59 | #define i386_get_interrupt_level( _level ) \ |
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60 | do { \ |
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61 | register unsigned32 _eflags; \ |
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62 | \ |
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63 | asm volatile ( "pushf ; \ |
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64 | pop %0" \ |
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65 | : "=rm" ((_eflags)) \ |
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66 | ); \ |
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67 | \ |
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68 | _level = (_eflags & EFLAGS_INTR_ENABLE) ? 0 : 1; \ |
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69 | } while (0) |
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70 | |
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71 | #define _CPU_ISR_Disable( _level ) i386_disable_interrupts( _level ) |
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72 | #define _CPU_ISR_Enable( _level ) i386_enable_interrupts( _level ) |
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73 | |
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74 | /* |
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75 | * Segment Access Routines |
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76 | * |
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77 | * NOTE: Unfortunately, these are still static inlines even when the |
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78 | * "macro" implementation of the generic code is used. |
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79 | */ |
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80 | |
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81 | static inline unsigned short i386_get_cs() |
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82 | { |
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83 | register unsigned short segment = 0; |
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84 | |
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85 | asm volatile ( "movw %%cs,%0" : "=r" (segment) : "0" (segment) ); |
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86 | |
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87 | return segment; |
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88 | } |
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89 | |
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90 | static inline unsigned short i386_get_ds() |
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91 | { |
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92 | register unsigned short segment = 0; |
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93 | |
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94 | asm volatile ( "movw %%ds,%0" : "=r" (segment) : "0" (segment) ); |
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95 | |
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96 | return segment; |
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97 | } |
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98 | |
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99 | static inline unsigned short i386_get_es() |
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100 | { |
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101 | register unsigned short segment = 0; |
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102 | |
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103 | asm volatile ( "movw %%es,%0" : "=r" (segment) : "0" (segment) ); |
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104 | |
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105 | return segment; |
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106 | } |
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107 | |
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108 | static inline unsigned short i386_get_ss() |
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109 | { |
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110 | register unsigned short segment = 0; |
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111 | |
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112 | asm volatile ( "movw %%ss,%0" : "=r" (segment) : "0" (segment) ); |
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113 | |
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114 | return segment; |
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115 | } |
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116 | |
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117 | static inline unsigned short i386_get_fs() |
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118 | { |
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119 | register unsigned short segment = 0; |
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120 | |
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121 | asm volatile ( "movw %%fs,%0" : "=r" (segment) : "0" (segment) ); |
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122 | |
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123 | return segment; |
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124 | } |
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125 | |
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126 | static inline unsigned short i386_get_gs() |
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127 | { |
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128 | register unsigned short segment = 0; |
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129 | |
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130 | asm volatile ( "movw %%gs,%0" : "=r" (segment) : "0" (segment) ); |
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131 | |
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132 | return segment; |
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133 | } |
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134 | |
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135 | /* |
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136 | * Added for pagination management |
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137 | */ |
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138 | |
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139 | static inline unsigned int i386_get_cr0() |
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140 | { |
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141 | register unsigned int segment = 0; |
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142 | |
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143 | asm volatile ( "movl %%cr0,%0" : "=r" (segment) : "0" (segment) ); |
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144 | |
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145 | return segment; |
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146 | } |
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147 | |
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148 | static inline void i386_set_cr0(unsigned int segment) |
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149 | { |
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150 | asm volatile ( "movl %0,%%cr0" : "=r" (segment) : "0" (segment) ); |
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151 | } |
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152 | |
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153 | static inline unsigned int i386_get_cr2() |
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154 | { |
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155 | register unsigned int segment = 0; |
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156 | |
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157 | asm volatile ( "movl %%cr2,%0" : "=r" (segment) : "0" (segment) ); |
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158 | |
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159 | return segment; |
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160 | } |
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161 | |
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162 | static inline unsigned int i386_get_cr3() |
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163 | { |
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164 | register unsigned int segment = 0; |
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165 | |
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166 | asm volatile ( "movl %%cr3,%0" : "=r" (segment) : "0" (segment) ); |
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167 | |
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168 | return segment; |
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169 | } |
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170 | |
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171 | static inline void i386_set_cr3(unsigned int segment) |
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172 | { |
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173 | asm volatile ( "movl %0,%%cr3" : "=r" (segment) : "0" (segment) ); |
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174 | } |
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175 | |
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176 | /* |
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177 | * IO Port Access Routines |
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178 | */ |
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179 | |
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180 | #define i386_outport_byte( _port, _value ) \ |
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181 | do { register unsigned short __port = _port; \ |
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182 | register unsigned char __value = _value; \ |
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183 | \ |
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184 | asm volatile ( "outb %0,%1" : : "a" (__value), "d" (__port) ); \ |
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185 | } while (0) |
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186 | |
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187 | #define i386_outport_word( _port, _value ) \ |
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188 | do { register unsigned short __port = _port; \ |
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189 | register unsigned short __value = _value; \ |
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190 | \ |
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191 | asm volatile ( "outw %0,%1" : : "a" (__value), "d" (__port) ); \ |
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192 | } while (0) |
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193 | |
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194 | #define i386_outport_long( _port, _value ) \ |
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195 | do { register unsigned short __port = _port; \ |
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196 | register unsigned int __value = _value; \ |
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197 | \ |
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198 | asm volatile ( "outl %0,%1" : : "a" (__value), "d" (__port) ); \ |
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199 | } while (0) |
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200 | |
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201 | #define i386_inport_byte( _port, _value ) \ |
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202 | do { register unsigned short __port = _port; \ |
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203 | register unsigned char __value = 0; \ |
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204 | \ |
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205 | asm volatile ( "inb %1,%0" : "=a" (__value) \ |
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206 | : "d" (__port) \ |
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207 | ); \ |
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208 | _value = __value; \ |
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209 | } while (0) |
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210 | |
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211 | #define i386_inport_word( _port, _value ) \ |
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212 | do { register unsigned short __port = _port; \ |
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213 | register unsigned short __value = 0; \ |
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214 | \ |
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215 | asm volatile ( "inw %1,%0" : "=a" (__value) \ |
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216 | : "d" (__port) \ |
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217 | ); \ |
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218 | _value = __value; \ |
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219 | } while (0) |
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220 | |
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221 | #define i386_inport_long( _port, _value ) \ |
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222 | do { register unsigned short __port = _port; \ |
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223 | register unsigned int __value = 0; \ |
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224 | \ |
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225 | asm volatile ( "inl %1,%0" : "=a" (__value) \ |
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226 | : "d" (__port) \ |
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227 | ); \ |
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228 | _value = __value; \ |
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229 | } while (0) |
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230 | |
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231 | /* |
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232 | * Type definition for raw interrupts. |
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233 | */ |
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234 | |
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235 | typedef unsigned char rtems_vector_offset; |
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236 | |
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237 | struct __rtems_raw_irq_connect_data__; |
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238 | |
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239 | typedef void (*rtems_raw_irq_hdl) (void); |
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240 | typedef void (*rtems_raw_irq_enable) (const struct __rtems_raw_irq_connect_data__*); |
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241 | typedef void (*rtems_raw_irq_disable) (const struct __rtems_raw_irq_connect_data__*); |
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242 | typedef int (*rtems_raw_irq_is_enabled) (const struct __rtems_raw_irq_connect_data__*); |
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243 | |
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244 | typedef struct __rtems_raw_irq_connect_data__{ |
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245 | /* |
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246 | * IDT vector offset (IRQ line + PC386_IRQ_VECTOR_BASE) |
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247 | */ |
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248 | rtems_vector_offset idtIndex; |
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249 | /* |
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250 | * IDT raw handler. See comment on handler properties below in function prototype. |
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251 | */ |
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252 | rtems_raw_irq_hdl hdl; |
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253 | /* |
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254 | * function for enabling raw interrupts. In order to be consistent |
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255 | * with the fact that the raw connexion can defined in the |
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256 | * libcpu library, this library should have no knowledge of |
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257 | * board specific hardware to manage interrupts and thus the |
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258 | * "on" routine must enable the irq both at device and PIC level. |
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259 | * |
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260 | */ |
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261 | rtems_raw_irq_enable on; |
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262 | /* |
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263 | * function for disabling raw interrupts. In order to be consistent |
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264 | * with the fact that the raw connexion can defined in the |
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265 | * libcpu library, this library should have no knowledge of |
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266 | * board specific hardware to manage interrupts and thus the |
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267 | * "on" routine must disable the irq both at device and PIC level. |
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268 | * |
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269 | */ |
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270 | rtems_raw_irq_disable off; |
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271 | /* |
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272 | * function enabling to know what interrupt may currently occur |
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273 | */ |
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274 | rtems_raw_irq_is_enabled isOn; |
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275 | }rtems_raw_irq_connect_data; |
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276 | |
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277 | typedef struct { |
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278 | /* |
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279 | * size of all the table fields (*Tbl) described below. |
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280 | */ |
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281 | unsigned int idtSize; |
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282 | /* |
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283 | * Default handler used when disconnecting interrupts. |
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284 | */ |
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285 | rtems_raw_irq_connect_data defaultRawEntry; |
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286 | /* |
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287 | * Table containing initials/current value. |
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288 | */ |
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289 | rtems_raw_irq_connect_data* rawIrqHdlTbl; |
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290 | }rtems_raw_irq_global_settings; |
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291 | |
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292 | /* |
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293 | * See page 14.9 Figure 14-2. |
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294 | * |
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295 | */ |
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296 | typedef struct { |
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297 | unsigned int low_offsets_bits : 16; |
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298 | unsigned int segment_selector : 16; |
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299 | unsigned int fixed_value_bits : 8; |
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300 | unsigned int gate_type : 5; |
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301 | unsigned int privilege : 2; |
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302 | unsigned int present : 1; |
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303 | unsigned int high_offsets_bits: 16; |
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304 | }interrupt_gate_descriptor; |
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305 | |
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306 | |
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307 | /* |
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308 | * C callable function enabling to create a interrupt_gate_descriptor |
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309 | */ |
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310 | void create_interrupt_gate_descriptor (interrupt_gate_descriptor*, rtems_raw_irq_hdl); |
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311 | |
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312 | /* |
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313 | * C callable function enabling to get handler currently connected to a vector |
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314 | * |
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315 | */ |
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316 | rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset); |
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317 | |
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318 | /* |
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319 | * C callable function enabling to get easilly usable info from |
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320 | * the actual value of IDT register. |
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321 | */ |
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322 | extern void i386_get_info_from_IDTR (interrupt_gate_descriptor** table, |
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323 | unsigned* limit); |
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324 | /* |
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325 | * C callable function enabling to change the value of IDT register. Must be called |
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326 | * with interrupts masked at processor level!!!. |
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327 | */ |
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328 | extern void i386_set_IDTR (interrupt_gate_descriptor* table, |
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329 | unsigned limit); |
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330 | |
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331 | /* |
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332 | * C callable function enabling to set up one raw idt entry |
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333 | */ |
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334 | extern int i386_set_idt_entry (const rtems_raw_irq_connect_data*); |
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335 | |
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336 | /* |
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337 | * C callable function enabling to get one current raw idt entry |
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338 | */ |
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339 | extern int i386_get_current_idt_entry (rtems_raw_irq_connect_data*); |
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340 | |
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341 | /* |
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342 | * C callable function enabling to remove one current raw idt entry |
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343 | */ |
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344 | extern int i386_delete_idt_entry (const rtems_raw_irq_connect_data*); |
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345 | |
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346 | /* |
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347 | * C callable function enabling to init idt. |
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348 | * |
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349 | * CAUTION : this function assumes that the IDTR register |
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350 | * has been already set. |
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351 | */ |
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352 | extern int i386_init_idt (rtems_raw_irq_global_settings* config); |
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353 | |
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354 | /* |
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355 | * C callable function enabling to get actual idt configuration |
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356 | */ |
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357 | extern int i386_get_idt_config (rtems_raw_irq_global_settings** config); |
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358 | |
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359 | |
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360 | /* |
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361 | * See page 11.12 Figure 11-8. |
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362 | * |
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363 | */ |
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364 | |
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365 | typedef struct { |
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366 | unsigned int limit_15_0 : 16; |
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367 | unsigned int base_address_15_0 : 16; |
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368 | unsigned int base_address_23_16 : 8; |
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369 | unsigned int type : 4; |
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370 | unsigned int descriptor_type : 1; |
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371 | unsigned int privilege : 2; |
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372 | unsigned int present : 1; |
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373 | unsigned int limit_19_16 : 4; |
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374 | unsigned int available : 1; |
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375 | unsigned int fixed_value_bits : 1; |
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376 | unsigned int operation_size : 1; |
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377 | unsigned int granularity : 1; |
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378 | unsigned int base_address_31_24 : 8; |
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379 | }segment_descriptors; |
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380 | |
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381 | /* |
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382 | * C callable function enabling to get easilly usable info from |
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383 | * the actual value of GDT register. |
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384 | */ |
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385 | extern void i386_get_info_from_GDTR (segment_descriptors** table, |
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386 | unsigned* limit); |
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387 | /* |
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388 | * C callable function enabling to change the value of GDT register. Must be called |
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389 | * with interrupts masked at processor level!!!. |
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390 | */ |
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391 | extern void i386_set_GDTR (segment_descriptors*, |
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392 | unsigned limit); |
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393 | |
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394 | /* |
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395 | * C callable function enabling to set up one raw interrupt handler |
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396 | */ |
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397 | extern int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, |
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398 | unsigned limit); |
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399 | |
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400 | /* |
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401 | * See page 11.18 Figure 11-12. |
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402 | * |
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403 | */ |
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404 | |
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405 | typedef struct { |
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406 | unsigned int offset : 12; |
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407 | unsigned int page : 10; |
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408 | unsigned int directory : 10; |
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409 | }la_bits; |
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410 | |
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411 | typedef union { |
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412 | la_bits bits; |
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413 | unsigned int address; |
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414 | }linear_address; |
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415 | |
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416 | |
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417 | /* |
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418 | * See page 11.20 Figure 11-14. |
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419 | * |
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420 | */ |
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421 | |
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422 | typedef struct { |
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423 | unsigned int present : 1; |
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424 | unsigned int writable : 1; |
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425 | unsigned int user : 1; |
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426 | unsigned int write_through : 1; |
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427 | unsigned int cache_disable : 1; |
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428 | unsigned int accessed : 1; |
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429 | unsigned int reserved1 : 1; |
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430 | unsigned int page_size : 1; |
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431 | unsigned int reserved2 : 1; |
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432 | unsigned int available : 3; |
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433 | unsigned int page_frame_address : 20; |
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434 | }page_dir_bits; |
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435 | |
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436 | typedef union { |
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437 | page_dir_bits bits; |
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438 | unsigned int dir_entry; |
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439 | }page_dir_entry; |
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440 | |
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441 | typedef struct { |
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442 | unsigned int present : 1; |
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443 | unsigned int writable : 1; |
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444 | unsigned int user : 1; |
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445 | unsigned int write_through : 1; |
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446 | unsigned int cache_disable : 1; |
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447 | unsigned int accessed : 1; |
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448 | unsigned int dirty : 1; |
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449 | unsigned int reserved2 : 2; |
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450 | unsigned int available : 3; |
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451 | unsigned int page_frame_address : 20; |
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452 | }page_table_bits; |
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453 | |
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454 | typedef union { |
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455 | page_table_bits bits; |
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456 | unsigned int table_entry; |
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457 | } page_table_entry; |
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458 | |
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459 | /* |
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460 | * definitions related to page table entry |
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461 | */ |
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462 | #define PG_SIZE 0x1000 |
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463 | #define MASK_OFFSET 0xFFF |
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464 | #define MAX_ENTRY (PG_SIZE/sizeof(page_dir_entry)) |
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465 | #define FOUR_MB 0x400000 |
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466 | #define MASK_FLAGS 0x1A |
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467 | |
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468 | #define PTE_PRESENT 0x01 |
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469 | #define PTE_WRITABLE 0x02 |
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470 | #define PTE_USER 0x04 |
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471 | #define PTE_WRITE_THROUGH 0x08 |
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472 | #define PTE_CACHE_DISABLE 0x10 |
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473 | |
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474 | typedef struct { |
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475 | page_dir_entry pageDirEntry[MAX_ENTRY]; |
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476 | } page_directory; |
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477 | |
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478 | typedef struct { |
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479 | page_table_entry pageTableEntry[MAX_ENTRY]; |
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480 | } page_table; |
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481 | |
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482 | static inline void flush_cache() |
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483 | { |
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484 | /* Would this be better as a macro? */ |
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485 | asm ("wbinvd"); /* gcc did not like a volatile being on this */ |
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486 | } |
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487 | |
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488 | |
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489 | /* C declaration for paging management */ |
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490 | |
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491 | extern int _CPU_is_cache_enabled(); |
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492 | extern int _CPU_is_paging_enabled(); |
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493 | extern int init_paging(); |
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494 | extern void _CPU_enable_paging(); |
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495 | extern void _CPU_disable_paging(); |
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496 | extern void _CPU_disable_cache(); |
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497 | extern void _CPU_enable_cache(); |
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498 | extern int _CPU_map_phys_address |
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499 | (void **mappedAddress, void *physAddress, |
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500 | int size, int flag); |
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501 | extern int _CPU_unmap_virt_address (void *mappedAddress, int size); |
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502 | extern int _CPU_change_memory_mapping_attribute |
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503 | (void **newAddress, void *mappedAddress, |
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504 | unsigned int size, unsigned int flag); |
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505 | extern int _CPU_display_memory_attribute(); |
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506 | |
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507 | # endif /* ASM */ |
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508 | |
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509 | #endif |
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510 | |
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