source: rtems/c/src/lib/libcpu/i386/cpu.h @ 359e537

4.104.11
Last change on this file since 359e537 was 73b5bd5d, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 15, 2004 at 1:33:58 PM

Remove stray white spaces.

  • Property mode set to 100644
File size: 9.6 KB
Line 
1/*
2 * cpu.h  - This file contains definitions for data structure related
3 *          to Intel system programming. More information can be found
4 *          on Intel site and more precisely in the following book :
5 *
6 *              Pentium Processor familly
7 *              Developper's Manual
8 *
9 *              Volume 3 : Architecture and Programming Manual
10 *
11 * Copyright (C) 1998  Eric Valette (valette@crf.canon.fr)
12 *                     Canon Centre Recherche France.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 * $Id$
19 */
20
21#ifndef _LIBCPU_i386_CPU_H
22#define _LIBCPU_i386_CPU_H
23
24#include <rtems/score/registers.h>
25
26#ifndef ASM
27
28/*
29 *  Interrupt Level Macros
30 */
31#include <rtems/score/interrupts.h>
32
33/*
34 *  Segment Access Routines
35 *
36 *  NOTE:  Unfortunately, these are still static inlines even when the
37 *         "macro" implementation of the generic code is used.
38 */
39
40static inline unsigned short i386_get_cs()
41{
42  register unsigned short segment = 0;
43
44  asm volatile ( "movw %%cs,%0" : "=r" (segment) : "0" (segment) );
45
46  return segment;
47}
48
49static inline unsigned short i386_get_ds()
50{
51  register unsigned short segment = 0;
52
53  asm volatile ( "movw %%ds,%0" : "=r" (segment) : "0" (segment) );
54
55  return segment;
56}
57
58static inline unsigned short i386_get_es()
59{
60  register unsigned short segment = 0;
61
62  asm volatile ( "movw %%es,%0" : "=r" (segment) : "0" (segment) );
63
64  return segment;
65}
66
67static inline unsigned short i386_get_ss()
68{
69  register unsigned short segment = 0;
70
71  asm volatile ( "movw %%ss,%0" : "=r" (segment) : "0" (segment) );
72
73  return segment;
74}
75
76static inline unsigned short i386_get_fs()
77{
78  register unsigned short segment = 0;
79
80  asm volatile ( "movw %%fs,%0" : "=r" (segment) : "0" (segment) );
81
82  return segment;
83}
84
85static inline unsigned short i386_get_gs()
86{
87  register unsigned short segment = 0;
88
89  asm volatile ( "movw %%gs,%0" : "=r" (segment) : "0" (segment) );
90
91  return segment;
92}
93
94/*
95 *  IO Port Access Routines
96 */
97
98#define i386_outport_byte( _port, _value ) \
99do { register unsigned short __port  = _port; \
100     register unsigned char  __value = _value; \
101     \
102     asm volatile ( "outb %0,%1" : : "a" (__value), "d" (__port) ); \
103   } while (0)
104
105#define i386_outport_word( _port, _value ) \
106do { register unsigned short __port  = _port; \
107     register unsigned short __value = _value; \
108     \
109     asm volatile ( "outw %0,%1" : : "a" (__value), "d" (__port) ); \
110   } while (0)
111
112#define i386_outport_long( _port, _value ) \
113do { register unsigned short __port  = _port; \
114     register unsigned int  __value = _value; \
115     \
116     asm volatile ( "outl %0,%1" : : "a" (__value), "d" (__port) ); \
117   } while (0)
118
119#define i386_inport_byte( _port, _value ) \
120do { register unsigned short __port  = _port; \
121     register unsigned char  __value = 0; \
122     \
123     asm volatile ( "inb %1,%0" : "=a" (__value) \
124                                : "d"  (__port) \
125                  ); \
126     _value = __value; \
127   } while (0)
128
129#define i386_inport_word( _port, _value ) \
130do { register unsigned short __port  = _port; \
131     register unsigned short __value = 0; \
132     \
133     asm volatile ( "inw %1,%0" : "=a" (__value) \
134                                : "d"  (__port) \
135                  ); \
136     _value = __value; \
137   } while (0)
138
139#define i386_inport_long( _port, _value ) \
140do { register unsigned short __port  = _port; \
141     register unsigned int  __value = 0; \
142     \
143     asm volatile ( "inl %1,%0" : "=a" (__value) \
144                                : "d"  (__port) \
145                  ); \
146     _value = __value; \
147   } while (0)
148
149/*
150 * Type definition for raw interrupts.
151 */
152
153typedef unsigned char  rtems_vector_offset;
154
155typedef struct __rtems_raw_irq_connect_data__{
156 /*
157  * IDT vector offset (IRQ line + PC386_IRQ_VECTOR_BASE)
158  */
159  rtems_vector_offset           idtIndex;
160  /*
161   * IDT raw handler. See comment on handler properties below in function prototype.
162   */
163  rtems_raw_irq_hdl             hdl;
164  /*
165   * function for enabling raw interrupts. In order to be consistent
166   * with the fact that the raw connexion can defined in the
167   * libcpu library, this library should have no knowledge of
168   * board specific hardware to manage interrupts and thus the
169   * "on" routine must enable the irq both at device and PIC level.
170   *
171   */
172    rtems_raw_irq_enable        on;     
173  /*
174   * function for disabling raw interrupts. In order to be consistent
175   * with the fact that the raw connexion can defined in the
176   * libcpu library, this library should have no knowledge of
177   * board specific hardware to manage interrupts and thus the
178   * "on" routine must disable the irq both at device and PIC level.
179   *
180   */
181  rtems_raw_irq_disable         off;
182  /*
183   * function enabling to know what interrupt may currently occur
184   */
185  rtems_raw_irq_is_enabled      isOn;
186}rtems_raw_irq_connect_data;
187
188typedef struct {
189  /*
190   * size of all the table fields (*Tbl) described below.
191   */
192  unsigned int                  idtSize;
193  /*
194   * Default handler used when disconnecting interrupts.
195   */
196  rtems_raw_irq_connect_data    defaultRawEntry;
197  /*
198   * Table containing initials/current value.
199   */
200  rtems_raw_irq_connect_data*   rawIrqHdlTbl;
201}rtems_raw_irq_global_settings;
202
203#include <rtems/score/idtr.h>
204
205/*
206 * C callable function enabling to get handler currently connected to a vector
207 *
208 */
209rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset);
210
211/*
212 * C callable function enabling to set up one raw idt entry
213 */
214extern int i386_set_idt_entry (const rtems_raw_irq_connect_data*);
215
216/*
217 * C callable function enabling to get one current raw idt entry
218 */
219extern int i386_get_current_idt_entry (rtems_raw_irq_connect_data*);
220
221/*
222 * C callable function enabling to remove one current raw idt entry
223 */
224extern int i386_delete_idt_entry (const rtems_raw_irq_connect_data*);
225
226/*
227 * C callable function enabling to init idt.
228 *
229 * CAUTION : this function assumes that the IDTR register
230 * has been already set.
231 */
232extern int i386_init_idt (rtems_raw_irq_global_settings* config);
233
234/*
235 * C callable function enabling to get actual idt configuration
236 */
237extern int i386_get_idt_config (rtems_raw_irq_global_settings** config);
238
239
240/*
241 * See page 11.12 Figure 11-8.
242 *
243 */
244
245typedef struct {
246  unsigned int limit_15_0               : 16;
247  unsigned int base_address_15_0        : 16;
248  unsigned int base_address_23_16       : 8;
249  unsigned int type                     : 4;
250  unsigned int descriptor_type          : 1;
251  unsigned int privilege                : 2;
252  unsigned int present                  : 1;
253  unsigned int limit_19_16              : 4;
254  unsigned int available                : 1;
255  unsigned int fixed_value_bits         : 1;
256  unsigned int operation_size           : 1;
257  unsigned int granularity              : 1;
258  unsigned int base_address_31_24       : 8;
259}segment_descriptors;
260
261/*
262 * C callable function enabling to get easilly usable info from
263 * the actual value of GDT register.
264 */
265extern void i386_get_info_from_GDTR (segment_descriptors** table,
266                                     unsigned* limit);
267/*
268 * C callable function enabling to change the value of GDT register. Must be called
269 * with interrupts masked at processor level!!!.
270 */
271extern void i386_set_GDTR (segment_descriptors*,
272                           unsigned limit);
273
274/*
275 * C callable function enabling to set up one raw interrupt handler
276 */
277extern int i386_set_gdt_entry (unsigned short segment_selector, unsigned base,
278                                             unsigned limit);
279
280/*
281 * See page 11.18 Figure 11-12.
282 *
283 */
284
285typedef struct {
286  unsigned int offset                   : 12;
287  unsigned int page                     : 10;
288  unsigned int directory                : 10;
289}la_bits;
290
291typedef union {
292  la_bits       bits;
293  unsigned int  address;
294}linear_address;
295
296
297/*
298 * See page 11.20 Figure 11-14.
299 *
300 */
301
302typedef struct {
303  unsigned int present                  : 1;
304  unsigned int writable                 : 1;
305  unsigned int user                     : 1;
306  unsigned int write_through            : 1;
307  unsigned int cache_disable            : 1;
308  unsigned int accessed                 : 1;
309  unsigned int reserved1                : 1;
310  unsigned int page_size                : 1;
311  unsigned int reserved2                : 1;
312  unsigned int available                : 3;
313  unsigned int page_frame_address       : 20;
314}page_dir_bits;
315
316typedef union {
317  page_dir_bits bits;
318  unsigned int  dir_entry;
319}page_dir_entry;
320
321typedef struct {
322  unsigned int present                  : 1;
323  unsigned int writable                 : 1;
324  unsigned int user                     : 1;
325  unsigned int write_through            : 1;
326  unsigned int cache_disable            : 1;
327  unsigned int accessed                 : 1;
328  unsigned int dirty                    : 1;
329  unsigned int reserved2                : 2;
330  unsigned int available                : 3;
331  unsigned int page_frame_address       : 20;
332}page_table_bits;
333
334typedef union {
335  page_table_bits       bits;
336  unsigned int          table_entry;
337} page_table_entry;
338 
339/*
340 * definitions related to page table entry
341 */
342#define PG_SIZE 0x1000
343#define MASK_OFFSET 0xFFF
344#define MAX_ENTRY (PG_SIZE/sizeof(page_dir_entry))
345#define FOUR_MB       0x400000
346#define MASK_FLAGS 0x1A
347
348#define PTE_PRESENT             0x01
349#define PTE_WRITABLE            0x02
350#define PTE_USER                0x04
351#define PTE_WRITE_THROUGH       0x08
352#define PTE_CACHE_DISABLE       0x10
353
354typedef struct {
355  page_dir_entry pageDirEntry[MAX_ENTRY];
356} page_directory;
357
358typedef struct {
359  page_table_entry pageTableEntry[MAX_ENTRY];
360} page_table;
361
362
363/* C declaration for paging management */
364
365extern int      _CPU_is_cache_enabled();
366extern int      _CPU_is_paging_enabled();
367extern int      init_paging();
368extern void     _CPU_enable_paging();
369extern void     _CPU_disable_paging();
370extern void     _CPU_disable_cache();
371extern void     _CPU_enable_cache();
372extern int      _CPU_map_phys_address
373                      (void **mappedAddress, void *physAddress,
374                       int size, int flag); 
375extern int      _CPU_unmap_virt_address (void *mappedAddress, int size); 
376extern int      _CPU_change_memory_mapping_attribute
377                         (void **newAddress, void *mappedAddress,
378                          unsigned int size, unsigned int flag);
379extern int      _CPU_display_memory_attribute(); 
380
381# endif /* ASM */
382
383#endif
Note: See TracBrowser for help on using the repository browser.