[67a2288] | 1 | /* |
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| 2 | * cpu.c - This file contains implementation of C function to |
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| 3 | * Instanciate IDT entries. More detailled information can be found |
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| 4 | * on Intel site and more precisely in the following book : |
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| 5 | * |
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| 6 | * Pentium Processor familly |
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| 7 | * Developper's Manual |
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| 8 | * |
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| 9 | * Volume 3 : Architecture and Programming Manual |
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| 10 | * |
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| 11 | * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) |
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| 12 | * Canon Centre Recherche France. |
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| 13 | * |
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| 14 | * The license and distribution terms for this file may be |
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| 15 | * found in found in the file LICENSE in this distribution or at |
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| 16 | * http://www.OARcorp.com/rtems/license.html. |
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| 17 | * |
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| 18 | * $Id$ |
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| 19 | */ |
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| 20 | |
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| 21 | #include <libcpu/cpu.h> |
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| 22 | #include <irq.h> |
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| 23 | |
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| 24 | static rtems_raw_irq_connect_data* raw_irq_table; |
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| 25 | static rtems_raw_irq_connect_data default_raw_irq_entry; |
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| 26 | static interrupt_gate_descriptor default_idt_entry; |
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| 27 | static rtems_raw_irq_global_settings* local_settings; |
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| 28 | |
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| 29 | void create_interrupt_gate_descriptor (interrupt_gate_descriptor* idtEntry, |
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| 30 | rtems_raw_irq_hdl hdl) |
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| 31 | { |
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| 32 | idtEntry->low_offsets_bits = (((unsigned) hdl) & 0xffff); |
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| 33 | idtEntry->segment_selector = i386_get_cs(); |
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| 34 | idtEntry->fixed_value_bits = 0; |
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| 35 | idtEntry->gate_type = 0xe; |
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| 36 | idtEntry->privilege = 0; |
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| 37 | idtEntry->present = 1; |
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| 38 | idtEntry->high_offsets_bits = ((((unsigned) hdl) >> 16) & 0xffff); |
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| 39 | } |
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| 40 | |
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| 41 | rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset index) |
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| 42 | { |
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| 43 | rtems_raw_irq_hdl hdl; |
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| 44 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 45 | unsigned limit; |
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| 46 | |
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| 47 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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[97d7b068] | 48 | |
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| 49 | /* Convert limit into number of entries */ |
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| 50 | limit = (limit + 1) >> 3; |
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| 51 | |
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| 52 | if(index >= limit) { |
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| 53 | return 0; |
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| 54 | } |
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| 55 | |
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| 56 | /* Convert limit into number of entries */ |
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| 57 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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[67a2288] | 58 | |
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[97d7b068] | 59 | if(index >= limit) { |
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| 60 | return 0; |
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| 61 | } |
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| 62 | |
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[67a2288] | 63 | * ((unsigned int*) &hdl) = (idt_entry_tbl[index].low_offsets_bits | |
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| 64 | (idt_entry_tbl[index].high_offsets_bits << 16)); |
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| 65 | return hdl; |
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| 66 | } |
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| 67 | |
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| 68 | int i386_set_idt_entry (const rtems_raw_irq_connect_data* irq) |
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| 69 | { |
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| 70 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 71 | unsigned limit; |
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| 72 | unsigned int level; |
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| 73 | |
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| 74 | |
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| 75 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 76 | |
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[97d7b068] | 77 | /* Convert limit into number of entries */ |
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| 78 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 79 | |
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| 80 | if (irq->idtIndex >= limit) { |
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[67a2288] | 81 | return 0; |
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| 82 | } |
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| 83 | /* |
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| 84 | * Check if default handler is actually connected. If not issue an error. |
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| 85 | * You must first get the current handler via i386_get_current_idt_entry |
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| 86 | * and then disconnect it using i386_delete_idt_entry. |
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| 87 | * RATIONALE : to always have the same transition by forcing the user |
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| 88 | * to get the previous handler before accepting to disconnect. |
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| 89 | */ |
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| 90 | if (get_hdl_from_vector(irq->idtIndex) != default_raw_irq_entry.hdl) { |
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| 91 | return 0; |
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| 92 | } |
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[97d7b068] | 93 | |
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[67a2288] | 94 | _CPU_ISR_Disable(level); |
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| 95 | |
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| 96 | raw_irq_table [irq->idtIndex] = *irq; |
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| 97 | create_interrupt_gate_descriptor (&idt_entry_tbl[irq->idtIndex], irq->hdl); |
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| 98 | irq->on(irq); |
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| 99 | |
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| 100 | _CPU_ISR_Enable(level); |
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| 101 | return 1; |
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| 102 | } |
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| 103 | |
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| 104 | void _CPU_ISR_install_vector (unsigned vector, |
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| 105 | void* hdl, |
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| 106 | void** oldHdl) |
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| 107 | { |
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| 108 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 109 | unsigned limit; |
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| 110 | interrupt_gate_descriptor new; |
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| 111 | unsigned int level; |
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| 112 | |
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| 113 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 114 | |
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[97d7b068] | 115 | /* Convert limit into number of entries */ |
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| 116 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 117 | |
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| 118 | if (vector >= limit) { |
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[67a2288] | 119 | return; |
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| 120 | } |
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| 121 | _CPU_ISR_Disable(level) |
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| 122 | * ((unsigned int *) oldHdl) = idt_entry_tbl[vector].low_offsets_bits | |
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| 123 | (idt_entry_tbl[vector].high_offsets_bits << 16); |
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| 124 | |
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| 125 | create_interrupt_gate_descriptor(&new, hdl); |
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| 126 | idt_entry_tbl[vector] = new; |
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| 127 | |
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| 128 | _CPU_ISR_Enable(level); |
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| 129 | } |
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| 130 | |
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| 131 | int i386_get_current_idt_entry (rtems_raw_irq_connect_data* irq) |
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| 132 | { |
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| 133 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 134 | unsigned limit; |
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| 135 | |
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| 136 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 137 | |
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[97d7b068] | 138 | /* Convert limit into number of entries */ |
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| 139 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 140 | |
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| 141 | if (irq->idtIndex >= limit) { |
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| 142 | return 0; |
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[67a2288] | 143 | } |
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| 144 | raw_irq_table [irq->idtIndex].hdl = get_hdl_from_vector(irq->idtIndex); |
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| 145 | |
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| 146 | *irq = raw_irq_table [irq->idtIndex]; |
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| 147 | |
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[97d7b068] | 148 | return 1; |
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[67a2288] | 149 | } |
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| 150 | |
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| 151 | int i386_delete_idt_entry (const rtems_raw_irq_connect_data* irq) |
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| 152 | { |
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| 153 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 154 | unsigned limit; |
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| 155 | unsigned int level; |
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| 156 | |
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| 157 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 158 | |
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[97d7b068] | 159 | /* Convert limit into number of entries */ |
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| 160 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 161 | |
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| 162 | if (irq->idtIndex >= limit) { |
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| 163 | return 0; |
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[67a2288] | 164 | } |
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[97d7b068] | 165 | /* |
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[67a2288] | 166 | * Check if handler passed is actually connected. If not issue an error. |
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| 167 | * You must first get the current handler via i386_get_current_idt_entry |
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| 168 | * and then disconnect it using i386_delete_idt_entry. |
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| 169 | * RATIONALE : to always have the same transition by forcing the user |
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| 170 | * to get the previous handler before accepting to disconnect. |
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| 171 | */ |
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| 172 | if (get_hdl_from_vector(irq->idtIndex) != irq->hdl){ |
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[97d7b068] | 173 | return 0; |
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[67a2288] | 174 | } |
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| 175 | _CPU_ISR_Disable(level); |
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| 176 | |
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| 177 | idt_entry_tbl[irq->idtIndex] = default_idt_entry; |
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| 178 | |
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| 179 | irq->off(irq); |
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| 180 | |
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| 181 | raw_irq_table[irq->idtIndex] = default_raw_irq_entry; |
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[97d7b068] | 182 | raw_irq_table[irq->idtIndex].idtIndex = irq->idtIndex; |
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[67a2288] | 183 | |
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| 184 | _CPU_ISR_Enable(level); |
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| 185 | |
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[97d7b068] | 186 | return 1; |
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[67a2288] | 187 | } |
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| 188 | |
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| 189 | /* |
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| 190 | * Caution this function assumes the IDTR has been already set. |
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| 191 | */ |
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| 192 | int i386_init_idt (rtems_raw_irq_global_settings* config) |
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| 193 | { |
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| 194 | unsigned limit; |
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| 195 | unsigned i; |
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| 196 | unsigned level; |
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| 197 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 198 | |
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| 199 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 200 | |
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[97d7b068] | 201 | /* Convert limit into number of entries */ |
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| 202 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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[67a2288] | 203 | |
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| 204 | if (config->idtSize != limit) { |
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[97d7b068] | 205 | return 0; |
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[67a2288] | 206 | } |
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| 207 | /* |
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| 208 | * store various accelarators |
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| 209 | */ |
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| 210 | raw_irq_table = config->rawIrqHdlTbl; |
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| 211 | local_settings = config; |
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| 212 | default_raw_irq_entry = config->defaultRawEntry; |
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| 213 | |
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| 214 | _CPU_ISR_Disable(level); |
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| 215 | |
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| 216 | create_interrupt_gate_descriptor (&default_idt_entry, default_raw_irq_entry.hdl); |
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| 217 | |
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| 218 | for (i=0; i < limit; i++) { |
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| 219 | interrupt_gate_descriptor new; |
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| 220 | create_interrupt_gate_descriptor (&new, raw_irq_table[i].hdl); |
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| 221 | idt_entry_tbl[i] = new; |
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| 222 | if (raw_irq_table[i].hdl != default_raw_irq_entry.hdl) { |
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| 223 | raw_irq_table[i].on(&raw_irq_table[i]); |
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| 224 | } |
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| 225 | else { |
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| 226 | raw_irq_table[i].off(&raw_irq_table[i]); |
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| 227 | } |
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| 228 | } |
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| 229 | _CPU_ISR_Enable(level); |
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| 230 | |
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[97d7b068] | 231 | return 1; |
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[67a2288] | 232 | } |
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| 233 | |
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| 234 | int i386_get_idt_config (rtems_raw_irq_global_settings** config) |
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| 235 | { |
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| 236 | *config = local_settings; |
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[97d7b068] | 237 | return 1; |
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[67a2288] | 238 | } |
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| 239 | |
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| 240 | /* |
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| 241 | * Caution this function assumes the GDTR has been already set. |
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| 242 | */ |
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| 243 | int i386_set_gdt_entry (unsigned short segment_selector, unsigned base, |
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| 244 | unsigned limit) |
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| 245 | { |
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| 246 | unsigned gdt_limit; |
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| 247 | unsigned short tmp_segment = 0; |
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| 248 | unsigned int limit_adjusted; |
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| 249 | segment_descriptors* gdt_entry_tbl; |
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| 250 | |
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| 251 | |
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| 252 | i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); |
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| 253 | |
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| 254 | if (segment_selector > limit) { |
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[97d7b068] | 255 | return 0; |
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[67a2288] | 256 | } |
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| 257 | /* |
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| 258 | * set up limit first |
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| 259 | */ |
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| 260 | limit_adjusted = limit; |
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| 261 | if ( limit > 4095 ) { |
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| 262 | gdt_entry_tbl[segment_selector].granularity = 1; |
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| 263 | limit_adjusted /= 4096; |
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| 264 | } |
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| 265 | gdt_entry_tbl[segment_selector].limit_15_0 = limit_adjusted & 0xffff; |
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| 266 | gdt_entry_tbl[segment_selector].limit_19_16 = (limit_adjusted >> 16) & 0xf; |
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| 267 | /* |
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| 268 | * set up base |
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| 269 | */ |
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| 270 | gdt_entry_tbl[segment_selector].base_address_15_0 = base & 0xffff; |
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| 271 | gdt_entry_tbl[segment_selector].base_address_23_16 = (base >> 16) & 0xff; |
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| 272 | gdt_entry_tbl[segment_selector].base_address_31_24 = (base >> 24) & 0xff; |
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| 273 | /* |
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| 274 | * set up descriptor type (this may well becomes a parameter if needed) |
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| 275 | */ |
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| 276 | gdt_entry_tbl[segment_selector].type = 2; /* Data R/W */ |
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| 277 | gdt_entry_tbl[segment_selector].descriptor_type = 1; /* Code or Data */ |
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| 278 | gdt_entry_tbl[segment_selector].privilege = 0; /* ring 0 */ |
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| 279 | gdt_entry_tbl[segment_selector].present = 1; /* not present */ |
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| 280 | |
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| 281 | /* |
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[97d7b068] | 282 | return 1; |
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[67a2288] | 283 | */ |
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| 284 | |
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| 285 | asm volatile( "movw %%ds,%0 ; movw %0,%%ds |
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| 286 | movw %%es,%0 ; movw %0,%%es |
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| 287 | movw %%fs,%0 ; movw %0,%%fs |
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| 288 | movw %%gs,%0 ; movw %0,%%gs |
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| 289 | movw %%ss,%0 ; movw %0,%%ss" |
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| 290 | : "=r" (tmp_segment) |
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| 291 | : "0" (tmp_segment) |
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| 292 | ); |
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| 293 | |
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[97d7b068] | 294 | return 1; |
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[67a2288] | 295 | } |
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