source: rtems/c/src/lib/libcpu/i386/cache.c @ c499856

4.11
Last change on this file since c499856 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 1.8 KB
Line 
1/*
2 *  Cache Management Support Routines for the i386
3 */
4
5#include <rtems.h>
6#include <rtems/score/registers.h>
7#include "cache_.h"
8
9void _CPU_disable_cache(void) {
10  unsigned int regCr0;
11
12  regCr0 = i386_get_cr0();
13  regCr0 |= CR0_PAGE_LEVEL_CACHE_DISABLE;
14  regCr0 |= CR0_NO_WRITE_THROUGH;
15  i386_set_cr0( regCr0 );
16  rtems_cache_flush_entire_data();
17}
18
19/*
20 * Enable the entire cache
21 */
22
23void _CPU_enable_cache(void) {
24  unsigned int regCr0;
25
26  regCr0 = i386_get_cr0();
27  regCr0 &= ~(CR0_PAGE_LEVEL_CACHE_DISABLE);
28  regCr0 &= ~(CR0_NO_WRITE_THROUGH);
29  i386_set_cr0( regCr0 );
30  /*rtems_cache_flush_entire_data();*/
31}
32
33/*
34 * CACHE MANAGER: The following functions are CPU-specific.
35 * They provide the basic implementation for the rtems_* cache
36 * management routines. If a given function has no meaning for the CPU,
37 * it does nothing by default.
38 *
39 * FIXME: The routines below should be implemented per CPU,
40 *        to accomodate the capabilities of each.
41 */
42
43#if defined(I386_CACHE_ALIGNMENT)
44void _CPU_cache_flush_1_data_line(const void *d_addr) {}
45void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
46void _CPU_cache_freeze_data(void) {}
47void _CPU_cache_unfreeze_data(void) {}
48void _CPU_cache_invalidate_1_instruction_line ( const void *d_addr ) {}
49void _CPU_cache_freeze_instruction(void) {}
50void _CPU_cache_unfreeze_instruction(void) {}
51
52void _CPU_cache_flush_entire_data(void)
53{
54  __asm__ volatile ("wbinvd");
55}
56void _CPU_cache_invalidate_entire_data(void)
57{
58  __asm__ volatile ("invd");
59}
60
61void _CPU_cache_enable_data(void)
62{
63        _CPU_enable_cache();
64}
65
66void _CPU_cache_disable_data(void)
67{
68        _CPU_disable_cache();
69}
70
71void _CPU_cache_invalidate_entire_instruction(void)
72{
73  __asm__ volatile ("invd");
74}
75
76void _CPU_cache_enable_instruction(void)
77{
78  _CPU_enable_cache();
79}
80
81void _CPU_cache_disable_instruction( void )
82{
83  _CPU_disable_cache();
84}
85#endif
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