1 | /* |
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2 | * Cache Management Support Routines for the i386 |
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3 | * |
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4 | * $Id$ |
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5 | */ |
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6 | |
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7 | #include <rtems.h> |
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8 | #include <libcpu/registers.h> |
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9 | #include "cache_.h" |
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10 | |
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11 | void _CPU_disable_cache() { |
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12 | cr0 regCr0; |
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13 | |
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14 | regCr0.i = i386_get_cr0(); |
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15 | regCr0.cr0.page_level_cache_disable = 1; |
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16 | regCr0.cr0.no_write_through = 1; |
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17 | i386_set_cr0( regCr0.i ); |
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18 | rtems_flush_entire_data_cache(); |
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19 | } |
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20 | |
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21 | /* |
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22 | * Enable the entire cache |
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23 | */ |
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24 | |
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25 | void _CPU_enable_cache() { |
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26 | cr0 regCr0; |
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27 | |
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28 | regCr0.i = i386_get_cr0(); |
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29 | regCr0.cr0.page_level_cache_disable = 0; |
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30 | regCr0.cr0.no_write_through = 0; |
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31 | i386_set_cr0( regCr0.i ); |
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32 | /*rtems_flush_entire_data_cache();*/ |
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33 | } |
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34 | |
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35 | /* |
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36 | * CACHE MANAGER: The following functions are CPU-specific. |
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37 | * They provide the basic implementation for the rtems_* cache |
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38 | * management routines. If a given function has no meaning for the CPU, |
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39 | * it does nothing by default. |
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40 | * |
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41 | * FIXME: Definitions for I386_CACHE_ALIGNMENT are missing above for |
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42 | * each CPU. The routines below should be implemented per CPU, |
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43 | * to accomodate the capabilities of each. |
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44 | */ |
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45 | |
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46 | /* FIXME: I don't belong here. */ |
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47 | #define I386_CACHE_ALIGNMENT 16 |
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48 | |
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49 | #if defined(I386_CACHE_ALIGNMENT) |
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50 | #define _CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT |
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51 | #define _CPU_INST_CACHE_ALIGNEMNT I386_CACHE_ALIGNMENT |
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52 | |
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53 | void _CPU_flush_1_data_cache_line(const void *d_addr) {} |
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54 | void _CPU_invalidate_1_data_cache_line(const void *d_addr) {} |
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55 | void _CPU_freeze_data_cache(void) {} |
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56 | void _CPU_unfreeze_data_cache(void) {} |
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57 | void _CPU_invalidate_1_inst_cache_line ( const void *d_addr ) {} |
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58 | void _CPU_freeze_inst_cache(void) {} |
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59 | void _CPU_unfreeze_inst_cache(void) {} |
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60 | |
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61 | void _CPU_flush_entire_data_cache(void) |
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62 | { |
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63 | asm volatile ("wbinvd"); |
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64 | } |
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65 | void _CPU_invalidate_entire_data_cache(void) |
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66 | { |
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67 | asm volatile ("invd"); |
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68 | } |
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69 | |
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70 | void _CPU_enable_data_cache(void) |
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71 | { |
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72 | _CPU_enable_cache(); |
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73 | } |
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74 | |
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75 | void _CPU_disable_data_cache(void) |
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76 | { |
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77 | _CPU_disable_cache(); |
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78 | } |
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79 | |
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80 | void _CPU_invalidate_entire_inst_cache(void) |
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81 | { |
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82 | asm volatile ("invd"); |
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83 | } |
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84 | |
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85 | void _CPU_enable_inst_cache(void) |
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86 | { |
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87 | _CPU_enable_cache(); |
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88 | } |
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89 | |
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90 | void _CPU_disable_inst_cache( void ) |
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91 | { |
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92 | _CPU_disable_cache(); |
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93 | } |
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94 | #endif |
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95 | |
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