source: rtems/c/src/lib/libcpu/bfin/serial/uart.h @ 0c5ea9b

4.10
Last change on this file since 0c5ea9b was 0c5ea9b, checked in by Joel Sherrill <joel.sherrill@…>, on 04/20/11 at 20:19:52

2011-04-20 Rohan Kangralkar <rkangral@…>

PR 1781/bsps

  • bf52x/include: Added additional MMR.
  • bf52x/interrupt: The BF52X processors have a different System interrupt controller than present in the 53X range of processors. The 52X have 8 interrupt assignment registers. The implementation uses tables to increase predictability.
  • serial/uart.?: Added DMA based and interrupt based transfer support. The uart code used a single ISR for TX and RX and tried to identify and multiplex inside the ISR. In the new code the type of interrupt is identified by the central ISR dispatcher bf52x/interrupt or interrupt/. This simplifies the UART ISR.
  • Property mode set to 100644
File size: 3.5 KB
Line 
1/*
2 *  RTEMS driver for Blackfin UARTs
3 *
4 *  COPYRIGHT (c) 2008 Kallisti Labs, Los Gatos, CA, USA
5 *            written by Allan Hessenflow <allanh@kallisti.com>
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  Modified:
12 *  $Author$ Added interrupt support and DMA support
13 *
14 *  $Id$
15 */
16
17
18#ifndef _UART_H_
19#define _UART_H_
20
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26/** bfin_uart_channel object
27 */
28typedef struct {
29  const char        *name;                 /** Holds name of the device */
30  uint32_t          uart_baseAddress;           /** UART base address */
31  uint32_t          uart_rxDmaBaseAddress;      /** RX DMA base address */
32  uint32_t          uart_txDmaBaseAddress;      /** TX DMA base address */
33  bool              uart_useInterrupts;         /** are interrupts used */
34  bool              uart_useDma;                /** is dma used */
35  int               uart_baud;                  /** baud rate, 0 for default */
36
37  void              *termios;                   /** termios associated */
38  uint8_t volatile  flags;                      /** flags for internal use */
39  uint16_t          length;                     /** length for internal use */
40} bfin_uart_channel_t;
41
42
43typedef struct {
44  uint32_t freq;
45  int num_channels;
46  bfin_uart_channel_t *channels;
47} bfin_uart_config_t;
48
49/**
50 * @param base_address defines the UART base address
51 * @param source defines the source that caused the interrupt. This argument
52 * will help us in identifying if Rx or TX caused the interrupt.
53 */
54typedef struct {
55  uint32_t base_address;
56  int source;
57} bfin_uart_arg_t;
58
59
60
61char bfin_uart_poll_read(rtems_device_minor_number minor);
62
63void bfin_uart_poll_write(int minor, char c);
64
65
66/**
67* Uart initialization function.
68* @param major major number of the device
69* @param config configuration parameters
70* @return rtems status code
71*/
72rtems_status_code bfin_uart_initialize(rtems_device_major_number major,
73    bfin_uart_config_t *config);
74
75
76
77/**
78 * Opens the device in different modes. The supported modes are
79 * 1. Polling
80 * 2. Interrupt
81 * 3. DMA
82 * At exit the uart_Exit function will be called to flush the device.
83 *
84 * @param major Major number of the device
85 * @param minor Minor number of the device
86 * @param arg
87 * @return
88 */
89rtems_device_driver bfin_uart_open(rtems_device_major_number major,
90    rtems_device_minor_number minor, void *arg);
91
92
93
94/**
95 * This function implements TX dma ISR. It clears the IRQ and dequeues a char
96 * The channel argument will have the base address. Since there are two uart
97 * and both the uarts can use the same tx dma isr.
98 *
99 * TODO: 1. Error checking 2. sending correct length ie after looking at the
100 * number of elements the uart transmitted.
101 *
102 * @param _arg argument passed to the interrupt handler. It contains the
103 * channel argument.
104 */
105void bfinUart_txDmaIsr(void *_arg);
106
107
108
109/**
110 * RX DMA ISR.
111 * The polling route is used for receiving the characters. This is a place
112 * holder for future implementation.
113 * @param _arg
114 */
115void bfinUart_rxDmaIsr(void *_arg);
116
117
118/**
119 * This function implements TX ISR. The function gets called when the TX FIFO is
120 * empty. It clears the interrupt and dequeues the character. It only tx one
121 * character at a time.
122 *
123 * TODO: error handling.
124 * @param _arg gets the channel information.
125 */
126void bfinUart_txIsr(void *_arg);
127
128
129/**
130* This function implements RX ISR
131*/
132void bfinUart_rxIsr(void *_arg);
133
134
135#ifdef __cplusplus
136}
137#endif
138
139#endif /* _UART_H_ */
140
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