source:
rtems/c/src/lib/libcpu/bfin/mmu/mmu.h
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2c77cbff
Last change on this file since 2c77cbff was 30abd24, checked in by Joel Sherrill <joel.sherrill@…>, on 08/15/08 at 20:18:41 | |
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1 | /* Blackfin MMU Support |
2 | * |
3 | * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
4 | * written by Allan Hessenflow <allanh@kallisti.com> |
5 | * |
6 | * The license and distribution terms for this file may be |
7 | * found in the file LICENSE in this distribution or at |
8 | * http://www.rtems.com/license/LICENSE. |
9 | * |
10 | * $Id$ |
11 | */ |
12 | |
13 | |
14 | /* NOTE: this currently only implements a static table. It should be made |
15 | to handle more regions than fit in the CPLBs, with an exception handler |
16 | to do replacements as needed. This would of course require great care |
17 | to insure any storage required by the exception handler, including any |
18 | stack space, the exception handler itself, and the region descriptors |
19 | it needs to update the CPLBs, are in regions that will never be |
20 | replaced. */ |
21 | |
22 | #ifndef _mmu_h_ |
23 | #define _mmu_h_ |
24 | |
25 | #include <libcpu/mmuRegs.h> |
26 | |
27 | |
28 | #define INSTR_CACHEABLE (ICPLB_DATA_CPLB_L1_CHBL | \ |
29 | ICPLB_DATA_CPLB_USER_RD | \ |
30 | ICPLB_DATA_CPLB_VALID) |
31 | |
32 | #define DATA_WRITEBACK (DCPLB_DATA_CPLB_L1_AOW | \ |
33 | DCPLB_DATA_CPLB_L1_CHBL | \ |
34 | DCPLB_DATA_CPLB_SUPV_WR | \ |
35 | DCPLB_DATA_CPLB_USER_WR | \ |
36 | DCPLB_DATA_CPLB_USER_RD | \ |
37 | DCPLB_DATA_CPLB_VALID) |
38 | |
39 | |
40 | #ifdef __cplusplus |
41 | extern "C" { |
42 | #endif |
43 | |
44 | |
45 | typedef struct { |
46 | struct { |
47 | void *address; |
48 | uint32_t flags; |
49 | } instruction[ICPLB_COUNT]; |
50 | struct { |
51 | void *address; |
52 | uint32_t flags; |
53 | } data[DCPLB_COUNT]; |
54 | } bfin_mmu_config_t; |
55 | |
56 | |
57 | void bfin_mmu_init(bfin_mmu_config_t *config); |
58 | |
59 | |
60 | #ifdef __cplusplus |
61 | } |
62 | #endif |
63 | |
64 | #endif /* _mmu_h_ */ |
65 |
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