1 | /* |
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2 | * RTEMS support for Blackfin interrupt controller |
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3 | * |
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4 | * COPYRIGHT (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
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5 | * written by Allan Hessenflow <allanh@kallisti.com> |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.com/license/LICENSE. |
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10 | * |
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11 | * $Id$ |
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12 | */ |
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13 | |
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14 | #ifndef _interrupt_h_ |
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15 | #define _interrupt_h_ |
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16 | |
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17 | /* Some rules for using this module: |
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18 | |
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19 | SIC_IARx registers must not be changed after calling |
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20 | bfin_interrupt_init(). |
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21 | |
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22 | The bfin_isr structures must stick around for as long as the isr is |
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23 | registered. |
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24 | |
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25 | For any interrupt source (SIC bit) that could be shared, it is only |
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26 | safe to disable an ISR through this module if the ultimate source is |
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27 | also disabled (the ultimate source must be disabled prior to disabling |
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28 | it through this module, and must remain disabled until after enabling |
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29 | it through this module). |
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30 | |
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31 | For any source that is shared with modules that cannot be disabled, |
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32 | give careful thought to the control of those interrupts. |
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33 | bfin_interrupt_enable_all() or bfin_interrupt_enable_global() can |
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34 | be used to help solve the problems caused by that. |
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35 | |
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36 | |
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37 | Note that this module does not provide prioritization. It is assumed |
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38 | that the priorities afforded by the CEC are sufficient. If finer |
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39 | grained priority control is required then this wlll need to be |
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40 | redesigned. |
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41 | */ |
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42 | |
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43 | |
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44 | #ifdef __cplusplus |
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45 | extern "C" { |
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46 | #endif |
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47 | |
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48 | /* source is the source to the SIC (the bit number in SIC_ISR). isr is |
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49 | the function that will be called when the interrupt is active. */ |
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50 | typedef struct bfin_isr_s { |
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51 | int source; |
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52 | void (*isr)(int source); |
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53 | /* the following are for internal use only */ |
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54 | uint32_t mask; |
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55 | int vector; |
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56 | struct bfin_isr_s *next; |
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57 | } bfin_isr_t; |
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58 | |
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59 | /* If non-default mapping is desired, the BSP should set the SIC_IARx |
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60 | registers prior to calling this. */ |
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61 | void bfin_interrupt_init(void); |
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62 | |
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63 | /* ISR starts out disabled */ |
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64 | void bfin_interrupt_register(bfin_isr_t *isr); |
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65 | void bfin_interrupt_unregister(bfin_isr_t *isr); |
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66 | |
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67 | /* enable/disable specific ISR */ |
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68 | void bfin_interrupt_enable(bfin_isr_t *isr, boolean enable); |
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69 | |
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70 | /* atomically enable/disable all ISRs attached to specified source */ |
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71 | void bfin_interrupt_enable_all(int source, boolean enable); |
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72 | |
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73 | /* disable a source independently of the individual ISR enables (starts |
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74 | out all enabled) */ |
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75 | void bfin_interrupt_enable_global(int source, boolean enable); |
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76 | |
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77 | #ifdef __cplusplus |
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78 | } |
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79 | #endif |
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80 | |
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81 | #endif /* _interrupt_h_ */ |
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82 | |
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