source: rtems/c/src/lib/libcpu/bfin/include/timerRegs.h @ 30abd24

4.104.114.95
Last change on this file since 30abd24 was 30abd24, checked in by Joel Sherrill <joel.sherrill@…>, on 08/15/08 at 20:18:41

2008-08-15 Allan Hessenflow <allanh@…>

  • ChangeLog?, Makefile.am, README, configure.ac, preinstall.am, cache/cache.c, cache/cache_.h, clock/clock.c, clock/rtc.c, clock/tod.h, include/bf533.h, include/bf537.h, include/cecRegs.h, include/coreTimerRegs.h, include/dmaRegs.h, include/ebiuRegs.h, include/ethernetRegs.h, include/gpioRegs.h, include/memoryRegs.h, include/mmuRegs.h, include/ppiRegs.h, include/rtcRegs.h, include/sicRegs.h, include/spiRegs.h, include/sportRegs.h, include/timerRegs.h, include/twiRegs.h, include/uartRegs.h, include/wdogRegs.h, interrupt/interrupt.c, interrupt/interrupt.h, mmu/mmu.c, mmu/mmu.h, network/ethernet.c, network/ethernet.h, serial/spi.c, serial/spi.h, serial/sport.c, serial/sport.h, serial/twi.c, serial/twi.h, serial/uart.c, serial/uart.h, timer/timer.c: New files.
  • Property mode set to 100644
File size: 1.8 KB
Line 
1/*  Blackfin General Purpose Timer Registers
2 *
3 *  Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA
4 *             written by Allan Hessenflow <allanh@kallisti.com>
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 *  $Id$
11 */
12
13#ifndef _timerRegs_h_
14#define _timerRegs_h_
15
16
17/* register addresses */
18
19#define TIMER_CONFIG_OFFSET                             0x00
20#define TIMER_WIDTH_OFFSET                              0x04
21#define TIMER_PERIOD_OFFSET                             0x08
22#define TIMER_COUNTER_OFFSET                            0x0c
23
24
25/* register fields */
26
27#define TIMER_CONFIG_ERR_TYP_MASK                     0xc000
28#define TIMER_CONFIG_ERR_TYP_NONE                     0x0000
29#define TIMER_CONFIG_ERR_TYP_OVERFLOW                 0x4000
30#define TIMER_CONFIG_ERR_TYP_PERIOD                   0x8000
31#define TIMER_CONFIG_ERR_TYP_WIDTH                    0xc000
32#define TIMER_CONFIG_EMU_RUN                          0x0200
33#define TIMER_CONFIG_TOGGLE_HI                        0x0100
34#define TIMER_CONFIG_CLK_SEL                          0x0080
35#define TIMER_CONFIG_OUT_DIS                          0x0040
36#define TIMER_CONFIG_TIN_SEL                          0x0020
37#define TIMER_CONFIG_IRQ_ENA                          0x0010
38#define TIMER_CONFIG_PERIOD_CNT                       0x0008
39#define TIMER_CONFIG_PULSE_HI                         0x0004
40#define TIMER_CONFIG_TMODE_MASK                       0x0003
41#define TIMER_CONFIG_TMODE_RESET                      0x0000
42#define TIMER_CONFIG_TMODE_PWM_OUT                    0x0001
43#define TIMER_CONFIG_TMODE_WDTH_CAP                   0x0002
44#define TIMER_CONFIG_TMODE_EXT_CLK                    0x0003
45
46
47#endif /* _timerRegs_h_ */
48
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