source:
rtems/c/src/lib/libcpu/bfin/include/ppiRegs.h
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c193baad
Last change on this file since c193baad was 30abd24, checked in by Joel Sherrill <joel.sherrill@…>, on 08/15/08 at 20:18:41 | |
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1 | /* Blackfin Parallel Peripheral Interface Registers |
2 | * |
3 | * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
4 | * written by Allan Hessenflow <allanh@kallisti.com> |
5 | * |
6 | * The license and distribution terms for this file may be |
7 | * found in the file LICENSE in this distribution or at |
8 | * http://www.rtems.com/license/LICENSE. |
9 | * |
10 | * $Id$ |
11 | */ |
12 | |
13 | #ifndef _ppiRegs_h_ |
14 | #define _ppiRegs_h_ |
15 | |
16 | |
17 | /* register addresses */ |
18 | |
19 | #define PPI_CONTROL_OFFSET 0x0000 |
20 | #define PPI_STATUS_OFFSET 0x0004 |
21 | #define PPI_COUNT_OFFSET 0x0008 |
22 | #define PPI_DELAY_OFFSET 0x000c |
23 | #define PPI_FRAME_OFFSET 0x0010 |
24 | |
25 | |
26 | /* register fields */ |
27 | |
28 | #define PPI_CONTROL_POLS 0x8000 |
29 | #define PPI_CONTROL_POLC 0x4000 |
30 | #define PPI_CONTROL_DLEN_MASK 0x3800 |
31 | #define PPI_CONTROL_DLEN_8 0x0000 |
32 | #define PPI_CONTROL_DLEN_10 0x0800 |
33 | #define PPI_CONTROL_DLEN_11 0x1000 |
34 | #define PPI_CONTROL_DLEN_12 0x1800 |
35 | #define PPI_CONTROL_DLEN_13 0x2000 |
36 | #define PPI_CONTROL_DLEN_14 0x2800 |
37 | #define PPI_CONTROL_DLEN_15 0x3000 |
38 | #define PPI_CONTROL_DLEN_16 0x3800 |
39 | #define PPI_CONTROL_SKIP_EO 0x0400 |
40 | #define PPI_CONTROL_SKIP_EN 0x0200 |
41 | #define PPI_CONTROL_PACK_EN 0x0080 |
42 | #define PPI_CONTROL_FLD_SEL 0x0040 |
43 | #define PPI_CONTROL_PORT_CFG_MASK 0x0030 |
44 | #define PPI_CONTROL_PORT_CFG_SHIFT 4 |
45 | #define PPI_CONTROL_XFR_TYPE_MASK 0x000c |
46 | #define PPI_CONTROL_XFR_TYPE_SHIFT 2 |
47 | #define PPI_CONTROL_PORT_DIR 0x0002 |
48 | #define PPI_CONTROL_PORT_EN 0x0001 |
49 | |
50 | #define PPI_STATUS_ERR_NCOR 0x8000 |
51 | #define PPI_STATUS_ERR_DET 0x4000 |
52 | #define PPI_STATUS_UNDR 0x2000 |
53 | #define PPI_STATUS_OVR 0x1000 |
54 | #define PPI_STATUS_FT_ERR 0x0800 |
55 | #define PPI_STATUS_FLD 0x0400 |
56 | #define PPI_STATUS_LT_ERR_UNDR 0x0200 |
57 | #define PPI_STATUS_LT_ERR_OVR 0x0100 |
58 | |
59 | |
60 | #endif /* _ppiRegs_h_ */ |
61 |
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