source: rtems/c/src/lib/libcpu/arm/s3c2400/clock/support.c @ b2a4e861

4.104.114.84.95
Last change on this file since b2a4e861 was b2a4e861, checked in by Joel Sherrill <joel.sherrill@…>, on Jun 2, 2005 at 1:45:53 PM

2005-06-01 Philippe Simons <loki_666@…>

  • Makefile.am: Add s3c2400/lcd/lcd.c, s3c2400/clock/support.c
  • s3c2400/clock/clockdrv.c: Update to use get_PCLK()
  • s3c2400/timer/timer.c: Update to use get_PCLK()
  • Property mode set to 100644
File size: 1.2 KB
Line 
1#include <rtems.h>
2#include <bsp.h>
3#include <s3c2400.h>
4
5#define MPLL 0
6#define UPLL 1
7
8/* ------------------------------------------------------------------------- */
9/* NOTE: This describes the proper use of this file.
10 *
11 * BSP_OSC_FREQ should be defined as the input frequency of the PLL.
12 *
13 * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
14 * the specified bus in HZ.
15 */
16/* ------------------------------------------------------------------------- */
17
18static uint32_t get_PLLCLK(int pllreg)
19{
20    uint32_t r, m, p, s;
21
22    if (pllreg == MPLL)
23        r = rMPLLCON;
24    else if (pllreg == UPLL)
25        r = rUPLLCON;
26    else
27        return 0;
28
29    m = ((r & 0xFF000) >> 12) + 8;
30    p = ((r & 0x003F0) >> 4) + 2;
31    s = r & 0x3;
32
33    return((BSP_OSC_FREQ * m) / (p << s));
34}
35
36/* return FCLK frequency */
37uint32_t get_FCLK(void)
38{
39    return(get_PLLCLK(MPLL));
40}
41
42/* return HCLK frequency */
43uint32_t get_HCLK(void)
44{
45    return((rCLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
46}
47
48/* return PCLK frequency */
49uint32_t get_PCLK(void)
50{
51    return((rCLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
52}
53
54/* return UCLK frequency */
55uint32_t get_UCLK(void)
56{
57    return(get_PLLCLK(UPLL));
58}
59
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