source: rtems/c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S @ 6edbd66

4.104.114.84.95
Last change on this file since 6edbd66 was 93f4a906, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 12, 2007 at 11:17:07 AM

2007-03-12 Joel Sherrill <joel@…>

  • at91rm9200/clock/clock.c, at91rm9200/dbgu/dbgu.c, at91rm9200/include/at91rm9200.h, at91rm9200/include/at91rm9200_dbgu.h, at91rm9200/include/at91rm9200_emac.h, at91rm9200/include/at91rm9200_gpio.h, at91rm9200/include/at91rm9200_mem.h, at91rm9200/include/at91rm9200_pmc.h, at91rm9200/include/bits.h, at91rm9200/irq/bsp_irq_asm.S, at91rm9200/irq/bsp_irq_init.c, at91rm9200/irq/irq.c, at91rm9200/irq/irq.h, at91rm9200/pmc/pmc.c, at91rm9200/timer/timer.c, mc9328mxl/clock/clockdrv.c, mc9328mxl/include/mc9328mxl.h, mc9328mxl/irq/bsp_irq_asm.S, mc9328mxl/irq/bsp_irq_init.c, mc9328mxl/irq/irq.c, mc9328mxl/irq/irq.h, mc9328mxl/timer/timer.c, s3c2400/clock/clockdrv.c, s3c2400/timer/timer.c: Correct license URL and/or fix mistake in copyright notice. Both of these mistakes appear to be from code submitted after these changes were made previously.
  • Property mode set to 100644
File size: 1.3 KB
Line 
1/*
2 * MC9328MXL Intererrupt handler
3 *
4 * Copyright (c) 2002 by Jay Monkman <jtm@lopingdog.com>
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *
12 *  bsp_irq_asm.S,v 1.1 2002/11/13 17:55:06 joel Exp
13 */
14#define __asm__
15       
16/*
17 * BSP specific interrupt handler for INT or FIQ. In here
18 * you do determine which interrupt happened and call its
19 * handler.
20 */
21        .globl ExecuteITHandler
22ExecuteITHandler :
23/*
24 * Look at interrupt status register to determine source.
25 * From source, determine offset into expanded vector table
26 * and load handler address into r0.
27 */
28  ldr   r0, =0x00223040  /* Read the vector number */
29  ldr   r1, [r0]
30  mov   r1, r1, LSR #16         /* get the NIVECTOR into 16 LSbits */
31
32  /* find the ISR's address based on the vector */     
33  ldr   r0, =bsp_vector_table
34  mov   r1, r1, LSL #3          /* Shift vector to get offset into table */
35  add   r1, r0, r1              /* r1 has address of vector entry */
36  ldr   r0, [r1, #4]            /* Get the data pointer */
37  ldr   r1, [r1]                /* Get the vector */
38
39  stmdb   sp!,{lr}
40  ldr     lr, =IRQ_return         /* prepare the return from handler  */
41
42  mov     pc, r1                /* EXECUTE INT HANDLER */
43
44IRQ_return:
45  ldmia sp!,{lr}
46
47  mov pc, lr
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