source: rtems/c/src/lib/libcpu/arm/lpc22xx/irq/irq.h @ 716f6be

4.104.114.84.95
Last change on this file since 716f6be was 716f6be, checked in by Joel Sherrill <joel.sherrill@…>, on 05/01/07 at 19:16:04

2007-05-01 Ray Xu <xr@…>

  • lpc22xx/clock/clockdrv.c, lpc22xx/include/lpc22xx.h, lpc22xx/irq/bsp_irq_asm.S, lpc22xx/irq/bsp_irq_init.c, lpc22xx/irq/irq.c, lpc22xx/irq/irq.h, lpc22xx/timer/timer.c: Update BSP to address changes between 4.7 and CVS head as well as to address comments from Ralf and Joel.
  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 * Interrupt handler Header file
3 *
4 * Copyright (c) 2006 by Ray <rayx.cn@gmail.com> to support LPC ARM 
5 *     
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *
12 *  $Id$
13 */
14
15#ifndef __IRQ_H__
16#define __IRQ_H__
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22  /* define that can be useful (the values are just examples) */
23#ifndef __asm__
24
25/*
26 * Include some preprocessor value also used by assember code
27 */
28 
29#include <rtems.h>
30#include <lpc22xx.h>
31
32extern void default_int_handler();
33/***********************************************************************
34 * Constants
35 **********************************************************************/
36
37/* possible interrupt sources on the LPC22xx */
38#define LPC22xx_INTERRUPT_WDINT  0      /* Watchdog int. 0 */
39#define LPC22xx_INTERRUPT_RSV0   1      /* Reserved int. 1 */
40#define LPC22xx_INTERRUPT_DBGRX  2      /* Embedded ICE DbgCommRx receive */
41#define LPC22xx_INTERRUPT_DBGTX  3      /* Embedded ICE DbgCommRx Transmit*/
42#define LPC22xx_INTERRUPT_TIMER0 4      /* Timer 0 */
43#define LPC22xx_INTERRUPT_TIMER1 5      /* Timer 1 */
44#define LPC22xx_INTERRUPT_UART0  6      /* UART 0 */
45#define LPC22xx_INTERRUPT_UART1  7      /* UART 1 */
46#define LPC22xx_INTERRUPT_PWM0   8      /* PWM */
47#define LPC22xx_INTERRUPT_I2C    9      /* I2C  */
48#define LPC22xx_INTERRUPT_SPI0  10      /* SPI0 */
49#define LPC22xx_INTERRUPT_SPI1  11      /* SPI1 */
50#define LPC22xx_INTERRUPT_PLL   12      /* PLL */
51#define LPC22xx_INTERRUPT_RTC   13      /* RTC */
52#define LPC22xx_INTERRUPT_EINT0 14      /* Externel Interrupt 0 */
53#define LPC22xx_INTERRUPT_EINT1 15      /* Externel Interrupt 1 */
54#define LPC22xx_INTERRUPT_EINT2 16      /* Externel Interrupt 2 */
55#define LPC22xx_INTERRUPT_EINT3 17      /* Externel Interrupt 3 */
56#define LPC22xx_INTERRUPT_ADC   18      /* AD Converter */
57#define LPC22xx_INTERRUPT_CANERR 19     /* CAN LUTerr interrupt */
58#define LPC22xx_INTERRUPT_CAN1TX 20     /* CAN1 Tx interrupt */
59#define LPC22xx_INTERRUPT_CAN1RX 21     /* CAN1 Rx interrupt */
60#define LPC22xx_INTERRUPT_CAN2TX 22     /* CAN2 Tx interrupt */
61#define LPC22xx_INTERRUPT_CAN2RX 23     /* CAN2 Rx interrupt */
62#define LPC22xx_INTERRUPT_CAN3TX 24     /* CAN1 Tx interrupt */
63#define LPC22xx_INTERRUPT_CAN3RX 25     /* CAN1 Rx interrupt */
64#define LPC22xx_INTERRUPT_CAN4TX 26     /* CAN2 Tx interrupt */
65#define LPC22xx_INTERRUPT_CAN4RX 27     /* CAN2 Rx interrupt */
66#define BSP_MAX_INT              28
67
68#define UNDEFINED_INSTRUCTION_VECTOR_ADDR   (*(u_long *)0x00000004L)   
69#define SOFTWARE_INTERRUPT_VECTOR_ADDR      (*(u_long *)0x00000008L)
70#define PREFETCH_ABORT_VECTOR_ADDR          (*(u_long *)0x0000000CL)
71#define DATA_ABORT_VECTOR_ADDR              (*(u_long *)0x00000010L)
72#define IRQ_VECTOR_ADDR                     (*(u_long *)0x00000018L)
73#define FIQ_VECTOR_ADDR                     (*(u_long *)0x0000001CL)
74
75#define DATA_ABORT_ISR_ADDR                 (*(u_long *)0x00000030L)
76#define IRQ_ISR_ADDR                        (*(u_long *)0x00000038L)
77#define FIQ_ISR_ADDR                        (*(u_long *)0x0000003CL)
78
79             
80typedef unsigned char  rtems_irq_level;
81typedef unsigned char  rtems_irq_trigger;
82
83typedef unsigned int rtems_irq_number;
84struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
85
86typedef void (*rtems_irq_hdl)       (void);
87typedef void (*rtems_irq_enable)    (const struct __rtems_irq_connect_data__*);
88typedef void (*rtems_irq_disable)   (const struct __rtems_irq_connect_data__*);
89typedef int  (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*);
90
91//extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT];
92#define VECTOR_TABLE VICVectAddrBase
93                                                                                           
94typedef struct __rtems_irq_connect_data__ {
95    /* IRQ line */
96    rtems_irq_number              name;
97
98    /* Handler */
99    rtems_irq_hdl                 hdl;
100
101    /* function for enabling interrupts at device level. */
102    rtems_irq_enable              on;
103
104    /* function for disabling interrupts at device level. */
105    rtems_irq_disable             off;
106
107    /* Function to test if interrupt is enabled */
108    rtems_irq_is_enabled        isOn;
109
110    /* priority level of interrupt */
111    rtems_irq_level               irqLevel;
112
113    /* Trigger method (rising/falling edge or high/low level) */
114    rtems_irq_trigger             irqTrigger;
115} rtems_irq_connect_data;
116
117/*
118 * function to initialize the interrupt for a specific BSP
119 */
120void BSP_rtems_irq_mngt_init();
121
122
123/*
124 * function to connect a particular irq handler.
125 */
126int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
127
128/*
129 * function to get the current RTEMS irq handler for ptr->name.
130 */
131int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
132
133/*
134 * function to disconnect the RTEMS irq handler for ptr->name.
135 */
136int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
137
138#endif /* __asm__ */
139
140#ifdef __cplusplus
141}
142#endif
143
144#endif /* __IRQ_H__ */
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