[a44e045b] | 1 | /* |
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| 2 | * Interrupt handler Header file |
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| 3 | * |
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| 4 | * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> |
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| 5 | * |
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| 6 | * The license and distribution terms for this file may be |
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| 7 | * found in the file LICENSE in this distribution or at |
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| 8 | * |
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| 9 | * http://www.OARcorp.com/rtems/license.html. |
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| 10 | * |
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| 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | |
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| 15 | #ifndef __IRQ_H__ |
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| 16 | #define __IRQ_H__ |
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| 17 | |
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| 18 | #ifdef __cplusplus |
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| 19 | extern "C" { |
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| 20 | #endif |
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| 21 | |
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| 22 | /* define that can be useful (the values are just examples) */ |
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| 23 | #ifndef __asm__ |
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| 24 | |
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| 25 | /* |
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| 26 | * Include some preprocessor value also used by assember code |
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| 27 | */ |
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| 28 | |
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| 29 | #include <rtems.h> |
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| 30 | #include <lpc22xx.h> |
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| 31 | |
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| 32 | extern void default_int_handler(); |
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| 33 | /*********************************************************************** |
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| 34 | * Constants |
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| 35 | **********************************************************************/ |
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| 36 | |
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| 37 | /* possible interrupt sources on the LPC22xx */ |
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| 38 | #define LPC22xx_INTERRUPT_WDINT 0 /* Watchdog int. 0 */ |
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| 39 | #define LPC22xx_INTERRUPT_RSV0 1 /* Reserved int. 1 */ |
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| 40 | #define LPC22xx_INTERRUPT_DBGRX 2 /* Embedded ICE DbgCommRx receive */ |
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| 41 | #define LPC22xx_INTERRUPT_DBGTX 3 /* Embedded ICE DbgCommRx Transmit*/ |
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| 42 | #define LPC22xx_INTERRUPT_TIMER0 4 /* Timer 0 */ |
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| 43 | #define LPC22xx_INTERRUPT_TIMER1 5 /* Timer 1 */ |
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| 44 | #define LPC22xx_INTERRUPT_UART0 6 /* UART 0 */ |
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| 45 | #define LPC22xx_INTERRUPT_UART1 7 /* UART 1 */ |
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| 46 | #define LPC22xx_INTERRUPT_PWM0 8 /* PWM */ |
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| 47 | #define LPC22xx_INTERRUPT_I2C 9 /* I2C */ |
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| 48 | #define LPC22xx_INTERRUPT_SPI0 10 /* SPI0 */ |
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| 49 | #define LPC22xx_INTERRUPT_SPI1 11 /* SPI1 */ |
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| 50 | #define LPC22xx_INTERRUPT_PLL 12 /* PLL */ |
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| 51 | #define LPC22xx_INTERRUPT_RTC 13 /* RTC */ |
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| 52 | #define LPC22xx_INTERRUPT_EINT0 14 /* Externel Interrupt 0 */ |
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| 53 | #define LPC22xx_INTERRUPT_EINT1 15 /* Externel Interrupt 1 */ |
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| 54 | #define LPC22xx_INTERRUPT_EINT2 16 /* Externel Interrupt 2 */ |
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| 55 | #define LPC22xx_INTERRUPT_EINT3 17 /* Externel Interrupt 3 */ |
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| 56 | #define LPC22xx_INTERRUPT_ADC 18 /* AD Converter */ |
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| 57 | #define LPC22xx_INTERRUPT_CANERR 19 /* CAN LUTerr interrupt */ |
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| 58 | #define LPC22xx_INTERRUPT_CAN1TX 20 /* CAN1 Tx interrupt */ |
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| 59 | #define LPC22xx_INTERRUPT_CAN1RX 21 /* CAN1 Rx interrupt */ |
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| 60 | #define LPC22xx_INTERRUPT_CAN2TX 22 /* CAN2 Tx interrupt */ |
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| 61 | #define LPC22xx_INTERRUPT_CAN2RX 23 /* CAN2 Rx interrupt */ |
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| 62 | #define LPC22xx_INTERRUPT_CAN3TX 24 /* CAN1 Tx interrupt */ |
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| 63 | #define LPC22xx_INTERRUPT_CAN3RX 25 /* CAN1 Rx interrupt */ |
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| 64 | #define LPC22xx_INTERRUPT_CAN4TX 26 /* CAN2 Tx interrupt */ |
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| 65 | #define LPC22xx_INTERRUPT_CAN4RX 27 /* CAN2 Rx interrupt */ |
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| 66 | #define BSP_MAX_INT 28 |
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| 67 | |
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| 68 | #define UNDEFINED_INSTRUCTION_VECTOR_ADDR (*(u_long *)0x00000004L) |
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| 69 | #define SOFTWARE_INTERRUPT_VECTOR_ADDR (*(u_long *)0x00000008L) |
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| 70 | #define PREFETCH_ABORT_VECTOR_ADDR (*(u_long *)0x0000000CL) |
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| 71 | #define DATA_ABORT_VECTOR_ADDR (*(u_long *)0x00000010L) |
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| 72 | #define IRQ_VECTOR_ADDR (*(u_long *)0x00000018L) |
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| 73 | #define FIQ_VECTOR_ADDR (*(u_long *)0x0000001CL) |
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| 74 | |
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| 75 | #define DATA_ABORT_ISR_ADDR (*(u_long *)0x00000030L) |
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| 76 | #define IRQ_ISR_ADDR (*(u_long *)0x00000038L) |
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| 77 | #define FIQ_ISR_ADDR (*(u_long *)0x0000003CL) |
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| 78 | |
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| 79 | |
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| 80 | typedef unsigned char rtems_irq_level; |
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| 81 | typedef unsigned char rtems_irq_trigger; |
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| 82 | |
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| 83 | typedef unsigned int rtems_irq_number; |
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| 84 | struct __rtems_irq_connect_data__; /* forward declaratiuon */ |
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| 85 | |
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| 86 | typedef void (*rtems_irq_hdl) (void); |
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| 87 | typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*); |
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| 88 | typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*); |
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| 89 | typedef int (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*); |
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| 90 | |
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| 91 | //extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT]; |
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| 92 | #define VECTOR_TABLE VICVectAddrBase |
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| 93 | |
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| 94 | typedef struct __rtems_irq_connect_data__ { |
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| 95 | /* IRQ line */ |
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| 96 | rtems_irq_number name; |
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| 97 | |
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| 98 | /* Handler */ |
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| 99 | rtems_irq_hdl hdl; |
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| 100 | |
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| 101 | /* function for enabling interrupts at device level. */ |
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| 102 | rtems_irq_enable on; |
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| 103 | |
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| 104 | /* function for disabling interrupts at device level. */ |
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| 105 | rtems_irq_disable off; |
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| 106 | |
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| 107 | /* Function to test if interrupt is enabled */ |
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| 108 | rtems_irq_is_enabled isOn; |
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| 109 | |
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| 110 | /* priority level of interrupt */ |
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| 111 | rtems_irq_level irqLevel; |
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| 112 | |
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| 113 | /* Trigger method (rising/falling edge or high/low level) */ |
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| 114 | rtems_irq_trigger irqTrigger; |
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| 115 | } rtems_irq_connect_data; |
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| 116 | |
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| 117 | /* |
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| 118 | * function to initialize the interrupt for a specific BSP |
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| 119 | */ |
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| 120 | void BSP_rtems_irq_mngt_init(); |
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| 121 | |
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| 122 | |
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| 123 | /* |
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| 124 | * function to connect a particular irq handler. |
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| 125 | */ |
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| 126 | int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); |
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| 127 | |
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| 128 | /* |
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| 129 | * function to get the current RTEMS irq handler for ptr->name. |
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| 130 | */ |
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| 131 | int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); |
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| 132 | |
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| 133 | /* |
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| 134 | * function to disconnect the RTEMS irq handler for ptr->name. |
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| 135 | */ |
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| 136 | int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*); |
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| 137 | |
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| 138 | #endif /* __asm__ */ |
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| 139 | |
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| 140 | #ifdef __cplusplus |
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| 141 | } |
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| 142 | #endif |
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| 143 | |
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| 144 | #endif /* __IRQ_H__ */ |
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