source: rtems/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_init.c @ a44e045b

4.104.114.84.9
Last change on this file since a44e045b was a44e045b, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 25, 2007 at 11:51:44 AM

2007-04-25 Ray Xu <xr@…>

  • lpc22xx/irq/bsp_irq_init.c lpc22xx/irq/irq.c, lpc22xx/irq/irq.h: New (Initial submission).
  • Property mode set to 100644
File size: 1.3 KB
Line 
1/*
2 * Motorola LPC22XX Interrupt handler
3 *
4 * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
5 *     
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *
9 *  http://www.OARcorp.com/rtems/license.html.
10 *
11 *
12 *  $Id$
13 */
14#include <irq.h>
15#include <bsp.h>
16#include <lpc22xx.h>
17
18
19extern void default_int_handler();
20
21/*
22 * Interrupt system initialization. Disable interrupts, clear
23 * any that are pending.
24 */
25void BSP_rtems_irq_mngt_init()
26{
27
28    /* disable all interrupts */
29  VICIntEnClr = 0xFFFFFFFF;
30
31   
32  /*
33   * Set IRQHandler
34   */
35  IRQ_VECTOR_ADDR = 0xE59FF018;           /* LDR PC,[PC,#0x18] instruction */
36
37  /*
38   * Set FIQHandler
39   */
40  FIQ_VECTOR_ADDR = 0xE59FF018;           /* LDR PC,[PC,#0x18] instruction */
41
42  /*
43   * We does not need the next interrupt sources in the moment,
44   * therefore jump to itself.
45   */
46  UNDEFINED_INSTRUCTION_VECTOR_ADDR = 0xEAFFFFFE;
47  SOFTWARE_INTERRUPT_VECTOR_ADDR    = 0xEAFFFFFE;
48  PREFETCH_ABORT_VECTOR_ADDR        = 0xEAFFFFFE;
49
50  /*
51   * In case we must find an ABORT error,
52   * enable the next lines and set a breakpoint
53   * in ABORTHandler.
54   */ 
55#if 1
56  DATA_ABORT_VECTOR_ADDR = 0xE59FF018;
57#endif 
58
59  /*
60   * Init the Vectored Interrupt Controller (VIC)
61   */
62  VICProtection = 0;
63  VICIntSelect = 0;
64 
65
66}
67
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