source: rtems/c/src/lib/libcpu/arm/lpc22xx/irq/bsp_irq_asm.S @ 8b7e446e

4.104.114.84.95
Last change on this file since 8b7e446e was 61e293b6, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/25/07 at 11:57:13

Use current OAR license file URL.

  • Property mode set to 100644
File size: 1.1 KB
Line 
1/*
2 *  LPC22XX Intererrupt handler
3 *
4 *  Copyright (c) 2002 by Jay Monkman <jtm@lopingdog.com>
5 *
6 *  Modified by ray
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *
14 *  bsp_irq_asm.S,v 1.1 2002/11/13 17:55:06 joel Exp
15 */
16#define __asm__
17       
18/*
19 * BSP specific interrupt handler for INT or FIQ. In here
20 * you do determine which interrupt happened and call its
21 * handler.
22 */
23        .globl ExecuteITHandler
24ExecuteITHandler :
25
26/*
27 * Look at interrupt status register to determine source.
28 * From source, determine offset into expanded vector table
29 * and load handler address into r0.
30 */
31 
32  ldr   r0, =0xFFFFF030  /* Read the vector number */
33  ldr   r1, [r0]
34
35  /* find the ISR's address based on the vector VICVectAddr0 */
36  /*ldr   r0, =0xFFFFF100*/
37  /*ldr r0, [r0, r1, LSL #2]*/  /* Read the address */
38
39
40  stmdb   sp!,{lr}
41  ldr     lr, =IRQ_return         /* prepare the return from handler  */
42
43  mov     pc, r1                /* EXECUTE INT HANDLER */
44
45IRQ_return:
46  ldmia sp!,{lr}
47
48  mov pc, lr
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