4.104.114.84.95
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1 | /* |
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2 | * LPC22XX Intererrupt handler |
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3 | * |
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4 | * Copyright (c) 2002 by Jay Monkman <jtm@lopingdog.com> |
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5 | * |
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6 | * Modified by ray |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * |
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11 | * http://www.rtems.com/license/LICENSE. |
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12 | * |
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13 | * |
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14 | * bsp_irq_asm.S,v 1.1 2002/11/13 17:55:06 joel Exp |
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15 | */ |
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16 | #define __asm__ |
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17 | |
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18 | /* |
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19 | * BSP specific interrupt handler for INT or FIQ. In here |
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20 | * you do determine which interrupt happened and call its |
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21 | * handler. |
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22 | */ |
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23 | .globl ExecuteITHandler |
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24 | ExecuteITHandler : |
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25 | |
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26 | /* |
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27 | * Look at interrupt status register to determine source. |
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28 | * From source, determine offset into expanded vector table |
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29 | * and load handler address into r0. |
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30 | */ |
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31 | |
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32 | ldr r0, =0xFFFFF030 /* Read the vector number */ |
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33 | ldr r1, [r0] |
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34 | |
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35 | /* find the ISR's address based on the vector VICVectAddr0 */ |
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36 | /*ldr r0, =0xFFFFF100*/ |
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37 | /*ldr r0, [r0, r1, LSL #2]*/ /* Read the address */ |
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38 | |
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39 | |
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40 | stmdb sp!,{lr} |
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41 | ldr lr, =IRQ_return /* prepare the return from handler */ |
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42 | |
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43 | mov pc, r1 /* EXECUTE INT HANDLER */ |
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44 | |
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45 | IRQ_return: |
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46 | ldmia sp!,{lr} |
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47 | |
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48 | mov pc, lr |
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