[af85485] | 1 | /* |
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| 2 | * Interrupt handler Header file |
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| 3 | * |
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[f4dc319a] | 4 | * Copyright (c) 2010 embedded brains GmbH. |
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| 5 | * |
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[af85485] | 6 | * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com> |
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[359e537] | 7 | * |
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[af85485] | 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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| 10 | * |
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[93f4a906] | 11 | * http://www.rtems.com/license/LICENSE. |
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[af85485] | 12 | * |
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| 13 | * |
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| 14 | * $Id$ |
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| 15 | */ |
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| 16 | |
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| 17 | #ifndef __IRQ_H__ |
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| 18 | #define __IRQ_H__ |
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| 19 | |
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| 20 | #ifndef __asm__ |
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| 21 | |
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| 22 | #include <rtems.h> |
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[f4dc319a] | 23 | #include <rtems/irq.h> |
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| 24 | #include <rtems/irq-extension.h> |
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| 25 | |
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| 26 | #endif /* __asm__ */ |
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[af85485] | 27 | |
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[2c24794] | 28 | /* possible interrupt sources on the AT91RM9200 */ |
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| 29 | #define AT91RM9200_INT_FIQ 0 |
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| 30 | #define AT91RM9200_INT_SYSIRQ 1 |
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[359e537] | 31 | #define AT91RM9200_INT_PIOA 2 |
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[2c24794] | 32 | #define AT91RM9200_INT_PIOB 3 |
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| 33 | #define AT91RM9200_INT_PIOC 4 |
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| 34 | #define AT91RM9200_INT_PIOD 5 |
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| 35 | #define AT91RM9200_INT_US0 6 |
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| 36 | #define AT91RM9200_INT_US1 7 |
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| 37 | #define AT91RM9200_INT_US2 8 |
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| 38 | #define AT91RM9200_INT_US3 9 |
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| 39 | #define AT91RM9200_INT_MCI 10 |
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| 40 | #define AT91RM9200_INT_UDP 11 |
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| 41 | #define AT91RM9200_INT_TWI 12 |
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| 42 | #define AT91RM9200_INT_SPI 13 |
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| 43 | #define AT91RM9200_INT_SSC0 14 |
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| 44 | #define AT91RM9200_INT_SSC1 15 |
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| 45 | #define AT91RM9200_INT_SSC2 16 |
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| 46 | #define AT91RM9200_INT_TC0 17 |
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| 47 | #define AT91RM9200_INT_TC1 18 |
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| 48 | #define AT91RM9200_INT_TC2 19 |
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| 49 | #define AT91RM9200_INT_TC3 20 |
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| 50 | #define AT91RM9200_INT_TC4 21 |
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| 51 | #define AT91RM9200_INT_TC5 22 |
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| 52 | #define AT91RM9200_INT_UHP 23 |
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| 53 | #define AT91RM9200_INT_EMAC 24 |
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| 54 | #define AT91RM9200_INT_IRQ0 25 |
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| 55 | #define AT91RM9200_INT_IRQ1 26 |
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| 56 | #define AT91RM9200_INT_IRQ2 27 |
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| 57 | #define AT91RM9200_INT_IRQ3 28 |
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| 58 | #define AT91RM9200_INT_IRQ4 28 |
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| 59 | #define AT91RM9200_INT_IRQ5 30 |
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| 60 | #define AT91RM9200_INT_IRQ6 31 |
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| 61 | #define AT91RM9200_MAX_INT 32 |
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[af85485] | 62 | |
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[f4dc319a] | 63 | #define BSP_INTERRUPT_VECTOR_MIN 0 |
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[af85485] | 64 | |
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[f4dc319a] | 65 | #define BSP_INTERRUPT_VECTOR_MAX (AT91RM9200_MAX_INT - 1) |
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[af85485] | 66 | |
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| 67 | #endif /* __IRQ_H__ */ |
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