source: rtems/c/src/lib/libbsp/sparc64/shared/clock/ckinit.c @ c499856

4.115
Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on Mar 20, 2014 at 9:10:47 PM

Change all references of rtems.com to rtems.org.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*  ckinit.c
2 *
3 *  This file provides a template for the clock device driver initialization.
4 *
5 *  Modified for sun4v - niagara
6 *
7 *  COPYRIGHT (c) 1989-1999.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  Modifications Copyright (c) 2010 Gedare Bloom.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.org/license/LICENSE.
15 */
16
17#include <stdlib.h>
18
19#include <rtems.h>
20#include <bsp.h>
21#include <bspopts.h>
22#include <boot/ofw.h>
23
24/* this is default frequency for simics simulator of niagara. Use the
25 * get_Frequency function to determine the CPU clock frequency at runtime.
26 */
27#define CPU_FREQ (5000000)
28
29uint64_t sparc64_cycles_per_tick;
30
31/* TICK_CMPR and STICK_CMPR trigger soft interrupt 14 */
32#define CLOCK_VECTOR SPARC_SYNCHRONOUS_TRAP(0x4E)
33
34static unsigned int get_Frequency(void)
35{
36        phandle root = ofw_find_device("/");
37        unsigned int freq;
38        if (ofw_get_property(root, "clock-frequency", &freq, sizeof(freq)) <= 0) {
39                printk("Unable to determine frequency, default: 0x%x\n",CPU_FREQ);
40                return CPU_FREQ;
41        }
42
43        return freq;
44} 
45
46
47void Clock_driver_support_at_tick(void)
48{
49  uint64_t tick_reg;
50  int bit_mask;
51  uint64_t pil_reg;
52
53  bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14);
54  sparc64_clear_interrupt_bits(bit_mask);
55
56  sparc64_get_pil(pil_reg);
57  if(pil_reg == 0xe) { /* 0xe is the tick compare interrupt (softint(14)) */
58    pil_reg--;
59    sparc64_set_pil(pil_reg); /* enable the next timer interrupt */
60  }
61  /* Note: sun4v uses stick_cmpr for clock driver for M5 simulator, which
62   * does not currently have tick_cmpr implemented */
63  /* TODO: this could be more efficiently implemented as a single assembly
64   * inline */
65#if defined (SUN4U)
66  sparc64_read_tick(tick_reg);
67#elif defined (SUN4V)
68  sparc64_read_stick(tick_reg);
69#endif
70  tick_reg &= ~(1UL<<63); /* mask out NPT bit, prevents int_dis from being set */
71
72  tick_reg += sparc64_cycles_per_tick;
73
74#if defined (SUN4U)
75  sparc64_write_tick_cmpr(tick_reg);
76#elif defined (SUN4V)
77  sparc64_write_stick_cmpr(tick_reg);
78#endif
79}
80
81#define Clock_driver_support_install_isr(_new, _old) \
82  do { \
83    _old = set_vector( _new, CLOCK_VECTOR, 1 ); \
84  } while ( 0 )
85
86void Clock_driver_support_initialize_hardware(void)
87{
88  uint64_t tick_reg;   
89  int bit_mask;
90
91  bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14);
92  sparc64_clear_interrupt_bits(bit_mask);
93
94  sparc64_cycles_per_tick = rtems_configuration_get_microseconds_per_tick()*(get_Frequency()/1000000);
95
96#if defined (SUN4U)
97  sparc64_read_tick(tick_reg);
98#elif defined (SUN4V)
99  sparc64_read_stick(tick_reg);
100#endif
101
102  tick_reg &= ~(1UL<<63); /* mask out NPT bit, prevents int_dis from being set */
103  tick_reg += sparc64_cycles_per_tick;
104
105#if defined (SUN4U)
106  sparc64_write_tick_cmpr(tick_reg);
107#elif defined (SUN4V)
108  sparc64_write_stick_cmpr(tick_reg);
109#endif
110}
111
112
113#define Clock_driver_support_shutdown_hardware( ) \
114  do { \
115    \
116  } while ( 0 )
117
118
119#include "../../../shared/clockdrv_shell.h"
120
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