1 | /* GRCTM - CCSDS Time Manager - register driver interface. |
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2 | * |
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3 | * COPYRIGHT (c) 2009. |
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4 | * Cobham Gaisler AB. |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in the file LICENSE in this distribution or at |
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8 | * http://www.rtems.com/license/LICENSE. |
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9 | */ |
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10 | |
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11 | #include <drvmgr/drvmgr.h> |
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12 | #include <drvmgr/ambapp_bus.h> |
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13 | #include <stdlib.h> |
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14 | |
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15 | #include <grctm.h> |
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16 | |
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17 | /* Private structure of GRCTM driver */ |
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18 | struct grctm_priv { |
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19 | struct drvmgr_dev *dev; |
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20 | struct grctm_regs *regs; |
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21 | int open; |
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22 | |
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23 | grctm_isr_t user_isr; |
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24 | void *user_isr_arg; |
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25 | |
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26 | struct grctm_stats stats; |
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27 | }; |
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28 | |
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29 | void grctm_isr(void *data); |
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30 | |
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31 | struct amba_drv_info grctm_drv_info; |
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32 | |
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33 | void *grctm_open(int minor) |
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34 | { |
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35 | struct grctm_priv *priv; |
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36 | struct drvmgr_dev *dev; |
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37 | |
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38 | /* Get Device from Minor */ |
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39 | if ( drvmgr_get_dev(&grctm_drv_info.general, minor, &dev) ) { |
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40 | return NULL; |
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41 | } |
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42 | |
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43 | priv = dev->priv; |
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44 | if ( (priv == NULL) || priv->open ) |
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45 | return NULL; |
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46 | |
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47 | /* Set initial state of software */ |
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48 | priv->open = 1; |
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49 | |
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50 | /* Clear Statistics */ |
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51 | grctm_clr_stats(priv); |
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52 | priv->user_isr = NULL; |
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53 | priv->user_isr_arg = NULL; |
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54 | |
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55 | return priv; |
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56 | } |
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57 | |
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58 | void grctm_close(void *grctm) |
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59 | { |
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60 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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61 | |
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62 | if ( priv->open == 0 ) |
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63 | return; |
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64 | |
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65 | /* Reset Hardware */ |
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66 | grctm_reset(priv); |
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67 | |
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68 | priv->open = 0; |
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69 | } |
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70 | |
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71 | /* Hardware Reset of GRCTM */ |
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72 | int grctm_reset(void *grctm) |
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73 | { |
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74 | struct grctm_priv *priv = grctm; |
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75 | struct grctm_regs *r = priv->regs; |
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76 | |
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77 | r->grr = 0x55000001; |
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78 | |
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79 | int i = 1000; |
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80 | while ((r->grr & 1) && i > 0) { |
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81 | i--; |
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82 | } |
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83 | |
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84 | return i ? 0 : -1; |
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85 | } |
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86 | |
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87 | void grctm_int_enable(void *grctm) |
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88 | { |
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89 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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90 | |
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91 | /* Register and Enable Interrupt at Interrupt controller */ |
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92 | drvmgr_interrupt_register(priv->dev, 0, "grctm", grctm_isr, priv); |
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93 | } |
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94 | |
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95 | void grctm_int_disable(void *grctm) |
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96 | { |
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97 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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98 | |
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99 | /* Enable Interrupt at Interrupt controller */ |
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100 | drvmgr_interrupt_unregister(priv->dev, 0, grctm_isr, priv); |
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101 | } |
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102 | |
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103 | void grctm_clr_stats(void *grctm) |
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104 | { |
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105 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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106 | |
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107 | memset(&priv->stats, 0, sizeof(priv->stats)); |
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108 | } |
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109 | |
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110 | void grctm_get_stats(void *grctm, struct grctm_stats *stats) |
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111 | { |
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112 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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113 | |
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114 | memcpy(stats, &priv->stats, sizeof(priv->stats)); |
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115 | } |
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116 | |
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117 | /* Enable external synchronisation (from grctm) */ |
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118 | void grctm_enable_ext_sync(void *grctm) |
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119 | { |
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120 | struct grctm_priv *priv = grctm; |
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121 | |
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122 | priv->regs->gcr |= 0x55<<24 | 1<<9; |
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123 | } |
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124 | |
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125 | /* Disable external synchronisation (from grctm) */ |
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126 | void grctm_disable_ext_sync(void *grctm) |
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127 | { |
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128 | struct grctm_priv *priv = grctm; |
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129 | |
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130 | priv->regs->gcr &= ~((0xAA<<24) | 1<<9); |
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131 | } |
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132 | |
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133 | /* Enable TimeWire synchronisation */ |
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134 | void grctm_enable_tw_sync(void *grctm) |
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135 | { |
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136 | struct grctm_priv *priv = grctm; |
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137 | |
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138 | priv->regs->gcr |= 0x55<<24 | 1<<8; |
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139 | } |
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140 | |
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141 | /* Disable TimeWire synchronisation */ |
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142 | void grctm_disable_tw_sync(void *grctm) |
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143 | { |
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144 | struct grctm_priv *priv = grctm; |
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145 | |
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146 | priv->regs->gcr &= ~((0xAA<<24) | 1<<8); |
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147 | } |
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148 | |
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149 | /* Disable frequency synthesizer from driving ET */ |
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150 | void grctm_disable_fs(void *grctm) |
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151 | { |
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152 | struct grctm_priv *priv = grctm; |
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153 | |
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154 | priv->regs->gcr |= 0x55<<24 | 1<<7; |
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155 | } |
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156 | |
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157 | /* Enable frequency synthesizer to drive ET */ |
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158 | void grctm_enable_fs(void *grctm) |
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159 | { |
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160 | struct grctm_priv *priv = grctm; |
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161 | |
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162 | priv->regs->gcr &= ~((0xAA<<24) | 1<<7); |
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163 | } |
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164 | |
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165 | /* Return elapsed coarse time */ |
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166 | unsigned int grctm_get_et_coarse(void *grctm) |
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167 | { |
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168 | struct grctm_priv *priv = grctm; |
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169 | |
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170 | return priv->regs->etcr; |
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171 | } |
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172 | |
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173 | /* Return elapsed fine time */ |
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174 | unsigned int grctm_get_et_fine(void *grctm) |
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175 | { |
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176 | struct grctm_priv *priv = grctm; |
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177 | |
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178 | return (priv->regs->etfr & 0xffffff00) >> 8; |
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179 | } |
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180 | |
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181 | /* Return elapsed time (coarse and fine) */ |
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182 | unsigned long long grctm_get_et(void *grctm) |
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183 | { |
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184 | return (((unsigned long)grctm_get_et_coarse(grctm)) << 24) | grctm_get_et_fine(grctm); |
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185 | } |
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186 | |
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187 | |
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188 | /* Return 1 if specified datation has been latched */ |
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189 | int grctm_is_dat_latched(void *grctm, int dat) |
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190 | { |
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191 | struct grctm_priv *priv = grctm; |
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192 | |
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193 | return (priv->regs->gsr >> dat) & 1; |
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194 | } |
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195 | |
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196 | /* Set triggering edge of datation input */ |
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197 | void grctm_set_dat_edge(void *grctm, int dat, int edge) |
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198 | { |
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199 | struct grctm_priv *priv = grctm; |
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200 | |
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201 | priv->regs->gcr &= ~((0xAA<<24) | 1 << (10+dat)); |
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202 | priv->regs->gcr |= 0x55<<24 | (edge&1) << (10+dat); |
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203 | } |
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204 | |
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205 | /* Return latched datation coarse time */ |
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206 | unsigned int grctm_get_dat_coarse(void *grctm, int dat) |
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207 | { |
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208 | struct grctm_priv *priv = grctm; |
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209 | |
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210 | switch (dat) { |
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211 | case 0 : return priv->regs->dcr0; |
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212 | case 1 : return priv->regs->dcr1; |
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213 | case 2 : return priv->regs->dcr2; |
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214 | default: return -1; |
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215 | } |
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216 | } |
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217 | |
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218 | /* Return latched datation fine time */ |
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219 | unsigned int grctm_get_dat_fine(void *grctm, int dat) |
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220 | { |
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221 | struct grctm_priv *priv = grctm; |
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222 | |
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223 | switch (dat) { |
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224 | case 0 : return (priv->regs->dfr0 & 0xffffff00) >> 8; |
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225 | case 1 : return (priv->regs->dfr1 & 0xffffff00) >> 8; |
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226 | case 2 : return (priv->regs->dfr2 & 0xffffff00) >> 8; |
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227 | default: return -1; |
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228 | } |
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229 | } |
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230 | |
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231 | |
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232 | /* Return latched datation ET */ |
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233 | unsigned long long grctm_get_dat_et(void *grctm, int dat) |
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234 | { |
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235 | return (((unsigned long)grctm_get_dat_coarse(grctm, dat)) << 24) | |
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236 | grctm_get_dat_fine(grctm, dat); |
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237 | } |
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238 | |
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239 | |
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240 | /* Return current pulse configuration */ |
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241 | unsigned int grctm_get_pulse_reg(void *grctm, int pulse) |
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242 | { |
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243 | struct grctm_priv *priv = grctm; |
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244 | |
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245 | return priv->regs->pdr[pulse]; |
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246 | } |
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247 | |
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248 | /* Set pulse register */ |
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249 | void grctm_set_pulse_reg(void *grctm, int pulse, unsigned int val) |
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250 | { |
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251 | struct grctm_priv *priv = grctm; |
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252 | |
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253 | priv->regs->pdr[pulse] = val; |
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254 | } |
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255 | |
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256 | /* Configure pulse: pp = period, pw = width, pl = level, en = enable */ |
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257 | void grctm_cfg_pulse(void *grctm, int pulse, int pp, int pw, int pl, int en) |
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258 | { |
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259 | grctm_set_pulse_reg(grctm, pulse, (pp&0xf)<<20 | (pw&0xf)<<16 | (pl&1)<<10 | (en&1)<<1); |
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260 | } |
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261 | |
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262 | /* Enable pulse output */ |
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263 | void grctm_enable_pulse(void *grctm, int pulse) |
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264 | { |
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265 | struct grctm_priv *priv = grctm; |
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266 | |
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267 | priv->regs->pdr[pulse] |= 0x2; |
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268 | } |
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269 | |
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270 | /* Disable pulse output */ |
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271 | void grctm_disable_pulse(void *grctm, int pulse) |
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272 | { |
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273 | struct grctm_priv *priv = grctm; |
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274 | |
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275 | priv->regs->pdr[pulse] &= ~0x2; |
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276 | } |
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277 | |
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278 | /* Clear interrupts */ |
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279 | void grctm_clear_irqs(void *grctm, int irqs) |
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280 | { |
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281 | struct grctm_priv *priv = grctm; |
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282 | |
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283 | priv->regs->picr = irqs; |
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284 | } |
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285 | |
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286 | /* Enable interrupts */ |
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287 | void grctm_enable_irqs(void *grctm, int irqs) |
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288 | { |
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289 | struct grctm_priv *priv = grctm; |
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290 | |
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291 | priv->regs->imr = irqs; |
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292 | } |
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293 | |
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294 | /* Set Frequency synthesizer increment */ |
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295 | void grctm_set_fs_incr(void *grctm, int incr) |
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296 | { |
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297 | struct grctm_priv *priv = grctm; |
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298 | |
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299 | priv->regs->fsir = incr; |
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300 | } |
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301 | |
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302 | /* Set ET increment */ |
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303 | void grctm_set_et_incr(void *grctm, int incr) |
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304 | { |
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305 | struct grctm_priv *priv = grctm; |
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306 | |
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307 | priv->regs->etir = incr; |
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308 | } |
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309 | |
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310 | |
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311 | void grctm_isr(void *data) |
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312 | { |
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313 | struct grctm_priv *priv = data; |
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314 | struct grctm_stats *stats = &priv->stats; |
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315 | unsigned int pimr = priv->regs->pimr; |
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316 | |
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317 | if ( pimr == 0 ) |
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318 | return; |
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319 | |
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320 | stats->nirqs++; |
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321 | if (pimr & PULSE0_IRQ ) |
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322 | stats->pulse++; |
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323 | |
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324 | /* Let user Handle Interrupt */ |
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325 | if ( priv->user_isr ) |
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326 | priv->user_isr(pimr, priv->user_isr_arg); |
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327 | } |
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328 | |
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329 | struct grctm_regs *grctm_get_regs(void *grctm) |
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330 | { |
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331 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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332 | |
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333 | return priv->regs; |
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334 | } |
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335 | |
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336 | void grctm_int_register(void *grctm, grctm_isr_t func, void *data) |
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337 | { |
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338 | struct grctm_priv *priv = (struct grctm_priv *)grctm; |
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339 | |
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340 | priv->user_isr = func; |
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341 | priv->user_isr_arg = data; |
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342 | } |
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343 | |
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344 | /*** INTERFACE TO DRIVER MANAGER ***/ |
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345 | |
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346 | static int grctm_init2(struct drvmgr_dev *dev) |
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347 | { |
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348 | struct amba_dev_info *ambadev; |
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349 | struct ambapp_core *pnpinfo; |
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350 | struct grctm_priv *priv; |
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351 | struct grctm_regs *regs; |
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352 | |
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353 | priv = (struct grctm_priv *)malloc(sizeof(*priv)); |
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354 | if ( priv == NULL ) |
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355 | return -1; |
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356 | memset(priv, 0, sizeof(*priv)); |
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357 | priv->dev = dev; |
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358 | dev->priv = priv; |
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359 | |
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360 | /* Get device information from AMBA PnP information */ |
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361 | ambadev = (struct amba_dev_info *)dev->businfo; |
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362 | if ( ambadev == NULL ) { |
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363 | return -1; |
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364 | } |
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365 | pnpinfo = &ambadev->info; |
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366 | regs = (struct grctm_regs *)pnpinfo->ahb_slv->start[0]; |
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367 | |
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368 | priv->regs = regs; |
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369 | |
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370 | grctm_reset(priv); |
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371 | |
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372 | return 0; |
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373 | } |
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374 | |
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375 | struct drvmgr_drv_ops grctm_ops = |
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376 | { |
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377 | {NULL, grctm_init2, NULL, NULL}, |
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378 | NULL, |
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379 | NULL |
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380 | }; |
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381 | |
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382 | struct amba_dev_id grctm_ids[] = |
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383 | { |
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384 | {VENDOR_GAISLER, GAISLER_GRCTM}, |
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385 | {0, 0} /* Mark end of table */ |
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386 | }; |
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387 | |
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388 | struct amba_drv_info grctm_drv_info = |
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389 | { |
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390 | { |
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391 | DRVMGR_OBJ_DRV, /* Driver */ |
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392 | NULL, /* Next driver */ |
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393 | NULL, /* Device list */ |
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394 | DRIVER_AMBAPP_GAISLER_GRCTM_ID, /* Driver ID */ |
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395 | "GRCTM_DRV", /* Driver Name */ |
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396 | DRVMGR_BUS_TYPE_AMBAPP, /* Bus Type */ |
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397 | &grctm_ops, |
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398 | NULL, /* Funcs */ |
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399 | 0, /* No devices yet */ |
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400 | 0, |
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401 | }, |
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402 | &grctm_ids[0] |
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403 | }; |
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404 | |
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405 | /* Register the grctm Driver */ |
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406 | void grctm_register(void) |
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407 | { |
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408 | drvmgr_drv_register(&grctm_drv_info.general); |
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409 | } |
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