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start.S @ bc470d3c

Last change on this file since bc470d3c was bc470d3c, checked in by Jacob Hansen <jacob.hansen@…>, on 10/31/16 at 10:01:39

sparc: only define start if it is different from SYM(start)

The SYM define concatenates the input with the compiler set
USER_LABEL_PREFIX define. This define appears to be '_' in GCC but
empty in Clang. Therefore when compiling with Clang/LLVM 'SYM(start)'
and 'start' defines the same symbol, and the compiler complains that the
symbol is defined twice.

Property mode set to 100644

File size: 12.5 KB

Line
1	/**
2	* Common start code for SPARC.
3	*
4	* This is based on the file srt0.s provided with the binary
5	* distribution of the SPARC Instruction Simulator (SIS) found
6	* at ftp://ftp.estec.esa.nl/pub/ws/wsd/erc32.
7	*/
8
9	/*
10	* COPYRIGHT (c) 1989-2011.
11	* On-Line Applications Research Corporation (OAR).
12	*
13	* The license and distribution terms for this file may be
14	* found in the file LICENSE in this distribution or at
15	* http://www.rtems.org/license/LICENSE.
16	*/
17
18	#include <rtems/asm.h>
19	#include <rtems/score/percpu.h>
20	#include <bspopts.h>
21
22	#if defined(RTEMS_SMP) && defined(BSP_LEON3_SMP)
23	#define START_LEON3_ENABLE_SMP
24	#endif
25
26	/*
27	* Unexpected trap will halt the processor by forcing it to error state
28	*/
29	#define BAD_TRAP \
30	ta 0; \
31	nop; \
32	nop; \
33	nop;
34
35	/*
36	* System call optimized trap table entry
37	*/
38	#define IRQDIS_TRAP(_handler) \
39	mov %psr, %l0 ; \
40	sethi %hi(_handler), %l4 ; \
41	jmp %l4+%lo(_handler); \
42	or %l0, 0x0f00, %l3; ! Set PIL=0xf to disable IRQ
43
44	/*
45	* System call optimized trap table entry
46	*/
47	#define IRQEN_TRAP(_handler) \
48	mov %psr, %l0 ; \
49	sethi %hi(_handler), %l4 ; \
50	jmp %l4+%lo(_handler); \
51	andn %l0, 0xf00, %l3; ! Set PIL=0 to Enable IRQ
52
53	/*
54	* Window Overflow optimized trap table entry
55	*/
56	#define WOTRAP(_vector, _handler) \
57	sethi %hi(_handler), %l4; \
58	jmp %l4+%lo(_handler); \
59	save; \
60	nop
61
62	/*
63	* Window Underflow optimized trap table entry
64	*/
65	#define WUTRAP(_vector, _handler) \
66	mov %wim, %l3 ; \
67	sethi %hi(_handler), %l4 ; \
68	jmp %l4+%lo(_handler); \
69	sll %l3, 1, %l4 ! l4 = WIM << 1
70
71	/*
72	* Software trap. Treat as BAD_TRAP for the time being...
73	*/
74
75	#define SOFT_TRAP BAD_TRAP
76
77	.section ".text"
78	PUBLIC(start)
79	.global start, __bsp_mem_init
80
81	SYM(start):
82	#if SYM(start) != start
83	start:
84	#endif
85
86	/*
87	* The trap table has to be the first code in a boot PROM. But because
88	* the Memory Configuration comes up thinking we only have 4K of PROM, we
89	* cannot have a full trap table and still have room left over to
90	* reprogram the Memory Configuration register correctly. This file
91	* uses an abbreviated trap which has every entry which might be used
92	* before RTEMS installs its own trap table.
93	*/
94
95	PUBLIC(trap_table)
96	SYM(trap_table):
97
98	RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
99	BAD_TRAP; ! 01 instruction access
100	! exception
101	BAD_TRAP; ! 02 illegal instruction
102	BAD_TRAP; ! 03 privileged instruction
103	BAD_TRAP; ! 04 fp disabled
104	WOTRAP(5, SYM(window_overflow_trap_handler)); ! 05 window overflow
105	WUTRAP(6, SYM(window_underflow_trap_handler));! 06 window underflow
106	BAD_TRAP; ! 07 memory address not aligned
107	BAD_TRAP; ! 08 fp exception
108	BAD_TRAP; ! 09 data access exception
109	BAD_TRAP; ! 0A tag overflow
110	BAD_TRAP; ! 0B undefined
111	BAD_TRAP; ! 0C undefined
112	BAD_TRAP; ! 0D undefined
113	BAD_TRAP; ! 0E undefined
114	BAD_TRAP; ! 0F undefined
115	BAD_TRAP; ! 10 undefined
116
117	/*
118	* ERC32 defined traps
119	*/
120
121	BAD_TRAP; ! 11 masked errors
122	BAD_TRAP; ! 12 external 1
123	BAD_TRAP; ! 13 external 2
124	BAD_TRAP; ! 14 UART A RX/TX
125	BAD_TRAP; ! 15 UART B RX/TX
126	BAD_TRAP; ! 16 correctable memory error
127	BAD_TRAP; ! 17 UART error
128	BAD_TRAP; ! 18 DMA access error
129	BAD_TRAP; ! 19 DMA timeout
130	BAD_TRAP; ! 1A external 3
131	BAD_TRAP; ! 1B external 4
132	BAD_TRAP; ! 1C general purpose timer
133	BAD_TRAP; ! 1D real time clock
134	BAD_TRAP; ! 1E external 5
135	BAD_TRAP; ! 1F watchdog timeout
136
137	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 20 - 23 undefined
138	BAD_TRAP; ! 24 cp_disabled
139	BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 25 - 27 undefined
140	BAD_TRAP; ! 28 cp_exception
141	BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 29 - 2B undefined
142	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 2C - 2F undefined
143	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30 - 33 undefined
144	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34 - 37 undefined
145	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38 - 3B undefined
146	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3C - 3F undefined
147	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40 - 43 undefined
148	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44 - 47 undefined
149	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48 - 4B undefined
150	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4C - 4F undefined
151	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50 - 53 undefined
152	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54 - 57 undefined
153	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58 - 5B undefined
154	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5C - 5F undefined
155	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60 - 63 undefined
156	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64 - 67 undefined
157	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68 - 6B undefined
158	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6C - 6F undefined
159	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70 - 73 undefined
160	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined
161	BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined
162
163	/*
164	This is a sad patch to make sure that we know where the
165	MEC timer control register mirror is so we can stop the timers
166	from an external debugger. It is needed because the control
167	register is write-only. Trap 0x7C cannot occure in ERC32...
168
169	We also use this location to store the last location of the
170	usable RAM in order not to overwrite the remote debugger with
171	the RTEMS work-space area.
172
173	*/
174
175	.global SYM(_ERC32_MEC_Timer_Control_Mirror), SYM(rdb_start), SYM(CLOCK_SPEED)
176
177	SYM(rdb_start):
178	SYM(_ERC32_MEC_Timer_Control_Mirror):
179
180	BAD_TRAP; BAD_TRAP; ! 7C - 7D undefined
181
182	SYM(CLOCK_SPEED):
183
184	.word 0x0a, 0, 0, 0 ! 7E (10 MHz default)
185
186	BAD_TRAP; ! 7F undefined
187
188	/*
189	* Software traps
190	*
191	* NOTE: At the risk of being redundant... this is not a full
192	* table. The setjmp on the SPARC requires a window flush trap
193	* handler and RTEMS will preserve the entries that were
194	* installed before.
195	*/
196
197	TRAP( 0x80, SYM(syscall) ); ! 80 halt syscall SW trap
198	SOFT_TRAP; SOFT_TRAP; ! 81 - 82
199	TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap
200
201	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87
202	SOFT_TRAP; ! 88
203
204	/*
205	* SW Trap 9-15 Reserved for Operating System
206	*
207	* SPARC_SWTRAP_IRQDIS
208	* SPARC_SWTRAP_IRQEN
209	*/
210	IRQDIS_TRAP(SYM(syscall_irqdis)); ! 89 IRQ Disable syscall trap
211	IRQEN_TRAP(SYM(syscall_irqen)); ! 8A IRQ Enable syscall trap
212	#if SPARC_HAS_FPU == 1
213	IRQDIS_TRAP(SYM(syscall_irqdis_fp)); ! 8B IRQ disable
214	! and set PSR[EF] syscall trap
215	#else
216	SOFT_TRAP; ! 8B
217	#endif
218	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8C - 8F
219
220	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90 - 93
221	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94 - 97
222	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98 - 9B
223	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9C - 9F
224	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A0 - A3
225	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A4 - A7
226	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A8 - AB
227	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! AC - AF
228	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B0 - B3
229	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B4 - B7
230	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B8 - BB
231	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! BC - BF
232	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C0 - C3
233	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C4 - C7
234	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C8 - CB
235	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! CC - CF
236	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D0 - D3
237	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D4 - D7
238	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D8 - DB
239	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! DC - DF
240	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E0 - E3
241	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E4 - E7
242	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E8 - EB
243	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! EC - EF
244	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F0 - F3
245	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F4 - F7
246	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F8 - FB
247	SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! FC - FF
248
249	/*
250	* This is the hard reset code.
251	*/
252
253	#define PSR_INIT 0x10c0 /* Disable traps, set s and ps */
254	#define WIM_INIT 2
255	#define STACK_SIZE 16 * 1024
256
257	PUBLIC(hard_reset)
258	SYM(hard_reset):
259
260	/* Common initialisation */
261
262	set SYM(trap_table), %g1 ! Initialize TBR
263	mov %g1, %tbr
264
265	mov %psr, %g1 ! Initialize WIM
266	add %g1, 1, %g2
267	and %g2, 0x7, %g2
268	set 1, %g3
269	sll %g3, %g2, %g3
270	mov %g3, %wim
271
272	or %g1, 0xf20, %g1
273	wr %g1, %psr ! enable traps and disable ints
274
275	nop
276	nop
277	nop
278
279	sethi %hi(_Per_CPU_Information), %g6 ! get per-CPU control
280	add %g6, %lo(_Per_CPU_Information), %g6
281
282	#if defined(START_LEON3_ENABLE_SMP)
283	rd %asr17, %o0 ! get CPU identifier
284	srl %o0, LEON3_ASR17_PROCESSOR_INDEX_SHIFT, %o0
285
286	sll %o0, PER_CPU_CONTROL_SIZE_LOG2, %l0
287	add %g6, %l0, %g6
288
289	/* If LEON3_Boot_Cpu < 0 then assign us as boot CPU and continue. */
290	set SYM(LEON3_Boot_Cpu), %o1
291	ld [%o1], %o2
292	tst %o2
293	bneg .Lbootcpu
294	nop
295
296	ld [%g6 + PER_CPU_INTERRUPT_STACK_HIGH], %sp ! set stack pointer
297	sub %sp, 4, %sp ! stack starts at end of area - 4
298	andn %sp, 0x0f, %sp ! align stack on 16-byte boundary
299	mov %sp, %fp ! set frame pointer
300
301	call SYM(bsp_start_on_secondary_processor) ! does not return
302	sub %sp, SPARC_MINIMUM_STACK_FRAME_SIZE, %sp
303	.Lbootcpu:
304	st %o0, [%o1]
305	#endif
306
307	set (SYM(rdb_start)), %g5 ! End of RAM
308	st %sp, [%g5]
309	sub %sp, 4, %sp ! stack starts at end of RAM - 4
310	andn %sp, 0x0f, %sp ! align stack on 16-byte boundary
311	mov %sp, %fp ! Set frame pointer
312	nop
313
314	/*
315	* Copy the initialized data to RAM
316	*
317	* FROM: _data_load_start
318	* TO: _data_start
319	* LENGTH: (__bss_start - _data_start) bytes
320	*/
321
322	sethi %hi(_data_load_start),%g1 ! g1 = start of initialized data in ROM
323	or %g1,%lo(_data_load_start),%g1
324
325	sethi %hi(_data_start),%g3 ! g3 = start of initialized data in RAM
326	or %g3,%lo(_data_start),%g3
327
328	sethi %hi(__bss_start), %g2 ! g2 = end of initialized data in RAM
329	or %g2,%lo(__bss_start),%g2
330
331	cmp %g1, %g3
332	be 1f
333	nop
334
335	copy_data:
336	ldd [%g1], %g4
337	std %g4 , [%g3] ! copy this double word
338	add %g3, 8, %g3 ! bump the destination pointer
339	add %g1, 8, %g1 ! bump the source pointer
340	cmp %g3, %g2 ! Is the pointer past the end of dest?
341	bl copy_data
342	nop
343
344	/* clear the bss */
345	1:
346
347	sethi %hi(_end),%g3
348	or %g3,%lo(_end),%g3 ! g3 = end of bss
349	mov %g0,%g1 ! so std has two zeros
350	zerobss:
351	std %g0,[%g2]
352	add %g2,8,%g2
353	cmp %g2,%g3
354	bleu,a zerobss
355	nop
356
357	mov %g0, %o0 ! command line
358	call SYM(boot_card) ! does not return
359	sub %sp, 0x60, %sp ! room for boot_card to save args
360
361	/* end of file */

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