[e4607167] | 1 | /** |
---|
[3eec211] | 2 | * Common start code for SPARC. |
---|
| 3 | * |
---|
| 4 | * This is based on the file srt0.s provided with the binary |
---|
| 5 | * distribution of the SPARC Instruction Simulator (SIS) found |
---|
| 6 | * at ftp://ftp.estec.esa.nl/pub/ws/wsd/erc32. |
---|
[e4607167] | 7 | */ |
---|
| 8 | |
---|
| 9 | /* |
---|
| 10 | * COPYRIGHT (c) 1989-2011. |
---|
[9824dafe] | 11 | * On-Line Applications Research Corporation (OAR). |
---|
| 12 | * |
---|
| 13 | * The license and distribution terms for this file may be |
---|
| 14 | * found in the file LICENSE in this distribution or at |
---|
[c499856] | 15 | * http://www.rtems.org/license/LICENSE. |
---|
[3eec211] | 16 | */ |
---|
| 17 | |
---|
[7f01f89] | 18 | #include <rtems/asm.h> |
---|
[3d77001] | 19 | #include <rtems/score/percpu.h> |
---|
[dcf4e0f1] | 20 | #include <bspopts.h> |
---|
[3eec211] | 21 | |
---|
[e4607167] | 22 | #if defined(RTEMS_SMP) && defined(BSP_LEON3_SMP) |
---|
[3d77001] | 23 | #define START_LEON3_ENABLE_SMP |
---|
[e4607167] | 24 | #endif |
---|
| 25 | |
---|
[3eec211] | 26 | /* |
---|
| 27 | * Unexpected trap will halt the processor by forcing it to error state |
---|
| 28 | */ |
---|
| 29 | #define BAD_TRAP \ |
---|
| 30 | ta 0; \ |
---|
| 31 | nop; \ |
---|
| 32 | nop; \ |
---|
| 33 | nop; |
---|
| 34 | |
---|
[d6f1ec91] | 35 | /* |
---|
| 36 | * System call optimized trap table entry |
---|
| 37 | */ |
---|
| 38 | #define SYSCALL_TRAP(_vector, _handler) \ |
---|
| 39 | mov %psr, %l0 ; \ |
---|
| 40 | sethi %hi(_handler), %l4 ; \ |
---|
| 41 | jmp %l4+%lo(_handler); \ |
---|
| 42 | subcc %g1, 3, %g0; ! prepare for syscall 3 check |
---|
| 43 | |
---|
[3eec211] | 44 | /* |
---|
| 45 | * Software trap. Treat as BAD_TRAP for the time being... |
---|
| 46 | */ |
---|
| 47 | |
---|
| 48 | #define SOFT_TRAP BAD_TRAP |
---|
| 49 | |
---|
| 50 | .seg "text" |
---|
| 51 | PUBLIC(start) |
---|
| 52 | .global start, __bsp_mem_init |
---|
| 53 | |
---|
| 54 | SYM(start): |
---|
| 55 | start: |
---|
| 56 | |
---|
[6128a4a] | 57 | /* |
---|
[3eec211] | 58 | * The trap table has to be the first code in a boot PROM. But because |
---|
| 59 | * the Memory Configuration comes up thinking we only have 4K of PROM, we |
---|
[6128a4a] | 60 | * cannot have a full trap table and still have room left over to |
---|
[3eec211] | 61 | * reprogram the Memory Configuration register correctly. This file |
---|
| 62 | * uses an abbreviated trap which has every entry which might be used |
---|
| 63 | * before RTEMS installs its own trap table. |
---|
| 64 | */ |
---|
| 65 | |
---|
| 66 | PUBLIC(trap_table) |
---|
| 67 | SYM(trap_table): |
---|
| 68 | |
---|
[0091a875] | 69 | RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap |
---|
[44b06ca] | 70 | BAD_TRAP; ! 01 instruction access |
---|
[3eec211] | 71 | ! exception |
---|
| 72 | BAD_TRAP; ! 02 illegal instruction |
---|
| 73 | BAD_TRAP; ! 03 privileged instruction |
---|
| 74 | BAD_TRAP; ! 04 fp disabled |
---|
| 75 | TRAP( 5, SYM(window_overflow_trap_handler) ); ! 05 window overflow |
---|
| 76 | TRAP( 6, SYM(window_underflow_trap_handler) );! 06 window underflow |
---|
| 77 | BAD_TRAP; ! 07 memory address not aligned |
---|
| 78 | BAD_TRAP; ! 08 fp exception |
---|
| 79 | BAD_TRAP; ! 09 data access exception |
---|
| 80 | BAD_TRAP; ! 0A tag overflow |
---|
| 81 | BAD_TRAP; ! 0B undefined |
---|
| 82 | BAD_TRAP; ! 0C undefined |
---|
| 83 | BAD_TRAP; ! 0D undefined |
---|
| 84 | BAD_TRAP; ! 0E undefined |
---|
| 85 | BAD_TRAP; ! 0F undefined |
---|
| 86 | BAD_TRAP; ! 10 undefined |
---|
| 87 | |
---|
[6128a4a] | 88 | /* |
---|
[3eec211] | 89 | * ERC32 defined traps |
---|
| 90 | */ |
---|
| 91 | |
---|
| 92 | BAD_TRAP; ! 11 masked errors |
---|
| 93 | BAD_TRAP; ! 12 external 1 |
---|
| 94 | BAD_TRAP; ! 13 external 2 |
---|
| 95 | BAD_TRAP; ! 14 UART A RX/TX |
---|
| 96 | BAD_TRAP; ! 15 UART B RX/TX |
---|
| 97 | BAD_TRAP; ! 16 correctable memory error |
---|
| 98 | BAD_TRAP; ! 17 UART error |
---|
| 99 | BAD_TRAP; ! 18 DMA access error |
---|
| 100 | BAD_TRAP; ! 19 DMA timeout |
---|
| 101 | BAD_TRAP; ! 1A external 3 |
---|
| 102 | BAD_TRAP; ! 1B external 4 |
---|
| 103 | BAD_TRAP; ! 1C general purpose timer |
---|
| 104 | BAD_TRAP; ! 1D real time clock |
---|
| 105 | BAD_TRAP; ! 1E external 5 |
---|
| 106 | BAD_TRAP; ! 1F watchdog timeout |
---|
| 107 | |
---|
| 108 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 20 - 23 undefined |
---|
| 109 | BAD_TRAP; ! 24 cp_disabled |
---|
| 110 | BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 25 - 27 undefined |
---|
| 111 | BAD_TRAP; ! 28 cp_exception |
---|
| 112 | BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 29 - 2B undefined |
---|
| 113 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 2C - 2F undefined |
---|
| 114 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30 - 33 undefined |
---|
| 115 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34 - 37 undefined |
---|
| 116 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38 - 3B undefined |
---|
| 117 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3C - 3F undefined |
---|
| 118 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40 - 43 undefined |
---|
| 119 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44 - 47 undefined |
---|
| 120 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48 - 4B undefined |
---|
| 121 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4C - 4F undefined |
---|
| 122 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50 - 53 undefined |
---|
| 123 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54 - 57 undefined |
---|
| 124 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58 - 5B undefined |
---|
| 125 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5C - 5F undefined |
---|
| 126 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60 - 63 undefined |
---|
| 127 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64 - 67 undefined |
---|
| 128 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68 - 6B undefined |
---|
| 129 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6C - 6F undefined |
---|
| 130 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70 - 73 undefined |
---|
| 131 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined |
---|
| 132 | BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined |
---|
| 133 | |
---|
[6128a4a] | 134 | /* |
---|
[3eec211] | 135 | This is a sad patch to make sure that we know where the |
---|
| 136 | MEC timer control register mirror is so we can stop the timers |
---|
| 137 | from an external debugger. It is needed because the control |
---|
| 138 | register is write-only. Trap 0x7C cannot occure in ERC32... |
---|
| 139 | |
---|
| 140 | We also use this location to store the last location of the |
---|
| 141 | usable RAM in order not to overwrite the remote debugger with |
---|
| 142 | the RTEMS work-space area. |
---|
| 143 | |
---|
| 144 | */ |
---|
| 145 | |
---|
| 146 | .global SYM(_ERC32_MEC_Timer_Control_Mirror), SYM(rdb_start), SYM(CLOCK_SPEED) |
---|
| 147 | |
---|
| 148 | SYM(rdb_start): |
---|
| 149 | SYM(_ERC32_MEC_Timer_Control_Mirror): |
---|
| 150 | |
---|
| 151 | BAD_TRAP; BAD_TRAP; ! 7C - 7D undefined |
---|
| 152 | |
---|
| 153 | SYM(CLOCK_SPEED): |
---|
| 154 | |
---|
| 155 | .word 0x0a, 0, 0, 0 ! 7E (10 MHz default) |
---|
[6128a4a] | 156 | |
---|
[3eec211] | 157 | BAD_TRAP; ! 7F undefined |
---|
| 158 | |
---|
[6128a4a] | 159 | /* |
---|
[3eec211] | 160 | * Software traps |
---|
| 161 | * |
---|
| 162 | * NOTE: At the risk of being redundant... this is not a full |
---|
| 163 | * table. The setjmp on the SPARC requires a window flush trap |
---|
| 164 | * handler and RTEMS will preserve the entries that were |
---|
| 165 | * installed before. |
---|
| 166 | */ |
---|
| 167 | |
---|
[d6f1ec91] | 168 | SYSCALL_TRAP( 0x80, SYM(syscall) ); ! 80 syscall SW trap |
---|
[3eec211] | 169 | SOFT_TRAP; SOFT_TRAP; ! 81 - 82 |
---|
| 170 | TRAP( 0x83, SYM(window_flush_trap_handler) ); ! 83 flush windows SW trap |
---|
| 171 | |
---|
| 172 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87 |
---|
| 173 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88 - 8B |
---|
| 174 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8C - 8F |
---|
| 175 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90 - 93 |
---|
| 176 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94 - 97 |
---|
| 177 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98 - 9B |
---|
| 178 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9C - 9F |
---|
| 179 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A0 - A3 |
---|
| 180 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A4 - A7 |
---|
| 181 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A8 - AB |
---|
| 182 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! AC - AF |
---|
| 183 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B0 - B3 |
---|
| 184 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B4 - B7 |
---|
| 185 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B8 - BB |
---|
| 186 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! BC - BF |
---|
| 187 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C0 - C3 |
---|
| 188 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C4 - C7 |
---|
| 189 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C8 - CB |
---|
| 190 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! CC - CF |
---|
| 191 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D0 - D3 |
---|
| 192 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D4 - D7 |
---|
| 193 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D8 - DB |
---|
| 194 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! DC - DF |
---|
| 195 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E0 - E3 |
---|
| 196 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E4 - E7 |
---|
| 197 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E8 - EB |
---|
| 198 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! EC - EF |
---|
| 199 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F0 - F3 |
---|
| 200 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F4 - F7 |
---|
| 201 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F8 - FB |
---|
| 202 | SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! FC - FF |
---|
| 203 | |
---|
| 204 | /* |
---|
| 205 | * This is the hard reset code. |
---|
| 206 | */ |
---|
| 207 | |
---|
| 208 | #define PSR_INIT 0x10c0 /* Disable traps, set s and ps */ |
---|
| 209 | #define WIM_INIT 2 |
---|
| 210 | #define STACK_SIZE 16 * 1024 |
---|
| 211 | |
---|
| 212 | PUBLIC(hard_reset) |
---|
| 213 | SYM(hard_reset): |
---|
| 214 | |
---|
| 215 | /* Common initialisation */ |
---|
| 216 | |
---|
[f077f332] | 217 | set SYM(trap_table), %g1 ! Initialize TBR |
---|
[3eec211] | 218 | mov %g1, %tbr |
---|
| 219 | |
---|
[f077f332] | 220 | mov %psr, %g1 ! Initialize WIM |
---|
| 221 | add %g1, 1, %g2 |
---|
| 222 | and %g2, 0x7, %g2 |
---|
| 223 | set 1, %g3 |
---|
| 224 | sll %g3, %g2, %g3 |
---|
[6128a4a] | 225 | mov %g3, %wim |
---|
[3eec211] | 226 | |
---|
[b3211b5a] | 227 | or %g1, 0xf20, %g1 |
---|
| 228 | wr %g1, %psr ! enable traps and disable ints |
---|
[3eec211] | 229 | |
---|
| 230 | nop |
---|
| 231 | nop |
---|
| 232 | nop |
---|
| 233 | |
---|
[7c0bd74] | 234 | sethi %hi(_Per_CPU_Information), %g6 ! get per-CPU control |
---|
| 235 | add %g6, %lo(_Per_CPU_Information), %g6 |
---|
| 236 | |
---|
[3d77001] | 237 | #if defined(START_LEON3_ENABLE_SMP) |
---|
| 238 | rd %asr17, %o0 ! get CPU identifier |
---|
[ad56361] | 239 | srl %o0, LEON3_ASR17_PROCESSOR_INDEX_SHIFT, %o0 |
---|
[3d77001] | 240 | |
---|
| 241 | cmp %o0, 0 |
---|
[e4607167] | 242 | beq cpu0 |
---|
[3d77001] | 243 | nop |
---|
| 244 | |
---|
[7c0bd74] | 245 | sll %o0, PER_CPU_CONTROL_SIZE_LOG2, %l0 |
---|
| 246 | add %g6, %l0, %g6 |
---|
[3d77001] | 247 | |
---|
[7c0bd74] | 248 | ld [%g6 + PER_CPU_INTERRUPT_STACK_HIGH], %sp ! set stack pointer |
---|
[3d77001] | 249 | sub %sp, 4, %sp ! stack starts at end of area - 4 |
---|
| 250 | andn %sp, 0x0f, %sp ! align stack on 16-byte boundary |
---|
| 251 | mov %sp, %fp ! set frame pointer |
---|
| 252 | |
---|
[6c5c2f3] | 253 | call SYM(bsp_start_on_secondary_processor) ! does not return |
---|
[3d77001] | 254 | sub %sp, CPU_MINIMUM_STACK_FRAME_SIZE, %sp |
---|
[e4607167] | 255 | cpu0: |
---|
| 256 | #endif |
---|
| 257 | |
---|
[7c0bd74] | 258 | set (SYM(rdb_start)), %g5 ! End of RAM |
---|
| 259 | st %sp, [%g5] |
---|
[08ed3c3] | 260 | sub %sp, 4, %sp ! stack starts at end of RAM - 4 |
---|
[3eec211] | 261 | andn %sp, 0x0f, %sp ! align stack on 16-byte boundary |
---|
| 262 | mov %sp, %fp ! Set frame pointer |
---|
| 263 | nop |
---|
| 264 | |
---|
[0091a875] | 265 | #if ENABLE_SIS_QUIRKS==1 |
---|
| 266 | |
---|
| 267 | #include <erc32.h> |
---|
[44b06ca] | 268 | |
---|
[0091a875] | 269 | /* Check if MEC is initialised. If not, this means that we are |
---|
| 270 | running on the simulator. Initiate some of the parameters |
---|
| 271 | that are done by the boot-prom otherwise. |
---|
| 272 | */ |
---|
| 273 | |
---|
| 274 | set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals |
---|
[44b06ca] | 275 | ld [%g3], %g2 |
---|
[0091a875] | 276 | set 0xfe080000, %g1 |
---|
| 277 | andcc %g1, %g2, %g0 |
---|
| 278 | bne 2f |
---|
[44b06ca] | 279 | |
---|
[0091a875] | 280 | /* Set the correct memory size in MEC memory config register */ |
---|
[44b06ca] | 281 | |
---|
| 282 | set SYM(PROM_SIZE), %l0 |
---|
[0091a875] | 283 | set 0, %l1 |
---|
| 284 | srl %l0, 18, %l0 |
---|
| 285 | 1: |
---|
| 286 | tst %l0 |
---|
| 287 | srl %l0, 1, %l0 |
---|
| 288 | bne,a 1b |
---|
| 289 | inc %l1 |
---|
| 290 | sll %l1, 8, %l1 |
---|
[44b06ca] | 291 | |
---|
| 292 | set SYM(RAM_SIZE), %l0 |
---|
[0091a875] | 293 | srl %l0, 19, %l0 |
---|
| 294 | 1: |
---|
| 295 | tst %l0 |
---|
| 296 | srl %l0, 1, %l0 |
---|
| 297 | bne,a 1b |
---|
| 298 | inc %l1 |
---|
| 299 | sll %l1, 10, %l1 |
---|
[44b06ca] | 300 | |
---|
[0091a875] | 301 | ! set the Memory Configuration |
---|
| 302 | st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ] |
---|
| 303 | !DISABLE THE HARDWARE WATCHDOG |
---|
| 304 | st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ] |
---|
| 305 | !Reduce the number of wait states to 0 for all memory areas. |
---|
| 306 | st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ] |
---|
[44b06ca] | 307 | |
---|
[0091a875] | 308 | set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker |
---|
| 309 | set SYM(RAM_SIZE), %l2 |
---|
| 310 | add %l1, %l2, %sp |
---|
[7c0bd74] | 311 | st %sp, [%g5] |
---|
[0091a875] | 312 | |
---|
| 313 | |
---|
[7c0bd74] | 314 | set SYM(CLOCK_SPEED), %g5 ! Use 14 MHz in simulator |
---|
[0091a875] | 315 | set 14, %g1 |
---|
[7c0bd74] | 316 | st %g1, [%g5] |
---|
[44b06ca] | 317 | |
---|
| 318 | 2: |
---|
| 319 | #endif |
---|
[0091a875] | 320 | |
---|
[3eec211] | 321 | /* |
---|
| 322 | * Copy the initialized data to RAM |
---|
| 323 | * |
---|
[6128a4a] | 324 | * FROM: _endtext |
---|
| 325 | * TO: _data_start |
---|
[3eec211] | 326 | * LENGTH: (__bss_start - _data_start) bytes |
---|
| 327 | */ |
---|
[6128a4a] | 328 | |
---|
[b2d191e] | 329 | sethi %hi(_endtext),%g1 |
---|
| 330 | or %g1,%lo(_endtext),%g1 ! g1 = start of initialized data in ROM |
---|
[3eec211] | 331 | |
---|
| 332 | sethi %hi(_data_start),%g3 |
---|
| 333 | or %g3,%lo(_data_start),%g3 ! g3 = start of initialized data in RAM |
---|
| 334 | |
---|
[b2d191e] | 335 | sethi %hi(__bss_start), %g2 |
---|
| 336 | or %g2,%lo(__bss_start),%g2 ! g2 = end of initialized data in RAM |
---|
[3eec211] | 337 | |
---|
[b2d191e] | 338 | cmp %g1, %g3 |
---|
[3eec211] | 339 | be 1f |
---|
| 340 | nop |
---|
| 341 | |
---|
| 342 | copy_data: |
---|
[b2d191e] | 343 | ldd [%g1], %g4 |
---|
| 344 | std %g4 , [%g3] ! copy this double word |
---|
[3eec211] | 345 | add %g3, 8, %g3 ! bump the destination pointer |
---|
[b2d191e] | 346 | add %g1, 8, %g1 ! bump the source pointer |
---|
| 347 | cmp %g3, %g2 ! Is the pointer past the end of dest? |
---|
[3eec211] | 348 | bl copy_data |
---|
| 349 | nop |
---|
| 350 | |
---|
| 351 | /* clear the bss */ |
---|
| 352 | 1: |
---|
| 353 | |
---|
| 354 | sethi %hi(_end),%g3 |
---|
| 355 | or %g3,%lo(_end),%g3 ! g3 = end of bss |
---|
| 356 | mov %g0,%g1 ! so std has two zeros |
---|
| 357 | zerobss: |
---|
| 358 | std %g0,[%g2] |
---|
| 359 | add %g2,8,%g2 |
---|
| 360 | cmp %g2,%g3 |
---|
| 361 | bleu,a zerobss |
---|
| 362 | nop |
---|
| 363 | |
---|
[68e27077] | 364 | mov %0, %o0 ! command line |
---|
[dfc2786d] | 365 | call SYM(boot_card) ! does not return |
---|
| 366 | sub %sp, 0x60, %sp ! room for boot_card to save args |
---|
[3eec211] | 367 | |
---|
[07713db6] | 368 | #if !defined(START_LEON3_ENABLE_SMP) |
---|
[a3e8ab2] | 369 | PUBLIC(bsp_reset) |
---|
| 370 | SYM(bsp_reset): |
---|
[ce4a7ae] | 371 | call SYM(BSP_fatal_exit) |
---|
| 372 | clr %o0 |
---|
[07713db6] | 373 | #endif |
---|
[3eec211] | 374 | |
---|
| 375 | /* end of file */ |
---|