1 | /* GR-TMTC-1553 PCI Target driver. |
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2 | * |
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3 | * COPYRIGHT (c) 2008. |
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4 | * Cobham Gaisler AB. |
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5 | * |
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6 | * Configures the GR-TMTC-1553 interface PCI board. |
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7 | * This driver provides a AMBA PnP bus by using the general part |
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8 | * of the AMBA PnP bus driver (ambapp_bus.c). |
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9 | * |
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10 | * Driver resources for the AMBA PnP bus provided can be set using |
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11 | * gr_tmtc_1553_set_resources(). |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in found in the file LICENSE in this distribution or at |
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15 | * http://www.rtems.org/license/LICENSE. |
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16 | */ |
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17 | |
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18 | #include <stdio.h> |
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19 | #include <stdlib.h> |
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20 | #include <string.h> |
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21 | #include <sys/types.h> |
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22 | #include <sys/stat.h> |
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23 | |
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24 | #include <bsp.h> |
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25 | #include <rtems/bspIo.h> |
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26 | #include <rtems/score/isrlock.h> /* spin-lock */ |
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27 | #include <pci.h> |
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28 | #include <pci/access.h> |
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29 | |
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30 | #include <ambapp.h> |
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31 | #include <grlib.h> |
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32 | #include <drvmgr/drvmgr.h> |
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33 | #include <drvmgr/ambapp_bus.h> |
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34 | #include <drvmgr/pci_bus.h> |
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35 | #include <drvmgr/bspcommon.h> |
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36 | #include <bsp/genirq.h> |
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37 | |
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38 | #include <bsp/gr_tmtc_1553.h> |
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39 | |
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40 | /* map via rtems_interrupt_lock_* API: */ |
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41 | #define SPIN_DECLARE(lock) RTEMS_INTERRUPT_LOCK_MEMBER(lock) |
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42 | #define SPIN_INIT(lock, name) rtems_interrupt_lock_initialize(lock, name) |
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43 | #define SPIN_LOCK(lock, level) rtems_interrupt_lock_acquire_isr(lock, &level) |
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44 | #define SPIN_LOCK_IRQ(lock, level) rtems_interrupt_lock_acquire(lock, &level) |
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45 | #define SPIN_UNLOCK(lock, level) rtems_interrupt_lock_release_isr(lock, &level) |
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46 | #define SPIN_UNLOCK_IRQ(lock, level) rtems_interrupt_lock_release(lock, &level) |
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47 | #define SPIN_IRQFLAGS(k) rtems_interrupt_lock_context k |
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48 | #define SPIN_ISR_IRQFLAGS(k) SPIN_IRQFLAGS(k) |
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49 | |
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50 | /*#define DEBUG 1 */ |
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51 | |
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52 | #ifdef DEBUG |
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53 | #define DBG(x...) printk(x) |
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54 | #else |
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55 | #define DBG(x...) |
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56 | #endif |
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57 | |
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58 | /* PCI ID */ |
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59 | #define PCIID_VENDOR_GAISLER 0x1AC8 |
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60 | |
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61 | int gr_tmtc_1553_init1(struct drvmgr_dev *dev); |
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62 | int gr_tmtc_1553_init2(struct drvmgr_dev *dev); |
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63 | void gr_tmtc_1553_isr (void *arg); |
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64 | |
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65 | struct gr_tmtc_1553_ver { |
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66 | const unsigned int amba_freq_hz; /* The frequency */ |
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67 | const unsigned int amba_ioarea; /* The address where the PnP IOAREA starts at */ |
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68 | }; |
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69 | |
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70 | /* Private data structure for driver */ |
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71 | struct gr_tmtc_1553_priv { |
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72 | /* Driver management */ |
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73 | struct drvmgr_dev *dev; |
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74 | char prefix[32]; |
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75 | SPIN_DECLARE(devlock); |
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76 | |
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77 | /* PCI */ |
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78 | pci_dev_t pcidev; |
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79 | struct pci_dev_info *devinfo; |
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80 | |
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81 | /* IRQ */ |
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82 | genirq_t genirq; |
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83 | |
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84 | struct gr_tmtc_1553_ver *version; |
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85 | struct irqmp_regs *irq; |
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86 | struct drvmgr_map_entry bus_maps_down[2]; |
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87 | |
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88 | struct ambapp_bus abus; |
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89 | struct ambapp_mmap amba_maps[4]; |
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90 | struct ambapp_config config; |
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91 | }; |
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92 | |
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93 | struct gr_tmtc_1553_ver gr_tmtc_1553_ver0 = { |
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94 | .amba_freq_hz = 33333333, |
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95 | .amba_ioarea = 0xfff00000, |
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96 | }; |
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97 | |
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98 | |
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99 | int ambapp_tmtc_1553_int_register( |
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100 | struct drvmgr_dev *dev, |
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101 | int irq, |
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102 | const char *info, |
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103 | drvmgr_isr handler, |
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104 | void *arg); |
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105 | int ambapp_tmtc_1553_int_unregister( |
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106 | struct drvmgr_dev *dev, |
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107 | int irq, |
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108 | drvmgr_isr handler, |
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109 | void *arg); |
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110 | int ambapp_tmtc_1553_int_unmask( |
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111 | struct drvmgr_dev *dev, |
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112 | int irq); |
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113 | int ambapp_tmtc_1553_int_mask( |
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114 | struct drvmgr_dev *dev, |
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115 | int irq); |
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116 | int ambapp_tmtc_1553_int_clear( |
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117 | struct drvmgr_dev *dev, |
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118 | int irq); |
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119 | int ambapp_tmtc_1553_get_params( |
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120 | struct drvmgr_dev *dev, |
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121 | struct drvmgr_bus_params *params); |
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122 | |
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123 | struct ambapp_ops ambapp_tmtc_1553_ops = { |
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124 | .int_register = ambapp_tmtc_1553_int_register, |
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125 | .int_unregister = ambapp_tmtc_1553_int_unregister, |
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126 | .int_unmask = ambapp_tmtc_1553_int_unmask, |
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127 | .int_mask = ambapp_tmtc_1553_int_mask, |
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128 | .int_clear = ambapp_tmtc_1553_int_clear, |
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129 | .get_params = ambapp_tmtc_1553_get_params |
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130 | }; |
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131 | |
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132 | struct drvmgr_drv_ops gr_tmtc_1553_ops = |
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133 | { |
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134 | {gr_tmtc_1553_init1, gr_tmtc_1553_init2, NULL, NULL}, |
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135 | NULL, |
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136 | NULL |
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137 | }; |
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138 | |
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139 | struct pci_dev_id_match gr_tmtc_1553_ids[] = |
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140 | { |
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141 | PCIID_DEVVEND(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_TMTC_1553), |
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142 | PCIID_END_TABLE /* Mark end of table */ |
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143 | }; |
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144 | |
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145 | struct pci_drv_info gr_tmtc_1553_info = |
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146 | { |
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147 | { |
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148 | DRVMGR_OBJ_DRV, /* Driver */ |
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149 | NULL, /* Next driver */ |
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150 | NULL, /* Device list */ |
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151 | DRIVER_PCI_GAISLER_TMTC_1553_ID, /* Driver ID */ |
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152 | "GR-TMTC-1553_DRV", /* Driver Name */ |
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153 | DRVMGR_BUS_TYPE_PCI, /* Bus Type */ |
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154 | &gr_tmtc_1553_ops, |
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155 | NULL, /* Funcs */ |
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156 | 0, /* No devices yet */ |
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157 | 0, |
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158 | }, |
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159 | &gr_tmtc_1553_ids[0] |
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160 | }; |
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161 | |
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162 | /* Driver resources configuration for the AMBA bus on the GR-RASTA-IO board. |
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163 | * It is declared weak so that the user may override it from the project file, |
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164 | * if the default settings are not enough. |
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165 | * |
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166 | * The configuration consists of an array of configuration pointers, each |
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167 | * pointer determine the configuration of one GR-RASTA-IO board. Pointer |
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168 | * zero is for board0, pointer 1 for board1 and so on. |
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169 | * |
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170 | * The array must end with a NULL pointer. |
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171 | */ |
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172 | struct drvmgr_bus_res *gr_tmtc_1553_resources[] __attribute__((weak)) = |
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173 | { |
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174 | NULL |
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175 | }; |
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176 | |
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177 | void gr_tmtc_1553_register_drv(void) |
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178 | { |
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179 | DBG("Registering GR-TMTC-1553 PCI driver\n"); |
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180 | drvmgr_drv_register(&gr_tmtc_1553_info.general); |
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181 | } |
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182 | |
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183 | void gr_tmtc_1553_isr (void *arg) |
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184 | { |
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185 | struct gr_tmtc_1553_priv *priv = arg; |
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186 | unsigned int status, tmp; |
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187 | int irq; |
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188 | SPIN_ISR_IRQFLAGS(irqflags); |
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189 | |
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190 | tmp = status = priv->irq->ipend; |
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191 | |
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192 | /* DBG("GR-RASTA-IO: IRQ 0x%x\n",status); */ |
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193 | |
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194 | SPIN_LOCK(&priv->devlock, irqflags); |
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195 | for(irq=0; irq<16; irq++) { |
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196 | if ( status & (1<<irq) ) { |
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197 | genirq_doirq(priv->genirq, irq); |
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198 | priv->irq->iclear = (1<<irq); |
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199 | status &= ~(1<<irq); |
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200 | if ( status == 0 ) |
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201 | break; |
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202 | } |
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203 | } |
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204 | SPIN_UNLOCK(&priv->devlock, irqflags); |
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205 | |
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206 | /* ACK interrupt, this is because PCI is Level, so the IRQ Controller still drives the IRQ. */ |
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207 | if ( tmp ) |
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208 | drvmgr_interrupt_clear(priv->dev, 0); |
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209 | |
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210 | DBG("GR-TMTC-1553-IRQ: 0x%x\n", tmp); |
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211 | } |
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212 | |
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213 | static int gr_tmtc_1553_hw_init(struct gr_tmtc_1553_priv *priv) |
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214 | { |
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215 | unsigned int *page0 = NULL; |
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216 | struct ambapp_dev *tmp; |
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217 | unsigned int pci_freq_hz; |
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218 | struct pci_dev_info *devinfo = priv->devinfo; |
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219 | uint32_t bar0, bar0_size; |
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220 | |
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221 | /* Select version of GR-TMTC-1553 board */ |
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222 | switch (devinfo->rev) { |
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223 | case 0: |
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224 | priv->version = &gr_tmtc_1553_ver0; |
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225 | break; |
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226 | default: |
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227 | return -2; |
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228 | } |
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229 | |
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230 | bar0 = devinfo->resources[0].address; |
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231 | bar0_size = devinfo->resources[0].size; |
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232 | page0 = (unsigned int *)(bar0 + bar0_size/2); |
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233 | |
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234 | /* Point PAGE0 to start of board address map. RAM at 0xff000000, APB at 0xffc00000, IOAREA at 0xfff000000 */ |
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235 | /* XXX We assume little endian host with byte twisting enabled here */ |
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236 | *page0 = 0x010000ff; /* Set little endian mode on peripheral. */ |
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237 | |
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238 | /* Scan AMBA Plug&Play */ |
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239 | |
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240 | /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */ |
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241 | priv->amba_maps[0].size = 0x1000000; |
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242 | priv->amba_maps[0].local_adr = bar0; |
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243 | priv->amba_maps[0].remote_adr = 0xff000000; |
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244 | |
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245 | /* Addresses not matching with map be untouched */ |
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246 | priv->amba_maps[2].size = 0xfffffff0; |
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247 | priv->amba_maps[2].local_adr = 0; |
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248 | priv->amba_maps[2].remote_adr = 0; |
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249 | |
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250 | /* Mark end of table */ |
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251 | priv->amba_maps[3].size=0; |
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252 | priv->amba_maps[3].local_adr = 0; |
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253 | priv->amba_maps[3].remote_adr = 0; |
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254 | |
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255 | /* Start AMBA PnP scan at first AHB bus */ |
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256 | ambapp_scan(&priv->abus, |
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257 | bar0 + (priv->version->amba_ioarea & ~0xff000000), |
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258 | NULL, &priv->amba_maps[0]); |
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259 | |
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260 | /* Frequency is the hsame as the PCI bus frequency */ |
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261 | drvmgr_freq_get(priv->dev, 0, &pci_freq_hz); |
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262 | |
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263 | ambapp_freq_init(&priv->abus, NULL, pci_freq_hz); |
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264 | |
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265 | /* Find IRQ controller */ |
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266 | tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus, |
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267 | (OPTIONS_ALL|OPTIONS_APB_SLVS), |
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268 | VENDOR_GAISLER, GAISLER_IRQMP, |
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269 | ambapp_find_by_idx, NULL); |
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270 | if ( !tmp ) { |
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271 | return -4; |
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272 | } |
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273 | priv->irq = (struct irqmp_regs *)DEV_TO_APB(tmp)->start; |
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274 | /* Set up irq controller */ |
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275 | priv->irq->mask[0] = 0; |
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276 | priv->irq->iclear = 0xffff; |
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277 | priv->irq->ilevel = 0; |
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278 | |
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279 | /* DOWN streams translation table */ |
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280 | priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA"; |
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281 | priv->bus_maps_down[0].size = priv->amba_maps[0].size; |
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282 | priv->bus_maps_down[0].from_adr = (void *)priv->amba_maps[0].local_adr; |
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283 | priv->bus_maps_down[0].to_adr = (void *)priv->amba_maps[0].remote_adr; |
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284 | /* Mark end of translation table */ |
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285 | priv->bus_maps_down[1].size = 0; |
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286 | |
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287 | /* Successfully registered the board */ |
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288 | return 0; |
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289 | } |
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290 | |
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291 | |
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292 | /* Called when a PCI target is found with the PCI device and vendor ID |
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293 | * given in gr_tmtc_1553_ids[]. |
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294 | */ |
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295 | int gr_tmtc_1553_init1(struct drvmgr_dev *dev) |
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296 | { |
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297 | struct gr_tmtc_1553_priv *priv; |
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298 | struct pci_dev_info *devinfo; |
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299 | int status; |
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300 | uint32_t bar0, bar0_size; |
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301 | int resources_cnt; |
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302 | |
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303 | /* PCI device does not have the IRQ line register, when PCI autoconf configures it the configuration |
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304 | * is forgotten. We take the IRQ number from the PCI Host device (AMBA device), this works as long |
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305 | * as PCI-IRQs are ored together on the bus. |
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306 | * |
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307 | * Note that this only works on LEON. |
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308 | */ |
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309 | ((struct pci_dev_info *)dev->businfo)->irq = ((struct amba_dev_info *)dev->parent->dev->businfo)->info.irq; |
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310 | |
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311 | priv = malloc(sizeof(struct gr_tmtc_1553_priv)); |
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312 | if ( !priv ) |
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313 | return DRVMGR_NOMEM; |
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314 | |
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315 | memset(priv, 0, sizeof(*priv)); |
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316 | dev->priv = priv; |
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317 | priv->dev = dev; |
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318 | |
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319 | /* Determine number of configurations */ |
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320 | resources_cnt = get_resarray_count(gr_tmtc_1553_resources); |
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321 | |
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322 | /* Generate Device prefix */ |
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323 | |
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324 | strcpy(priv->prefix, "/dev/tmtc1553_0"); |
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325 | priv->prefix[14] += dev->minor_drv; |
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326 | mkdir(priv->prefix, S_IRWXU | S_IRWXG | S_IRWXO); |
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327 | priv->prefix[15] = '/'; |
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328 | priv->prefix[16] = '\0'; |
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329 | |
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330 | priv->devinfo = devinfo = (struct pci_dev_info *)dev->businfo; |
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331 | priv->pcidev = devinfo->pcidev; |
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332 | bar0 = devinfo->resources[0].address; |
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333 | bar0_size = devinfo->resources[0].size; |
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334 | printf("\n\n--- GR-TMTC-1553[%d] ---\n", dev->minor_drv); |
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335 | printf(" PCI BUS: 0x%x, SLOT: 0x%x, FUNCTION: 0x%x\n", |
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336 | PCI_DEV_EXPAND(priv->pcidev)); |
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337 | printf(" PCI VENDOR: 0x%04x, DEVICE: 0x%04x\n", |
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338 | devinfo->id.vendor, devinfo->id.device); |
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339 | printf(" PCI BAR[0]: 0x%lx - 0x%lx\n", bar0, bar0 + bar0_size - 1); |
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340 | printf(" IRQ: %d\n\n\n", devinfo->irq); |
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341 | |
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342 | /* all neccessary space assigned to GR-TMTC-1553 target? */ |
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343 | if (bar0_size == 0) |
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344 | return DRVMGR_ENORES; |
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345 | |
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346 | /* Initialize spin-lock for this PCI peripheral device. This is to |
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347 | * protect the Interrupt Controller Registers. The genirq layer is |
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348 | * protecting its own internals and ISR dispatching. |
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349 | */ |
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350 | SPIN_INIT(&priv->devlock, priv->prefix); |
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351 | |
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352 | priv->genirq = genirq_init(16); |
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353 | if ( priv->genirq == NULL ) { |
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354 | free(priv); |
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355 | dev->priv = NULL; |
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356 | return DRVMGR_FAIL; |
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357 | } |
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358 | |
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359 | status = gr_tmtc_1553_hw_init(priv); |
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360 | if ( status != 0 ) { |
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361 | genirq_destroy(priv->genirq); |
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362 | free(priv); |
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363 | dev->priv = NULL; |
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364 | printf(" Failed to initialize GR-TMTC-1553 HW: %d\n", status); |
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365 | return DRVMGR_FAIL; |
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366 | } |
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367 | |
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368 | /* Init amba bus */ |
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369 | priv->config.abus = &priv->abus; |
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370 | priv->config.ops = &ambapp_tmtc_1553_ops; |
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371 | priv->config.maps_down = &priv->bus_maps_down[0]; |
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372 | /* This PCI device has only target interface so DMA is not supported, |
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373 | * which means that translation from AMBA->PCI should fail if attempted. |
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374 | */ |
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375 | priv->config.maps_up = DRVMGR_TRANSLATE_NO_BRIDGE; |
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376 | if ( priv->dev->minor_drv < resources_cnt ) { |
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377 | priv->config.resources = gr_tmtc_1553_resources[priv->dev->minor_drv]; |
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378 | } else { |
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379 | priv->config.resources = NULL; |
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380 | } |
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381 | |
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382 | /* Create And Register AMBA PnP Bus */ |
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383 | return ambapp_bus_register(dev, &priv->config); |
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384 | } |
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385 | |
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386 | int gr_tmtc_1553_init2(struct drvmgr_dev *dev) |
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387 | { |
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388 | struct gr_tmtc_1553_priv *priv = dev->priv; |
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389 | |
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390 | /* Clear any old interrupt requests */ |
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391 | drvmgr_interrupt_clear(dev, 0); |
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392 | |
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393 | /* Enable System IRQ so that GR-TMTC-1553 PCI target interrupt goes through. |
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394 | * |
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395 | * It is important to enable it in stage init2. If interrupts were enabled in init1 |
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396 | * this might hang the system when more than one PCI target is connected, this is |
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397 | * because PCI interrupts might be shared and PCI target 2 have not initialized and |
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398 | * might therefore drive interrupt already when entering init1(). |
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399 | */ |
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400 | drvmgr_interrupt_register( |
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401 | dev, |
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402 | 0, |
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403 | "gr_tmtc_1553", |
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404 | gr_tmtc_1553_isr, |
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405 | (void *)priv); |
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406 | |
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407 | return DRVMGR_OK; |
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408 | } |
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409 | |
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410 | int ambapp_tmtc_1553_int_register( |
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411 | struct drvmgr_dev *dev, |
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412 | int irq, |
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413 | const char *info, |
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414 | drvmgr_isr handler, |
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415 | void *arg) |
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416 | { |
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417 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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418 | SPIN_IRQFLAGS(irqflags); |
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419 | int status; |
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420 | void *h; |
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421 | |
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422 | h = genirq_alloc_handler(handler, arg); |
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423 | if ( h == NULL ) |
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424 | return DRVMGR_FAIL; |
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425 | |
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426 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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427 | |
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428 | status = genirq_register(priv->genirq, irq, h); |
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429 | if ( status == 0 ) { |
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430 | /* Disable and clear IRQ for first registered handler */ |
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431 | priv->irq->iclear = (1<<irq); |
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432 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
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433 | } else if ( status == 1 ) |
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434 | status = 0; |
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435 | |
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436 | if (status != 0) { |
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437 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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438 | genirq_free_handler(h); |
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439 | return DRVMGR_FAIL; |
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440 | } |
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441 | |
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442 | status = genirq_enable(priv->genirq, irq, handler, arg); |
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443 | if ( status == 0 ) { |
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444 | /* Enable IRQ for first enabled handler only */ |
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445 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
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446 | } else if ( status == 1 ) |
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447 | status = 0; |
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448 | |
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449 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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450 | |
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451 | return status; |
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452 | } |
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453 | |
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454 | int ambapp_tmtc_1553_int_unregister( |
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455 | struct drvmgr_dev *dev, |
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456 | int irq, |
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457 | drvmgr_isr isr, |
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458 | void *arg) |
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459 | { |
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460 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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461 | SPIN_IRQFLAGS(irqflags); |
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462 | int status; |
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463 | void *handler; |
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464 | |
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465 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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466 | |
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467 | status = genirq_disable(priv->genirq, irq, isr, arg); |
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468 | if ( status == 0 ) { |
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469 | /* Disable IRQ only when no enabled handler exists */ |
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470 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
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471 | } else if ( status == 1 ) |
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472 | status = 0; |
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473 | |
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474 | handler = genirq_unregister(priv->genirq, irq, isr, arg); |
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475 | if ( handler == NULL ) |
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476 | status = DRVMGR_FAIL; |
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477 | else |
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478 | status = DRVMGR_OK; |
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479 | |
---|
480 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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481 | |
---|
482 | if (handler) |
---|
483 | genirq_free_handler(handler); |
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484 | |
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485 | return status; |
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486 | } |
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487 | |
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488 | int ambapp_tmtc_1553_int_unmask( |
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489 | struct drvmgr_dev *dev, |
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490 | int irq) |
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491 | { |
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492 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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493 | SPIN_IRQFLAGS(irqflags); |
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494 | |
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495 | DBG("TMTC-1553 IRQ %d: enable\n", irq); |
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496 | |
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497 | if ( genirq_check(priv->genirq, irq) ) |
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498 | return DRVMGR_FAIL; |
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499 | |
---|
500 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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501 | |
---|
502 | /* Enable IRQ */ |
---|
503 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
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504 | |
---|
505 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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506 | |
---|
507 | return DRVMGR_OK; |
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508 | } |
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509 | |
---|
510 | int ambapp_tmtc_1553_int_mask( |
---|
511 | struct drvmgr_dev *dev, |
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512 | int irq) |
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513 | { |
---|
514 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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515 | SPIN_IRQFLAGS(irqflags); |
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516 | |
---|
517 | DBG("TMTC-1553 IRQ %d: disable\n", irq); |
---|
518 | |
---|
519 | if ( genirq_check(priv->genirq, irq) ) |
---|
520 | return DRVMGR_FAIL; |
---|
521 | |
---|
522 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
---|
523 | |
---|
524 | /* Disable IRQ */ |
---|
525 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
---|
526 | |
---|
527 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
---|
528 | |
---|
529 | return DRVMGR_OK; |
---|
530 | } |
---|
531 | |
---|
532 | int ambapp_tmtc_1553_int_clear( |
---|
533 | struct drvmgr_dev *dev, |
---|
534 | int irq) |
---|
535 | { |
---|
536 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
---|
537 | |
---|
538 | if ( genirq_check(priv->genirq, irq) ) |
---|
539 | return DRVMGR_FAIL; |
---|
540 | |
---|
541 | priv->irq->iclear = (1<<irq); |
---|
542 | |
---|
543 | return DRVMGR_OK; |
---|
544 | } |
---|
545 | |
---|
546 | int ambapp_tmtc_1553_get_params(struct drvmgr_dev *dev, struct drvmgr_bus_params *params) |
---|
547 | { |
---|
548 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
---|
549 | |
---|
550 | /* Device name prefix pointer, skip /dev */ |
---|
551 | params->dev_prefix = &priv->prefix[5]; |
---|
552 | |
---|
553 | return 0; |
---|
554 | } |
---|
555 | |
---|
556 | void gr_tmtc_1553_print_dev(struct drvmgr_dev *dev, int options) |
---|
557 | { |
---|
558 | struct gr_tmtc_1553_priv *priv = dev->priv; |
---|
559 | struct pci_dev_info *devinfo = priv->devinfo; |
---|
560 | uint32_t bar0, bar0_size; |
---|
561 | |
---|
562 | /* Print */ |
---|
563 | printf("--- GR-TMTC-1553 [bus 0x%x, dev 0x%x, fun 0x%x] ---\n", |
---|
564 | PCI_DEV_EXPAND(priv->pcidev)); |
---|
565 | |
---|
566 | bar0 = devinfo->resources[0].address; |
---|
567 | bar0_size = devinfo->resources[0].size; |
---|
568 | |
---|
569 | printf(" PCI BAR[0]: 0x%lx - 0x%lx\n", bar0, bar0 + bar0_size - 1); |
---|
570 | printf(" IRQ REGS: 0x%x\n", (unsigned int)priv->irq); |
---|
571 | printf(" IRQ: %d\n", devinfo->irq); |
---|
572 | printf(" FREQ: %d Hz\n", priv->version->amba_freq_hz); |
---|
573 | printf(" IMASK: 0x%08x\n", priv->irq->mask[0]); |
---|
574 | printf(" IPEND: 0x%08x\n", priv->irq->ipend); |
---|
575 | |
---|
576 | /* Print amba config */ |
---|
577 | if ( options & TMTC_1553_OPTIONS_AMBA ) { |
---|
578 | ambapp_print(&priv->abus, 10); |
---|
579 | } |
---|
580 | #if 0 |
---|
581 | /* Print IRQ handlers and their arguments */ |
---|
582 | if ( options & TMTC_1553_OPTIONS_IRQ ) { |
---|
583 | int i; |
---|
584 | for(i=0; i<16; i++) { |
---|
585 | printf(" IRQ[%02d]: 0x%x, arg: 0x%x\n", |
---|
586 | i, (unsigned int)priv->isrs[i].handler, (unsigned int)priv->isrs[i].arg); |
---|
587 | } |
---|
588 | } |
---|
589 | #endif |
---|
590 | } |
---|
591 | |
---|
592 | void gr_tmtc_1553_print(int options) |
---|
593 | { |
---|
594 | struct pci_drv_info *drv = &gr_tmtc_1553_info; |
---|
595 | struct drvmgr_dev *dev; |
---|
596 | |
---|
597 | dev = drv->general.dev; |
---|
598 | while(dev) { |
---|
599 | gr_tmtc_1553_print_dev(dev, options); |
---|
600 | dev = dev->next_in_drv; |
---|
601 | } |
---|
602 | } |
---|