[e67b2b8d] | 1 | /* GR-RASTA-SPW-ROUTER PCI Target driver. |
---|
| 2 | * |
---|
| 3 | * COPYRIGHT (c) 2011. |
---|
| 4 | * Cobham Gaisler AB. |
---|
| 5 | * |
---|
| 6 | * The license and distribution terms for this file may be |
---|
| 7 | * found in found in the file LICENSE in this distribution or at |
---|
[4a7d1026] | 8 | * http://www.rtems.org/license/LICENSE. |
---|
[e67b2b8d] | 9 | * |
---|
| 10 | * Configures the GR-RASTA-SPW-ROUTER interface PCI board. |
---|
| 11 | * This driver provides a AMBA PnP bus by using the general part |
---|
| 12 | * of the AMBA PnP bus driver (ambapp_bus.c). Based on the |
---|
| 13 | * GR-RASTA-IO driver. |
---|
| 14 | */ |
---|
| 15 | |
---|
| 16 | #include <stdio.h> |
---|
| 17 | #include <stdlib.h> |
---|
| 18 | #include <string.h> |
---|
| 19 | #include <sys/types.h> |
---|
| 20 | #include <sys/stat.h> |
---|
| 21 | |
---|
| 22 | #include <bsp.h> |
---|
| 23 | #include <rtems/bspIo.h> |
---|
| 24 | #include <pci.h> |
---|
| 25 | |
---|
| 26 | #include <ambapp.h> |
---|
| 27 | #include <grlib.h> |
---|
| 28 | #include <drvmgr/drvmgr.h> |
---|
| 29 | #include <drvmgr/ambapp_bus.h> |
---|
| 30 | #include <drvmgr/pci_bus.h> |
---|
[90fd587] | 31 | #include <drvmgr/bspcommon.h> |
---|
[5823bae8] | 32 | #include <bsp/genirq.h> |
---|
| 33 | #include <bsp/gr_rasta_spw_router.h> |
---|
[e67b2b8d] | 34 | |
---|
| 35 | /* Determines which PCI address the AHB masters will access, it should be |
---|
| 36 | * set so that the masters can access the CPU RAM. Default is base of CPU RAM, |
---|
| 37 | * CPU RAM is mapped 1:1 to PCI space. |
---|
| 38 | */ |
---|
| 39 | extern unsigned int _RAM_START; |
---|
| 40 | #define AHBMST2PCIADR (((unsigned int)&_RAM_START) & 0xf0000000) |
---|
| 41 | |
---|
| 42 | /* Offset from 0x80000000 (dual bus version) */ |
---|
| 43 | #define AHB1_BASE_ADDR 0x80000000 |
---|
| 44 | #define AHB1_IOAREA_BASE_ADDR 0x80100000 |
---|
| 45 | |
---|
| 46 | #define GRPCI2_BAR0_TO_AHB_MAP 0x04 /* Fixme */ |
---|
| 47 | #define GRPCI2_PCI_CONFIG 0x20 /* Fixme */ |
---|
| 48 | |
---|
| 49 | /* #define DEBUG 1 */ |
---|
| 50 | |
---|
| 51 | #ifdef DEBUG |
---|
| 52 | #define DBG(x...) printk(x) |
---|
| 53 | #else |
---|
| 54 | #define DBG(x...) |
---|
| 55 | #endif |
---|
| 56 | |
---|
| 57 | /* PCI ID */ |
---|
| 58 | #define PCIID_VENDOR_GAISLER 0x1AC8 |
---|
| 59 | |
---|
| 60 | int gr_rasta_spw_router_init1(struct drvmgr_dev *dev); |
---|
| 61 | int gr_rasta_spw_router_init2(struct drvmgr_dev *dev); |
---|
[d77b16d] | 62 | void gr_rasta_spw_router_isr(void *arg); |
---|
[e67b2b8d] | 63 | |
---|
| 64 | struct grpci2_regs { |
---|
| 65 | volatile unsigned int ctrl; |
---|
| 66 | volatile unsigned int statcap; |
---|
| 67 | volatile unsigned int pcimstprefetch; |
---|
| 68 | volatile unsigned int ahbtopciiomap; |
---|
| 69 | volatile unsigned int dmactrl; |
---|
| 70 | volatile unsigned int dmadesc; |
---|
| 71 | volatile unsigned int dmachanact; |
---|
| 72 | volatile unsigned int reserved; |
---|
| 73 | volatile unsigned int pcibartoahb[6]; |
---|
| 74 | volatile unsigned int reserved2[2]; |
---|
| 75 | volatile unsigned int ahbtopcimemmap[16]; |
---|
| 76 | volatile unsigned int trcctrl; |
---|
| 77 | volatile unsigned int trccntmode; |
---|
| 78 | volatile unsigned int trcadpat; |
---|
| 79 | volatile unsigned int trcadmask; |
---|
| 80 | volatile unsigned int trcctrlsigpat; |
---|
| 81 | volatile unsigned int trcctrlsigmask; |
---|
| 82 | volatile unsigned int trcadstate; |
---|
| 83 | volatile unsigned int trcctrlsigstate; |
---|
| 84 | }; |
---|
| 85 | |
---|
| 86 | struct gr_rasta_spw_router_ver { |
---|
| 87 | const unsigned int amba_freq_hz; /* The frequency */ |
---|
| 88 | const unsigned int amba_ioarea; /* The address where the PnP IOAREA starts at */ |
---|
| 89 | }; |
---|
| 90 | |
---|
| 91 | /* Private data structure for driver */ |
---|
| 92 | struct gr_rasta_spw_router_priv { |
---|
| 93 | /* Driver management */ |
---|
| 94 | struct drvmgr_dev *dev; |
---|
| 95 | char prefix[20]; |
---|
| 96 | |
---|
| 97 | /* PCI */ |
---|
| 98 | pci_dev_t pcidev; |
---|
| 99 | struct pci_dev_info *devinfo; |
---|
| 100 | uint32_t ahbmst2pci_map; |
---|
| 101 | |
---|
| 102 | /* IRQ */ |
---|
| 103 | genirq_t genirq; |
---|
| 104 | |
---|
| 105 | /* GR-RASTA-SPW-ROUTER */ |
---|
| 106 | struct gr_rasta_spw_router_ver *version; |
---|
| 107 | struct irqmp_regs *irq; |
---|
| 108 | struct grpci2_regs *grpci2; |
---|
| 109 | struct drvmgr_map_entry bus_maps_up[2]; |
---|
| 110 | struct drvmgr_map_entry bus_maps_down[2]; |
---|
| 111 | |
---|
| 112 | /* AMBA Plug&Play information on GR-RASTA-SPW-ROUTER */ |
---|
| 113 | struct ambapp_bus abus; |
---|
| 114 | struct ambapp_mmap amba_maps[3]; |
---|
| 115 | struct ambapp_config config; |
---|
| 116 | }; |
---|
| 117 | |
---|
| 118 | struct gr_rasta_spw_router_ver gr_rasta_spw_router_ver0 = { |
---|
| 119 | .amba_freq_hz = 50000000, |
---|
| 120 | .amba_ioarea = 0xfff00000, |
---|
| 121 | }; |
---|
| 122 | |
---|
| 123 | int ambapp_rasta_spw_router_int_register( |
---|
| 124 | struct drvmgr_dev *dev, |
---|
| 125 | int irq, |
---|
| 126 | const char *info, |
---|
| 127 | drvmgr_isr handler, |
---|
| 128 | void *arg); |
---|
| 129 | int ambapp_rasta_spw_router_int_unregister( |
---|
| 130 | struct drvmgr_dev *dev, |
---|
| 131 | int irq, |
---|
| 132 | drvmgr_isr handler, |
---|
| 133 | void *arg); |
---|
| 134 | int ambapp_rasta_spw_router_int_unmask( |
---|
| 135 | struct drvmgr_dev *dev, |
---|
| 136 | int irq); |
---|
| 137 | int ambapp_rasta_spw_router_int_mask( |
---|
| 138 | struct drvmgr_dev *dev, |
---|
| 139 | int irq); |
---|
| 140 | int ambapp_rasta_spw_router_int_clear( |
---|
| 141 | struct drvmgr_dev *dev, |
---|
| 142 | int irq); |
---|
| 143 | int ambapp_rasta_spw_router_get_params( |
---|
| 144 | struct drvmgr_dev *dev, |
---|
| 145 | struct drvmgr_bus_params *params); |
---|
| 146 | |
---|
| 147 | struct ambapp_ops ambapp_rasta_spw_router_ops = { |
---|
| 148 | .int_register = ambapp_rasta_spw_router_int_register, |
---|
| 149 | .int_unregister = ambapp_rasta_spw_router_int_unregister, |
---|
| 150 | .int_unmask = ambapp_rasta_spw_router_int_unmask, |
---|
| 151 | .int_mask = ambapp_rasta_spw_router_int_mask, |
---|
| 152 | .int_clear = ambapp_rasta_spw_router_int_clear, |
---|
| 153 | .get_params = ambapp_rasta_spw_router_get_params |
---|
| 154 | }; |
---|
| 155 | |
---|
| 156 | struct drvmgr_drv_ops gr_rasta_spw_router_ops = |
---|
| 157 | { |
---|
| 158 | .init = {gr_rasta_spw_router_init1, gr_rasta_spw_router_init2, NULL, NULL}, |
---|
| 159 | .remove = NULL, |
---|
| 160 | .info = NULL |
---|
| 161 | }; |
---|
| 162 | |
---|
| 163 | struct pci_dev_id_match gr_rasta_spw_router_ids[] = |
---|
| 164 | { |
---|
| 165 | PCIID_DEVVEND(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_RASTA_SPW_RTR), |
---|
| 166 | PCIID_END_TABLE /* Mark end of table */ |
---|
| 167 | }; |
---|
| 168 | |
---|
| 169 | struct pci_drv_info gr_rasta_spw_router_info = |
---|
| 170 | { |
---|
| 171 | { |
---|
| 172 | DRVMGR_OBJ_DRV, /* Driver */ |
---|
| 173 | NULL, /* Next driver */ |
---|
| 174 | NULL, /* Device list */ |
---|
| 175 | DRIVER_PCI_GAISLER_RASTA_SPW_ROUTER_ID, /* Driver ID */ |
---|
| 176 | "GR-RASTA-SPW_ROUTER_DRV", /* Driver Name */ |
---|
| 177 | DRVMGR_BUS_TYPE_PCI, /* Bus Type */ |
---|
| 178 | &gr_rasta_spw_router_ops, |
---|
| 179 | NULL, /* Funcs */ |
---|
| 180 | 0, /* No devices yet */ |
---|
| 181 | sizeof(struct gr_rasta_spw_router_priv), |
---|
| 182 | }, |
---|
| 183 | &gr_rasta_spw_router_ids[0] |
---|
| 184 | }; |
---|
| 185 | |
---|
| 186 | /* Driver resources configuration for the AMBA bus on the GR-RASTA-SPW-ROUTER board. |
---|
| 187 | * It is declared weak so that the user may override it from the project file, |
---|
| 188 | * if the default settings are not enough. |
---|
| 189 | * |
---|
| 190 | * The configuration consists of an array of configuration pointers, each |
---|
| 191 | * pointer determine the configuration of one GR-RASTA-SPW-ROUTER board. Pointer |
---|
| 192 | * zero is for board0, pointer 1 for board1 and so on. |
---|
| 193 | * |
---|
| 194 | * The array must end with a NULL pointer. |
---|
| 195 | */ |
---|
| 196 | struct drvmgr_bus_res *gr_rasta_spw_router_resources[] __attribute__((weak)) = |
---|
| 197 | { |
---|
| 198 | NULL |
---|
| 199 | }; |
---|
| 200 | |
---|
| 201 | void gr_rasta_spw_router_register_drv(void) |
---|
| 202 | { |
---|
| 203 | DBG("Registering GR-RASTA-SPW-ROUTER PCI driver\n"); |
---|
| 204 | drvmgr_drv_register(&gr_rasta_spw_router_info.general); |
---|
| 205 | } |
---|
| 206 | |
---|
| 207 | void gr_rasta_spw_router_isr(void *arg) |
---|
| 208 | { |
---|
| 209 | struct gr_rasta_spw_router_priv *priv = arg; |
---|
| 210 | unsigned int status, tmp; |
---|
| 211 | int irq; |
---|
| 212 | tmp = status = priv->irq->ipend; |
---|
| 213 | |
---|
| 214 | /* DBG("GR-RASTA-SPW-ROUTER: IRQ 0x%x\n",status); */ |
---|
| 215 | |
---|
| 216 | for(irq=0; irq<16; irq++) { |
---|
| 217 | if ( status & (1<<irq) ) { |
---|
| 218 | genirq_doirq(priv->genirq, irq); |
---|
| 219 | priv->irq->iclear = (1<<irq); |
---|
| 220 | status &= ~(1<<irq); |
---|
| 221 | if ( status == 0 ) |
---|
| 222 | break; |
---|
| 223 | } |
---|
| 224 | } |
---|
| 225 | |
---|
| 226 | /* ACK interrupt, this is because PCI is Level, so the IRQ Controller |
---|
| 227 | * still drives the IRQ |
---|
| 228 | */ |
---|
| 229 | if ( tmp ) |
---|
| 230 | drvmgr_interrupt_clear(priv->dev, 0); |
---|
| 231 | |
---|
| 232 | DBG("RASTA-SPW_ROUTER-IRQ: 0x%x\n", tmp); |
---|
| 233 | } |
---|
| 234 | |
---|
[d77b16d] | 235 | static int gr_rasta_spw_router_hw_init(struct gr_rasta_spw_router_priv *priv) |
---|
[e67b2b8d] | 236 | { |
---|
| 237 | int i; |
---|
| 238 | uint32_t data; |
---|
| 239 | unsigned int ctrl; |
---|
| 240 | uint8_t tmp2; |
---|
| 241 | struct ambapp_dev *tmp; |
---|
| 242 | struct ambapp_ahb_info *ahb; |
---|
| 243 | uint8_t cap_ptr; |
---|
| 244 | pci_dev_t pcidev = priv->pcidev; |
---|
| 245 | struct pci_dev_info *devinfo = priv->devinfo; |
---|
| 246 | |
---|
| 247 | /* Select version of GR-RASTA-SPW-ROUTER board. Currently only one |
---|
| 248 | * version |
---|
| 249 | */ |
---|
| 250 | switch (devinfo->rev) { |
---|
| 251 | case 0: |
---|
| 252 | priv->version = &gr_rasta_spw_router_ver0; |
---|
| 253 | break; |
---|
| 254 | default: |
---|
| 255 | return -2; |
---|
| 256 | } |
---|
| 257 | |
---|
| 258 | /* Check capabilities list bit */ |
---|
[8b29637c] | 259 | pci_cfg_r8(pcidev, PCIR_STATUS, &tmp2); |
---|
[e67b2b8d] | 260 | |
---|
| 261 | if (!((tmp2 >> 4) & 1)) { |
---|
| 262 | /* Capabilities list not available which it should be in the GRPCI2 */ |
---|
| 263 | return -3; |
---|
| 264 | } |
---|
| 265 | |
---|
| 266 | /* Read capabilities pointer */ |
---|
[8b29637c] | 267 | pci_cfg_r8(pcidev, PCIR_CAP_PTR, &cap_ptr); |
---|
[e67b2b8d] | 268 | |
---|
| 269 | /* Set AHB address mappings for target PCI bars */ |
---|
| 270 | pci_cfg_w32(pcidev, cap_ptr+GRPCI2_BAR0_TO_AHB_MAP, 0xffe00000); /* APB bus, AHB I/O bus 2 MB */ |
---|
| 271 | |
---|
| 272 | /* Set PCI bus to be big endian */ |
---|
| 273 | pci_cfg_r32(pcidev, cap_ptr+GRPCI2_PCI_CONFIG, &data); |
---|
| 274 | data = data & 0xFFFFFFFE; |
---|
| 275 | pci_cfg_w32(pcidev, cap_ptr+GRPCI2_PCI_CONFIG, data); |
---|
| 276 | |
---|
| 277 | #if 0 |
---|
| 278 | /* set parity error response */ |
---|
[8b29637c] | 279 | pci_cfg_r32(pcidev, PCIR_COMMAND, &data); |
---|
| 280 | pci_cfg_w32(pcidev, PCIR_COMMAND, (data|PCIM_CMD_PERRESPEN)); |
---|
[e67b2b8d] | 281 | #endif |
---|
| 282 | |
---|
| 283 | /* Scan AMBA Plug&Play */ |
---|
| 284 | |
---|
| 285 | /* AMBA MAP bar0 (in router) ==> 0xffe00000(remote amba address) */ |
---|
| 286 | priv->amba_maps[0].size = devinfo->resources[0].size; |
---|
| 287 | priv->amba_maps[0].local_adr = devinfo->resources[0].address; |
---|
| 288 | priv->amba_maps[0].remote_adr = 0xffe00000; |
---|
| 289 | |
---|
| 290 | /* Addresses not matching with map be untouched */ |
---|
| 291 | priv->amba_maps[1].size = 0xfffffff0; |
---|
| 292 | priv->amba_maps[1].local_adr = 0; |
---|
| 293 | priv->amba_maps[1].remote_adr = 0; |
---|
| 294 | |
---|
| 295 | /* Mark end of table */ |
---|
| 296 | priv->amba_maps[2].size=0; |
---|
| 297 | |
---|
| 298 | /* Start AMBA PnP scan at first AHB bus */ |
---|
| 299 | ambapp_scan( |
---|
| 300 | &priv->abus, |
---|
| 301 | devinfo->resources[0].address + 0x100000, |
---|
| 302 | NULL, |
---|
| 303 | &priv->amba_maps[0]); |
---|
| 304 | |
---|
| 305 | /* Initialize Frequency of AMBA bus */ |
---|
| 306 | ambapp_freq_init(&priv->abus, NULL, priv->version->amba_freq_hz); |
---|
| 307 | |
---|
| 308 | /* Find IRQ controller, Clear all current IRQs */ |
---|
[90fd587] | 309 | tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus, |
---|
[e67b2b8d] | 310 | (OPTIONS_ALL|OPTIONS_APB_SLVS), |
---|
| 311 | VENDOR_GAISLER, GAISLER_IRQMP, |
---|
| 312 | ambapp_find_by_idx, NULL); |
---|
| 313 | if ( !tmp ) { |
---|
| 314 | return -4; |
---|
| 315 | } |
---|
| 316 | priv->irq = (struct irqmp_regs *)DEV_TO_APB(tmp)->start; |
---|
| 317 | /* Set up GR-RASTA-SPW-ROUTER irq controller */ |
---|
| 318 | priv->irq->mask[0] = 0; |
---|
| 319 | priv->irq->iclear = 0xffff; |
---|
| 320 | priv->irq->ilevel = 0; |
---|
| 321 | |
---|
| 322 | priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA"; |
---|
| 323 | priv->bus_maps_down[0].size = priv->amba_maps[0].size; |
---|
| 324 | priv->bus_maps_down[0].from_adr = (void *)priv->amba_maps[0].local_adr; |
---|
| 325 | priv->bus_maps_down[0].to_adr = (void *)priv->amba_maps[0].remote_adr; |
---|
| 326 | priv->bus_maps_down[1].size = 0; |
---|
| 327 | |
---|
| 328 | /* Find GRPCI2 controller AHB Slave interface */ |
---|
[90fd587] | 329 | tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus, |
---|
[e67b2b8d] | 330 | (OPTIONS_ALL|OPTIONS_AHB_SLVS), |
---|
| 331 | VENDOR_GAISLER, GAISLER_GRPCI2, |
---|
| 332 | ambapp_find_by_idx, NULL); |
---|
| 333 | if ( !tmp ) { |
---|
| 334 | return -5; |
---|
| 335 | } |
---|
| 336 | ahb = (struct ambapp_ahb_info *)tmp->devinfo; |
---|
| 337 | priv->bus_maps_up[0].name = "AMBA GRPCI2 Window"; |
---|
| 338 | priv->bus_maps_up[0].size = ahb->mask[0]; /* AMBA->PCI Window on GR-RASTA-SPW-ROUTER board */ |
---|
| 339 | priv->bus_maps_up[0].from_adr = (void *)ahb->start[0]; |
---|
| 340 | priv->bus_maps_up[0].to_adr = (void *) |
---|
| 341 | (priv->ahbmst2pci_map & ~(ahb->mask[0]-1)); |
---|
| 342 | priv->bus_maps_up[1].size = 0; |
---|
| 343 | |
---|
| 344 | /* Find GRPCI2 controller APB Slave interface */ |
---|
[90fd587] | 345 | tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus, |
---|
[e67b2b8d] | 346 | (OPTIONS_ALL|OPTIONS_APB_SLVS), |
---|
| 347 | VENDOR_GAISLER, GAISLER_GRPCI2, |
---|
| 348 | ambapp_find_by_idx, NULL); |
---|
| 349 | if ( !tmp ) { |
---|
| 350 | return -6; |
---|
| 351 | } |
---|
| 352 | priv->grpci2 = (struct grpci2_regs *) |
---|
| 353 | ((struct ambapp_apb_info *)tmp->devinfo)->start; |
---|
| 354 | |
---|
| 355 | /* Set AHB to PCI mapping for all AMBA AHB masters */ |
---|
| 356 | for(i = 0; i < 16; i++) { |
---|
| 357 | priv->grpci2->ahbtopcimemmap[i] = priv->ahbmst2pci_map & |
---|
| 358 | ~(ahb->mask[0]-1); |
---|
| 359 | } |
---|
| 360 | |
---|
| 361 | /* Make sure dirq(0) sampling is enabled */ |
---|
| 362 | ctrl = priv->grpci2->ctrl; |
---|
| 363 | ctrl = (ctrl & 0xFFFFFF0F) | (1 << 4); |
---|
| 364 | printf("data: 0x%x\n", ctrl); |
---|
| 365 | priv->grpci2->ctrl = ctrl; |
---|
| 366 | |
---|
| 367 | /* Successfully registered the RASTA-SPW-ROUTER board */ |
---|
| 368 | return 0; |
---|
| 369 | } |
---|
| 370 | |
---|
[d77b16d] | 371 | static int gr_rasta_spw_router_hw_init2(struct gr_rasta_spw_router_priv *priv) |
---|
[e67b2b8d] | 372 | { |
---|
| 373 | /* Enable DMA by enabling PCI target as master */ |
---|
| 374 | pci_master_enable(priv->pcidev); |
---|
| 375 | |
---|
| 376 | return DRVMGR_OK; |
---|
| 377 | } |
---|
| 378 | |
---|
| 379 | /* Called when a PCI target is found with the PCI device and vendor ID |
---|
| 380 | * given in gr_rasta_spw_router_ids[]. |
---|
| 381 | */ |
---|
| 382 | int gr_rasta_spw_router_init1(struct drvmgr_dev *dev) |
---|
| 383 | { |
---|
| 384 | struct gr_rasta_spw_router_priv *priv; |
---|
| 385 | struct pci_dev_info *devinfo; |
---|
| 386 | int status; |
---|
| 387 | uint32_t bar0, bar0_size; |
---|
| 388 | union drvmgr_key_value *value; |
---|
[90fd587] | 389 | int resources_cnt; |
---|
[e67b2b8d] | 390 | |
---|
| 391 | priv = dev->priv; |
---|
| 392 | if (!priv) |
---|
| 393 | return DRVMGR_NOMEM; |
---|
| 394 | |
---|
| 395 | memset(priv, 0, sizeof(*priv)); |
---|
| 396 | dev->priv = priv; |
---|
| 397 | priv->dev = dev; |
---|
| 398 | |
---|
| 399 | /* Determine number of configurations */ |
---|
[90fd587] | 400 | resources_cnt = get_resarray_count(gr_rasta_spw_router_resources); |
---|
[e67b2b8d] | 401 | |
---|
| 402 | /* Generate Device prefix */ |
---|
| 403 | |
---|
| 404 | strcpy(priv->prefix, "/dev/spwrouter0"); |
---|
| 405 | priv->prefix[14] += dev->minor_drv; |
---|
| 406 | mkdir(priv->prefix, S_IRWXU | S_IRWXG | S_IRWXO); |
---|
| 407 | priv->prefix[15] = '/'; |
---|
| 408 | priv->prefix[16] = '\0'; |
---|
| 409 | |
---|
| 410 | priv->devinfo = devinfo = (struct pci_dev_info *)dev->businfo; |
---|
| 411 | priv->pcidev = devinfo->pcidev; |
---|
| 412 | bar0 = devinfo->resources[0].address; |
---|
| 413 | bar0_size = devinfo->resources[0].size; |
---|
| 414 | printf("\n\n--- GR-RASTA-SPW-ROUTER[%d] ---\n", dev->minor_drv); |
---|
| 415 | printf(" PCI BUS: 0x%x, SLOT: 0x%x, FUNCTION: 0x%x\n", |
---|
| 416 | PCI_DEV_EXPAND(priv->pcidev)); |
---|
| 417 | printf(" PCI VENDOR: 0x%04x, DEVICE: 0x%04x\n", |
---|
| 418 | devinfo->id.vendor, devinfo->id.device); |
---|
| 419 | printf(" PCI BAR[0]: 0x%08lx - 0x%08lx\n", bar0, bar0 + bar0_size - 1); |
---|
| 420 | printf(" IRQ: %d\n\n\n", devinfo->irq); |
---|
| 421 | |
---|
| 422 | /* all neccessary space assigned to GR-RASTA-SPW-ROUTER target? */ |
---|
| 423 | if (bar0_size == 0) |
---|
| 424 | return DRVMGR_ENORES; |
---|
| 425 | |
---|
| 426 | /* Let user override which PCI address the AHB masters of the |
---|
| 427 | * GR-RASTA-SPW board access when doing DMA to CPU RAM. The AHB masters |
---|
| 428 | * access the PCI Window of the AMBA bus, the MSB 4-bits of that address |
---|
| 429 | * is translated according this config option before the address |
---|
| 430 | * goes out on the PCI bus. |
---|
| 431 | * Only the 4 MSB bits have an effect; |
---|
| 432 | */ |
---|
| 433 | value = drvmgr_dev_key_get(priv->dev, "ahbmst2pci", KEY_TYPE_INT); |
---|
| 434 | if (value) |
---|
| 435 | priv->ahbmst2pci_map = value->i; |
---|
| 436 | else |
---|
| 437 | priv->ahbmst2pci_map = AHBMST2PCIADR; /* default */ |
---|
| 438 | |
---|
| 439 | priv->genirq = genirq_init(16); |
---|
| 440 | if ( priv->genirq == NULL ) |
---|
| 441 | return DRVMGR_FAIL; |
---|
| 442 | |
---|
| 443 | if ((status = gr_rasta_spw_router_hw_init(priv)) != 0) { |
---|
| 444 | genirq_destroy(priv->genirq); |
---|
| 445 | printf(" Failed to initialize GR-RASTA-SPW-ROUTER HW: %d\n", status); |
---|
| 446 | return DRVMGR_FAIL; |
---|
| 447 | } |
---|
| 448 | |
---|
| 449 | /* Init amba bus */ |
---|
| 450 | priv->config.abus = &priv->abus; |
---|
| 451 | priv->config.ops = &ambapp_rasta_spw_router_ops; |
---|
| 452 | priv->config.maps_up = &priv->bus_maps_up[0]; |
---|
| 453 | priv->config.maps_down = &priv->bus_maps_down[0]; |
---|
[90fd587] | 454 | if ( priv->dev->minor_drv < resources_cnt ) { |
---|
[e67b2b8d] | 455 | priv->config.resources = gr_rasta_spw_router_resources[priv->dev->minor_drv]; |
---|
| 456 | } else { |
---|
| 457 | priv->config.resources = NULL; |
---|
| 458 | } |
---|
| 459 | |
---|
| 460 | /* Create and register AMBA PnP bus. */ |
---|
| 461 | return ambapp_bus_register(dev, &priv->config); |
---|
| 462 | } |
---|
| 463 | |
---|
| 464 | int gr_rasta_spw_router_init2(struct drvmgr_dev *dev) |
---|
| 465 | { |
---|
| 466 | struct gr_rasta_spw_router_priv *priv = dev->priv; |
---|
| 467 | |
---|
| 468 | /* Clear any old interrupt requests */ |
---|
| 469 | drvmgr_interrupt_clear(dev, 0); |
---|
| 470 | |
---|
| 471 | /* Enable System IRQ so that GR-RASTA-SPW-ROUTER PCI target interrupt |
---|
| 472 | * goes through. |
---|
| 473 | * |
---|
| 474 | * It is important to enable it in stage init2. If interrupts were |
---|
| 475 | * enabled in init1 this might hang the system when more than one |
---|
| 476 | * PCI board is connected, this is because PCI interrupts might |
---|
| 477 | * be shared and PCI board 2 have not initialized and |
---|
| 478 | * might therefore drive interrupt already when entering init1(). |
---|
| 479 | */ |
---|
| 480 | drvmgr_interrupt_register( |
---|
| 481 | dev, |
---|
| 482 | 0, |
---|
| 483 | "gr_rasta_spw_router", |
---|
| 484 | gr_rasta_spw_router_isr, |
---|
| 485 | (void *)priv); |
---|
| 486 | |
---|
| 487 | return gr_rasta_spw_router_hw_init2(priv); |
---|
| 488 | } |
---|
| 489 | |
---|
| 490 | int ambapp_rasta_spw_router_int_register( |
---|
| 491 | struct drvmgr_dev *dev, |
---|
| 492 | int irq, |
---|
| 493 | const char *info, |
---|
| 494 | drvmgr_isr handler, |
---|
| 495 | void *arg) |
---|
| 496 | { |
---|
| 497 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 498 | rtems_interrupt_level level; |
---|
| 499 | int status; |
---|
| 500 | |
---|
| 501 | rtems_interrupt_disable(level); |
---|
| 502 | |
---|
| 503 | status = genirq_register(priv->genirq, irq, handler, arg); |
---|
| 504 | if (status == 0) { |
---|
| 505 | /* Clear IRQ for first registered handler */ |
---|
| 506 | priv->irq->iclear = (1<<irq); |
---|
| 507 | } else if (status == 1) |
---|
| 508 | status = 0; |
---|
| 509 | |
---|
| 510 | if (status != 0) { |
---|
| 511 | rtems_interrupt_enable(level); |
---|
| 512 | return DRVMGR_FAIL; |
---|
| 513 | } |
---|
| 514 | |
---|
| 515 | status = genirq_enable(priv->genirq, irq, handler, arg); |
---|
| 516 | if ( status == 0 ) { |
---|
| 517 | /* Enable IRQ for first enabled handler only */ |
---|
| 518 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
---|
| 519 | } else if ( status == 1 ) |
---|
| 520 | status = 0; |
---|
| 521 | |
---|
| 522 | rtems_interrupt_enable(level); |
---|
| 523 | |
---|
| 524 | return status; |
---|
| 525 | } |
---|
| 526 | |
---|
| 527 | int ambapp_rasta_spw_router_int_unregister( |
---|
| 528 | struct drvmgr_dev *dev, |
---|
| 529 | int irq, |
---|
| 530 | drvmgr_isr isr, |
---|
| 531 | void *arg) |
---|
| 532 | { |
---|
| 533 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 534 | rtems_interrupt_level level; |
---|
| 535 | int status; |
---|
| 536 | |
---|
| 537 | rtems_interrupt_disable(level); |
---|
| 538 | |
---|
| 539 | status = genirq_disable(priv->genirq, irq, isr, arg); |
---|
| 540 | if ( status == 0 ) { |
---|
| 541 | /* Disable IRQ only when no enabled handler exists */ |
---|
| 542 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
---|
| 543 | } |
---|
| 544 | |
---|
| 545 | status = genirq_unregister(priv->genirq, irq, isr, arg); |
---|
| 546 | if ( status != 0 ) |
---|
| 547 | status = DRVMGR_FAIL; |
---|
| 548 | |
---|
| 549 | rtems_interrupt_enable(level); |
---|
| 550 | |
---|
| 551 | return status; |
---|
| 552 | } |
---|
| 553 | |
---|
| 554 | int ambapp_rasta_spw_router_int_unmask( |
---|
| 555 | struct drvmgr_dev *dev, |
---|
| 556 | int irq) |
---|
| 557 | { |
---|
| 558 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 559 | rtems_interrupt_level level; |
---|
| 560 | |
---|
| 561 | DBG("RASTA-SPW-ROUTER IRQ %d: unmask\n", irq); |
---|
| 562 | |
---|
| 563 | if ( genirq_check(priv->genirq, irq) ) |
---|
| 564 | return DRVMGR_EINVAL; |
---|
| 565 | |
---|
| 566 | rtems_interrupt_disable(level); |
---|
| 567 | |
---|
| 568 | /* Enable IRQ for first enabled handler only */ |
---|
| 569 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
---|
| 570 | |
---|
| 571 | rtems_interrupt_enable(level); |
---|
| 572 | |
---|
| 573 | return DRVMGR_OK; |
---|
| 574 | } |
---|
| 575 | |
---|
| 576 | int ambapp_rasta_spw_router_int_mask( |
---|
| 577 | struct drvmgr_dev *dev, |
---|
| 578 | int irq) |
---|
| 579 | { |
---|
| 580 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 581 | rtems_interrupt_level level; |
---|
| 582 | |
---|
| 583 | DBG("RASTA-SPW-ROUTER IRQ %d: mask\n", irq); |
---|
| 584 | |
---|
| 585 | if ( genirq_check(priv->genirq, irq) ) |
---|
| 586 | return DRVMGR_EINVAL; |
---|
| 587 | |
---|
| 588 | rtems_interrupt_disable(level); |
---|
| 589 | |
---|
| 590 | /* Disable/mask IRQ */ |
---|
| 591 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
---|
| 592 | |
---|
| 593 | rtems_interrupt_enable(level); |
---|
| 594 | |
---|
| 595 | return DRVMGR_OK; |
---|
| 596 | } |
---|
| 597 | |
---|
| 598 | int ambapp_rasta_spw_router_int_clear( |
---|
| 599 | struct drvmgr_dev *dev, |
---|
| 600 | int irq) |
---|
| 601 | { |
---|
| 602 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 603 | |
---|
| 604 | if ( genirq_check(priv->genirq, irq) ) |
---|
| 605 | return DRVMGR_EINVAL; |
---|
| 606 | |
---|
| 607 | priv->irq->iclear = (1<<irq); |
---|
| 608 | |
---|
| 609 | return DRVMGR_OK; |
---|
| 610 | } |
---|
| 611 | |
---|
| 612 | int ambapp_rasta_spw_router_get_params(struct drvmgr_dev *dev, struct drvmgr_bus_params *params) |
---|
| 613 | { |
---|
| 614 | struct gr_rasta_spw_router_priv *priv = dev->parent->dev->priv; |
---|
| 615 | |
---|
| 616 | /* Device name prefix pointer, skip /dev */ |
---|
| 617 | params->dev_prefix = &priv->prefix[5]; |
---|
| 618 | |
---|
| 619 | return 0; |
---|
| 620 | } |
---|
| 621 | |
---|
| 622 | void gr_rasta_spw_router_print_dev(struct drvmgr_dev *dev, int options) |
---|
| 623 | { |
---|
| 624 | struct gr_rasta_spw_router_priv *priv = dev->priv; |
---|
| 625 | struct pci_dev_info *devinfo = priv->devinfo; |
---|
| 626 | uint32_t bar0, bar0_size; |
---|
| 627 | |
---|
| 628 | /* Print */ |
---|
| 629 | printf("--- GR-RASTA-SPW-ROUTER [bus 0x%x, dev 0x%x, fun 0x%x] ---\n", |
---|
| 630 | PCI_DEV_EXPAND(priv->pcidev)); |
---|
| 631 | |
---|
| 632 | bar0 = devinfo->resources[0].address; |
---|
| 633 | bar0_size = devinfo->resources[0].size; |
---|
| 634 | printf(" PCI BAR[0]: 0x%lx - 0x%lx\n", bar0, bar0 + bar0_size - 1); |
---|
| 635 | printf(" IRQ REGS: 0x%x\n", (unsigned int)priv->irq); |
---|
| 636 | printf(" IRQ: %d\n", devinfo->irq); |
---|
| 637 | printf(" PCI REVISION: %d\n", devinfo->rev); |
---|
| 638 | printf(" FREQ: %d Hz\n", priv->version->amba_freq_hz); |
---|
| 639 | printf(" IMASK: 0x%08x\n", priv->irq->mask[0]); |
---|
| 640 | printf(" IPEND: 0x%08x\n", priv->irq->ipend); |
---|
| 641 | |
---|
| 642 | /* Print amba config */ |
---|
| 643 | if (options & RASTA_SPW_ROUTER_OPTIONS_AMBA) |
---|
| 644 | ambapp_print(&priv->abus, 10); |
---|
| 645 | |
---|
| 646 | #if 0 |
---|
| 647 | /* Print IRQ handlers and their arguments */ |
---|
| 648 | if (options & RASTA_SPW_ROUTER_OPTIONS_IRQ) { |
---|
| 649 | int i; |
---|
| 650 | for(i = 0; i < 16; i++) { |
---|
| 651 | printf(" IRQ[%02d]: 0x%x, arg: 0x%x\n", |
---|
| 652 | i, (unsigned int)priv->isrs[i].handler, |
---|
| 653 | (unsigned int)priv->isrs[i].arg); |
---|
| 654 | } |
---|
| 655 | } |
---|
| 656 | #endif |
---|
| 657 | } |
---|
| 658 | |
---|
| 659 | void gr_rasta_spw_router_print(int options) |
---|
| 660 | { |
---|
| 661 | struct pci_drv_info *drv = &gr_rasta_spw_router_info; |
---|
| 662 | struct drvmgr_dev *dev; |
---|
| 663 | |
---|
| 664 | dev = drv->general.dev; |
---|
| 665 | while(dev) { |
---|
| 666 | gr_rasta_spw_router_print_dev(dev, options); |
---|
| 667 | dev = dev->next_in_drv; |
---|
| 668 | } |
---|
| 669 | } |
---|