1 | /* |
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2 | * COPYRIGHT (c) 2012-2015 |
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3 | * Cobham Gaisler |
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4 | * |
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5 | * The license and distribution terms for this file may be |
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6 | * found in the file LICENSE in this distribution or at |
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7 | * http://www.rtems.org/license/LICENSE. |
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8 | * |
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9 | */ |
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10 | |
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11 | #include <rtems.h> |
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12 | #include <bsp.h> |
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13 | #include <bsp/irq-generic.h> |
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14 | |
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15 | #if defined(RTEMS_SMP) && defined(LEON3) |
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16 | /* Interrupt to CPU map. Default to CPU0 since in BSS. */ |
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17 | const unsigned char LEON3_irq_to_cpu[32] __attribute__((weak)); |
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18 | |
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19 | /* On SMP use map table above relative to SMP Boot CPU (normally CPU0) */ |
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20 | static inline int bsp_irq_cpu(int irq) |
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21 | { |
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22 | /* protect from bad user configuration, default to boot cpu */ |
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23 | if (rtems_configuration_get_maximum_processors() <= LEON3_irq_to_cpu[irq]) |
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24 | return LEON3_Cpu_Index; |
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25 | else |
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26 | return LEON3_Cpu_Index + LEON3_irq_to_cpu[irq]; |
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27 | } |
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28 | #else |
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29 | /* when not SMP the local CPU is returned */ |
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30 | static inline int bsp_irq_cpu(int irq) |
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31 | { |
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32 | #ifdef LEON3 |
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33 | return _LEON3_Get_current_processor(); |
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34 | #else |
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35 | return 0; |
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36 | #endif |
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37 | } |
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38 | #endif |
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39 | |
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40 | /* Initialize interrupts */ |
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41 | void BSP_shared_interrupt_init(void) |
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42 | { |
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43 | rtems_vector_number vector; |
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44 | rtems_isr_entry previous_isr; |
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45 | int i; |
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46 | |
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47 | for (i=0; i <= BSP_INTERRUPT_VECTOR_MAX_STD; i++) { |
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48 | #if defined(LEON3) && \ |
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49 | (defined(RTEMS_SMP) || defined(RTEMS_MULTIPROCESSING)) |
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50 | /* Don't install IRQ handler on IPI interrupt. An SMP kernel with max one |
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51 | * CPU does not use IPIs |
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52 | */ |
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53 | #ifdef RTEMS_SMP |
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54 | if (rtems_configuration_get_maximum_processors() > 1) |
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55 | #endif |
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56 | if (i == LEON3_mp_irq) |
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57 | continue; |
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58 | #endif |
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59 | vector = SPARC_ASYNCHRONOUS_TRAP(i) + 0x10; |
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60 | rtems_interrupt_catch(bsp_isr_handler, vector, &previous_isr); |
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61 | } |
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62 | |
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63 | /* Initalize interrupt support */ |
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64 | bsp_interrupt_initialize(); |
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65 | } |
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66 | |
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67 | /* Callback from bsp_interrupt_initialize() */ |
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68 | rtems_status_code bsp_interrupt_facility_initialize(void) |
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69 | { |
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70 | return RTEMS_SUCCESSFUL; |
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71 | } |
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72 | |
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73 | void bsp_interrupt_vector_enable(rtems_vector_number vector) |
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74 | { |
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75 | int irq = (int)vector; |
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76 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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77 | BSP_Cpu_Unmask_interrupt(irq, bsp_irq_cpu(irq)); |
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78 | } |
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79 | |
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80 | void bsp_interrupt_vector_disable(rtems_vector_number vector) |
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81 | { |
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82 | int irq = (int)vector; |
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83 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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84 | BSP_Cpu_Mask_interrupt(irq, bsp_irq_cpu(irq)); |
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85 | } |
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86 | |
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87 | void BSP_shared_interrupt_mask(int irq) |
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88 | { |
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89 | BSP_Cpu_Mask_interrupt(irq, bsp_irq_cpu(irq)); |
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90 | } |
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91 | |
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92 | void BSP_shared_interrupt_unmask(int irq) |
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93 | { |
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94 | BSP_Cpu_Unmask_interrupt(irq, bsp_irq_cpu(irq)); |
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95 | } |
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96 | |
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97 | void BSP_shared_interrupt_clear(int irq) |
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98 | { |
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99 | /* We don't have to interrupt lock here, because the register is only |
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100 | * written and self clearing |
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101 | */ |
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102 | BSP_Clear_interrupt(irq); |
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103 | } |
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