1 | #include <rtems.h> |
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2 | #include <bsp.h> |
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3 | #include <bsp/irq-generic.h> |
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4 | |
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5 | static inline void bsp_dispatch_irq(int irq) |
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6 | { |
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7 | bsp_interrupt_handler_entry *e = |
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8 | &bsp_interrupt_handler_table[bsp_interrupt_handler_index(irq)]; |
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9 | |
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10 | while (e != NULL) { |
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11 | (*e->handler)(e->arg); |
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12 | e = e->next; |
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13 | } |
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14 | } |
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15 | |
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16 | /* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */ |
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17 | static void BSP_ISR_handler(rtems_vector_number vector) |
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18 | { |
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19 | int irq = vector - 0x10; |
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20 | |
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21 | /* Let BSP fixup and/or handle incomming IRQ */ |
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22 | irq = bsp_irq_fixup(irq); |
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23 | |
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24 | bsp_dispatch_irq(irq); |
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25 | } |
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26 | |
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27 | /* Initialize interrupts */ |
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28 | int BSP_shared_interrupt_init(void) |
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29 | { |
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30 | rtems_vector_number vector; |
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31 | rtems_isr_entry previous_isr; |
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32 | int sc, i; |
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33 | |
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34 | for (i=0; i <= BSP_INTERRUPT_VECTOR_MAX_STD; i++) { |
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35 | vector = SPARC_ASYNCHRONOUS_TRAP(i) + 0x10; |
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36 | rtems_interrupt_catch(BSP_ISR_handler, vector, &previous_isr); |
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37 | } |
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38 | |
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39 | /* Initalize interrupt support */ |
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40 | sc = bsp_interrupt_initialize(); |
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41 | if (sc != RTEMS_SUCCESSFUL) |
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42 | return -1; |
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43 | |
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44 | return 0; |
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45 | } |
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46 | |
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47 | /* Callback from bsp_interrupt_initialize() */ |
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48 | rtems_status_code bsp_interrupt_facility_initialize(void) |
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49 | { |
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50 | return RTEMS_SUCCESSFUL; |
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51 | } |
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52 | |
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53 | rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) |
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54 | { |
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55 | BSP_Unmask_interrupt((int)vector); |
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56 | |
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57 | return RTEMS_SUCCESSFUL; |
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58 | } |
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59 | |
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60 | rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) |
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61 | { |
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62 | BSP_Mask_interrupt((int)vector); |
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63 | |
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64 | return RTEMS_SUCCESSFUL; |
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65 | } |
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66 | |
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67 | void BSP_shared_interrupt_mask(int irq) |
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68 | { |
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69 | BSP_Mask_interrupt(irq); |
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70 | } |
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71 | |
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72 | void BSP_shared_interrupt_unmask(int irq) |
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73 | { |
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74 | BSP_Unmask_interrupt(irq); |
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75 | } |
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76 | |
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77 | void BSP_shared_interrupt_clear(int irq) |
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78 | { |
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79 | /* We don't have to interrupt lock here, because the register is only |
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80 | * written and self clearing |
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81 | */ |
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82 | BSP_Clear_interrupt(irq); |
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83 | } |
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