source: rtems/c/src/lib/libbsp/sparc/shared/irq/irq-shared.c @ 95518e59

4.11
Last change on this file since 95518e59 was 95518e59, checked in by Daniel Hellstrom <daniel@…>, on Apr 6, 2012 at 10:05:07 AM

SPARC BSPs: implemented shared-irq using libbsp/shared layer

The implementation use IRQ number instead of vector number since
some IRQs does not have a unique vector, for example the extended
interrupts all enter the same trap vector entry.

Added support for the LEON3 extended interrupt controller when using
the shared IRQ layer.

ERC32 patches untested.

Signed-off-by: Daniel Hellstrom <daniel@…>

Regenerate

  • Property mode set to 100644
File size: 1.9 KB
Line 
1#include <rtems.h>
2#include <bsp.h>
3#include <bsp/irq-generic.h>
4
5static inline void bsp_dispatch_irq(int irq)
6{
7       bsp_interrupt_handler_entry *e =
8               &bsp_interrupt_handler_table[bsp_interrupt_handler_index(irq)];
9
10       while (e != NULL) {
11               (*e->handler)(e->arg);
12               e = e->next;
13       }
14}
15
16/* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */
17static void BSP_ISR_handler(rtems_vector_number vector)
18{
19       int irq = vector - 0x10;
20
21       /* Let BSP fixup and/or handle incomming IRQ */
22       irq = bsp_irq_fixup(irq);
23
24       bsp_dispatch_irq(irq);
25}
26
27/* Initialize interrupts */
28int BSP_shared_interrupt_init(void)
29{
30       rtems_vector_number vector;
31       rtems_isr_entry previous_isr;
32       int sc, i;
33
34       for (i=0; i <= BSP_INTERRUPT_VECTOR_MAX_STD; i++) {
35               vector = SPARC_ASYNCHRONOUS_TRAP(i) + 0x10;
36               rtems_interrupt_catch(BSP_ISR_handler, vector, &previous_isr);
37       }
38
39       /* Initalize interrupt support */
40       sc = bsp_interrupt_initialize();
41       if (sc != RTEMS_SUCCESSFUL)
42               return -1;
43
44       return 0;
45}
46
47/* Callback from bsp_interrupt_initialize() */
48rtems_status_code bsp_interrupt_facility_initialize(void)
49{
50       return RTEMS_SUCCESSFUL;
51}
52
53rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
54{
55       BSP_Unmask_interrupt((int)vector);
56
57       return RTEMS_SUCCESSFUL;
58}
59
60rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
61{
62       BSP_Mask_interrupt((int)vector);
63
64       return RTEMS_SUCCESSFUL;
65}
66
67void BSP_shared_interrupt_mask(int irq)
68{
69       BSP_Mask_interrupt(irq);
70}
71
72void BSP_shared_interrupt_unmask(int irq)
73{
74       BSP_Unmask_interrupt(irq);
75}
76
77void BSP_shared_interrupt_clear(int irq)
78{
79       /* We don't have to interrupt lock here, because the register is only
80        * written and self clearing
81        */
82       BSP_Clear_interrupt(irq);
83}
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