source: rtems/c/src/lib/libbsp/sparc/shared/include/grpci2.h @ 46e41c98

4.115
Last change on this file since 46e41c98 was 46e41c98, checked in by Daniel Hellstrom <daniel@…>, on 12/16/11 at 13:10:57

LEON: replaced old BSP PCI layer with new generic libpci PCI layer

The old code used a limited PCI configuration library, which was
duplicated into LEON2 and LEON3 BSP pci.c together with respective
Host controller PCI interface.

The LEON2 BSP had support for AT697 PCI, and LEON3 for GRPCI PCI
Host controller. With this update new PCI Host drivers are added,
and all support the new generic PCI Library:

  • AT697 PCI (LEON2 only)
  • GRPCI (LEON2-GRLIB and LEON3)
  • GRPCI2 (LEON2-GRLIB and LEON3)
  • Actel PCIF GRLIB Wrapper (LEON3 only)

The LEON2 BSP is defined as big-endian PCI in bsp.h, since the
AT697 supports only big-endian PCI.
  • Property mode set to 100644
File size: 2.0 KB
Line 
1/*  GRLIB GRPCI2 PCI HOST driver.
2 *
3 *  COPYRIGHT (c) 2011
4 *  Cobham Gaisler AB.
5 *
6 *  The license and distribution terms for this file may be
7 *  found in found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 */
10
11#ifndef __GRPCI2_H__
12#define __GRPCI2_H__
13
14#ifdef __cplusplus
15extern "C" {
16#endif
17
18extern void grpci2_register_drv(void);
19
20/* Driver Resources:
21 *
22 * PCI Interrupts
23 * ==============
24 * The interrupt settings are normally autodetected from Plyg&Play, however
25 * if IRQs are routed using custom GPIO pins in order to reduce the PIN count
26 * reserved for PCI, the options below can be used to tell GRPCI2 driver which
27 * System IRQ a PCI interrupt is connected to.
28 * Name="INTA#", Type=INT, System Interrupt number that PCI INTA is connected to
29 * Name="INTB#", Type=INT, System Interrupt number that PCI INTB is connected to
30 * Name="INTC#", Type=INT, System Interrupt number that PCI INTC is connected to
31 * Name="INTD#", Type=INT, System Interrupt number that PCI INTD is connected to
32 *
33 * Name="IRQmask", Type=INT,
34 *
35 * PCI Bytetwisting (endianess)
36 * ============================
37 * Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware
38 *
39 * PCI Host's Target BARs setup
40 * ============================
41 * The Host's BARs are not configured by the configuration routines, by default
42 * the BARs are configured disabled (BAR=0) except for BAR0 which is mapped to
43 * the Main Memory for the Host.
44 * Name="tgtBarCfg", Type=PTR (*grpci2_pcibar_cfg), Target PCI BARs of Host
45 */
46
47/* When the Host acts as a target on the PCI bus, the PCI BARs of the host's
48 * configuration space determine at which PCI address the Host will be accessed
49 * at and when accessing a BAR which AMBA address it will be translated to.
50 */
51struct grpci2_pcibar_cfg {
52        unsigned int pciadr;    /* PCI address of BAR (BAR content) */
53        unsigned int ahbadr;    /* 'pciadr' translated to this AHB Address */
54        unsigned int barsize;   /* PCI BAR Size, must be a power of 2 */
55};
56
57#ifdef __cplusplus
58}
59#endif
60
61#endif
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