1 | /* |
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2 | * SatCAN FPGA driver |
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3 | * |
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4 | * COPYRIGHT (c) 2008. |
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5 | * Cobham Gaisler AB. |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.org/license/LICENSE. |
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10 | */ |
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11 | |
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12 | #include <rtems/libio.h> |
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13 | #include <stdlib.h> |
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14 | #include <stdio.h> |
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15 | #include <string.h> |
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16 | #include <bsp.h> |
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17 | #include <rtems/bspIo.h> /* printk */ |
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18 | |
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19 | #include <bsp/satcan.h> |
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20 | #include <ambapp.h> |
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21 | |
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22 | #ifndef GAISLER_SATCAN |
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23 | #define GAISLER_SATCAN 0x080 |
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24 | #endif |
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25 | |
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26 | #if !defined(SATCAN_DEVNAME) |
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27 | #undef SATCAN_DEVNAME |
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28 | #define SATCAN_DEVNAME "/dev/satcan" |
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29 | #endif |
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30 | |
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31 | /* Enable debug output? */ |
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32 | /* #define DEBUG */ |
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33 | |
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34 | #ifdef DEBUG |
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35 | #define DBG(x...) printk(x) |
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36 | #else |
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37 | #define DBG(x...) |
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38 | #endif |
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39 | |
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40 | |
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41 | /* Defines related to DMA */ |
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42 | #define ALIGN_2KMEM 32*1024 |
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43 | #define ALIGN_8KMEM 128*1024 |
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44 | |
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45 | #define OFFSET_2K_LOW_POS 15 |
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46 | #define OFFSET_8K_LOW_POS 17 |
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47 | |
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48 | #define DMA_2K_DATA_SELECT (1 << 14) |
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49 | #define DMA_8K_DATA_SELECT (1 << 16) |
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50 | |
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51 | #define DMA_2K_DATA_OFFSET 16*1024 |
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52 | #define DMA_8K_DATA_OFFSET 64*1024 |
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53 | |
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54 | /* Core register structures and defines */ |
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55 | |
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56 | /* Indexes to SatCAN registers in satcan array are declared in satcan.h*/ |
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57 | /* Fields for some of the SatCAN FPGA registers */ |
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58 | |
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59 | /* CmdReg0 */ |
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60 | #define CAN_TODn_Int_sel (1 << 5) |
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61 | |
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62 | /* CmdReg1 */ |
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63 | #define Sel_2k_8kN (1 << 0) |
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64 | |
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65 | /* Read FIFO */ |
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66 | #define FIFO_Full (1 << 8) |
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67 | #define FIFO_Empty (1 << 9) |
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68 | |
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69 | /* DMA Ch_Enable */ |
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70 | #define DMA_AutoInitDmaTx (1 << 3) |
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71 | #define DMA_EnTx2 (1 << 2) |
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72 | #define DMA_EnTx1 (1 << 1) |
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73 | #define DMA_EnRx (1 << 0) |
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74 | |
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75 | /* SatCAN wrapper register fields */ |
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76 | #define CTRL_BT_P 9 |
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77 | #define CTRL_NODENO_P 5 |
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78 | #define CTRL_DIS (1 << 2) |
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79 | #define CTRL_DPS_P 1 |
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80 | #define CTRL_RST (1 << 0) |
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81 | |
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82 | #define IRQ_AHB (1 << 8) |
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83 | #define IRQ_PPS (1 << 7) |
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84 | #define IRQ_M5 (1 << 6) |
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85 | #define IRQ_M4 (1 << 5) |
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86 | #define IRQ_M3 (1 << 4) |
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87 | #define IRQ_M2 (1 << 3) |
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88 | #define IRQ_M1 (1 << 2) |
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89 | #define IRQ_SYNC (1 << 1) |
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90 | #define IRQ_CAN (1 << 0) |
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91 | |
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92 | #define MSK_AHB (1 << 8) |
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93 | #define MSK_PPS (1 << 7) |
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94 | #define MSK_M5 (1 << 6) |
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95 | #define MSK_M4 (1 << 5) |
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96 | #define MSK_M3 (1 << 4) |
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97 | #define MSK_M2 (1 << 3) |
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98 | #define MSK_M1 (1 << 2) |
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99 | #define MSK_SYNC (1 << 1) |
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100 | #define MSK_CAN (1 << 0) |
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101 | |
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102 | |
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103 | |
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104 | struct satcan_regs { |
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105 | volatile unsigned int satcan[32]; |
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106 | volatile unsigned int ctrl; |
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107 | volatile unsigned int irqpend; |
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108 | volatile unsigned int irqmask; |
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109 | volatile unsigned int membase; |
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110 | }; |
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111 | |
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112 | |
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113 | struct satcan_priv { |
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114 | /* config */ |
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115 | void *dmaptr; |
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116 | unsigned char *alptr; |
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117 | satcan_config *cfg; |
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118 | |
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119 | /* driver state */ |
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120 | rtems_id devsem; |
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121 | rtems_id txsem; |
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122 | int open; |
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123 | int txactive; |
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124 | int dmaen; |
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125 | int doff; |
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126 | rtems_interval timeout; |
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127 | int dmamode; |
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128 | }; |
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129 | |
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130 | static struct satcan_regs *regs; |
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131 | static struct satcan_priv *priv; |
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132 | |
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133 | static rtems_device_driver satcan_ioctl(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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134 | static rtems_device_driver satcan_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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135 | static rtems_device_driver satcan_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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136 | static rtems_device_driver satcan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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137 | static rtems_device_driver satcan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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138 | static rtems_device_driver satcan_initialize(rtems_device_major_number major, rtems_device_minor_number unused, void *arg); |
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139 | |
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140 | |
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141 | /* |
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142 | * almalloc: allocate memory area of size sz aligned on sz boundary |
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143 | * alptr: Utilized to return aligned pointer |
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144 | * ptr: Unaligned pointer |
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145 | * sz: Size of memory area |
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146 | */ |
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147 | static void almalloc(unsigned char **alptr, void **ptr, int sz) |
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148 | { |
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149 | *ptr = calloc(1,2*sz); |
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150 | *alptr = (unsigned char *) (((int)*ptr+sz) & ~(sz-1)); |
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151 | } |
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152 | |
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153 | static rtems_isr satcan_interrupt_handler(rtems_vector_number v) |
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154 | { |
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155 | unsigned int irq; |
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156 | unsigned int fifo; |
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157 | |
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158 | irq = regs->irqpend; |
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159 | |
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160 | if (irq & IRQ_AHB && priv->cfg->ahb_irq_callback) { |
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161 | priv->cfg->ahb_irq_callback(); |
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162 | } |
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163 | if (irq & IRQ_PPS && priv->cfg->pps_irq_callback) { |
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164 | priv->cfg->pps_irq_callback(); |
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165 | } |
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166 | if (irq & IRQ_M5 && priv->cfg->m5_irq_callback) { |
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167 | priv->cfg->m5_irq_callback(); |
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168 | } |
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169 | if (irq & IRQ_M4 && priv->cfg->m4_irq_callback) { |
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170 | priv->cfg->m4_irq_callback(); |
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171 | } |
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172 | if (irq & IRQ_M3 && priv->cfg->m3_irq_callback) { |
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173 | priv->cfg->m3_irq_callback(); |
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174 | } |
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175 | if (irq & IRQ_M2 && priv->cfg->m2_irq_callback) { |
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176 | priv->cfg->m2_irq_callback(); |
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177 | } |
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178 | if (irq & IRQ_M1 && priv->cfg->m1_irq_callback) { |
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179 | priv->cfg->m1_irq_callback(); |
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180 | } |
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181 | if (irq & IRQ_SYNC && priv->cfg->sync_irq_callback) { |
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182 | priv->cfg->sync_irq_callback(); |
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183 | } |
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184 | if (irq & IRQ_CAN) { |
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185 | fifo = regs->satcan[SATCAN_FIFO]; |
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186 | if (!(fifo & FIFO_Empty) && priv->txactive && |
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187 | (((fifo & 0xff) == SATCAN_IRQ_EOD1) || ((fifo & 0xff) == SATCAN_IRQ_EOD2))) { |
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188 | rtems_semaphore_release(priv->txsem); |
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189 | } |
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190 | if (priv->cfg->can_irq_callback) |
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191 | priv->cfg->can_irq_callback(fifo); |
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192 | } |
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193 | } |
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194 | |
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195 | |
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196 | |
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197 | static rtems_device_driver satcan_ioctl(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
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198 | { |
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199 | rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t*)arg; |
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200 | int *value; |
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201 | rtems_interval *timeout; |
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202 | satcan_regmod *regmod; |
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203 | |
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204 | DBG("SatCAN: IOCTL %d\n\r", ioarg->command); |
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205 | |
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206 | ioarg->ioctl_return = 0; |
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207 | switch(ioarg->command) { |
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208 | case SATCAN_IOC_DMA_2K: |
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209 | DBG("SatCAN: ioctl: setting 2K DMA mode\n\r"); |
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210 | free(priv->dmaptr); |
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211 | almalloc(&priv->alptr, &priv->dmaptr, ALIGN_2KMEM); |
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212 | if (priv->dmaptr == NULL) { |
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213 | printk("SatCAN: Failed to allocate DMA memory\n\r"); |
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214 | return RTEMS_NO_MEMORY; |
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215 | } |
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216 | |
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217 | regs->membase = (unsigned int)priv->alptr; |
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218 | regs->satcan[SATCAN_RAM_BASE] = (unsigned int)priv->alptr >> OFFSET_2K_LOW_POS; |
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219 | regs->satcan[SATCAN_CMD1] = regs->satcan[SATCAN_CMD1] | Sel_2k_8kN; |
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220 | break; |
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221 | |
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222 | case SATCAN_IOC_DMA_8K: |
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223 | DBG("SatCAN: ioctl: setting 8K DMA mode\n\r"); |
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224 | free(priv->dmaptr); |
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225 | almalloc(&priv->alptr, &priv->dmaptr, ALIGN_8KMEM); |
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226 | if (priv->dmaptr == NULL) { |
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227 | printk("SatCAN: Failed to allocate DMA memory\n\r"); |
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228 | return RTEMS_NO_MEMORY; |
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229 | } |
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230 | |
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231 | regs->membase = (unsigned int)priv->alptr; |
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232 | regs->satcan[SATCAN_RAM_BASE] = (unsigned int)priv->alptr >> OFFSET_8K_LOW_POS; |
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233 | regs->satcan[SATCAN_CMD1] = regs->satcan[SATCAN_CMD1] & ~Sel_2k_8kN; |
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234 | break; |
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235 | |
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236 | case SATCAN_IOC_GET_REG: |
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237 | /* Get regmod structure from argument */ |
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238 | regmod = (satcan_regmod*)ioarg->buffer; |
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239 | DBG("SatCAN: ioctl: getting register %d\n\r", regmod->reg); |
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240 | if (regmod->reg < 0) |
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241 | return RTEMS_INVALID_NAME; |
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242 | else if (regmod->reg <= SATCAN_FILTER_STOP) |
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243 | regmod->val = regs->satcan[regmod->reg]; |
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244 | else if (regmod->reg == SATCAN_WCTRL) |
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245 | regmod->val = regs->ctrl; |
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246 | else if (regmod->reg == SATCAN_WIPEND) |
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247 | regmod->val = regs->irqpend; |
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248 | else if (regmod->reg == SATCAN_WIMASK) |
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249 | regmod->val = regs->irqmask; |
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250 | else if (regmod->reg == SATCAN_WAHBADDR) |
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251 | regmod->val = regs->membase; |
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252 | else |
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253 | return RTEMS_INVALID_NAME; |
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254 | break; |
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255 | |
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256 | case SATCAN_IOC_SET_REG: |
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257 | /* Get regmod structure from argument */ |
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258 | regmod = (satcan_regmod*)ioarg->buffer; |
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259 | DBG("SatCAN: ioctl: setting register %d, value %x\n\r", |
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260 | regmod->reg, regmod->val); |
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261 | if (regmod->reg < 0) |
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262 | return RTEMS_INVALID_NAME; |
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263 | else if (regmod->reg <= SATCAN_FILTER_STOP) |
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264 | regs->satcan[regmod->reg] = regmod->val; |
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265 | else if (regmod->reg == SATCAN_WCTRL) |
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266 | regs->ctrl = regmod->val; |
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267 | else if (regmod->reg == SATCAN_WIPEND) |
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268 | regs->irqpend = regmod->val; |
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269 | else if (regmod->reg == SATCAN_WIMASK) |
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270 | regs->irqmask = regmod->val; |
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271 | else if (regmod->reg == SATCAN_WAHBADDR) |
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272 | regs->membase = regmod->val; |
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273 | else |
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274 | return RTEMS_INVALID_NAME; |
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275 | break; |
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276 | |
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277 | case SATCAN_IOC_OR_REG: |
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278 | /* Get regmod structure from argument */ |
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279 | regmod = (satcan_regmod*)ioarg->buffer; |
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280 | DBG("SatCAN: ioctl: or:ing register %d, with value %x\n\r", |
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281 | regmod->reg, regmod->val); |
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282 | if (regmod->reg < 0) |
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283 | return RTEMS_INVALID_NAME; |
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284 | else if (regmod->reg <= SATCAN_FILTER_STOP) |
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285 | regs->satcan[regmod->reg] |= regmod->val; |
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286 | else if (regmod->reg == SATCAN_WCTRL) |
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287 | regs->ctrl |= regmod->val; |
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288 | else if (regmod->reg == SATCAN_WIPEND) |
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289 | regs->irqpend |= regmod->val; |
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290 | else if (regmod->reg == SATCAN_WIMASK) |
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291 | regs->irqmask |= regmod->val; |
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292 | else if (regmod->reg == SATCAN_WAHBADDR) |
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293 | regs->membase |= regmod->val; |
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294 | else |
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295 | return RTEMS_INVALID_NAME; |
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296 | break; |
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297 | |
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298 | case SATCAN_IOC_AND_REG: |
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299 | /* Get regmod structure from argument */ |
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300 | regmod = (satcan_regmod*)ioarg->buffer; |
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301 | DBG("SatCAN: ioctl: masking register %d, with value %x\n\r", |
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302 | regmod->reg, regmod->val); |
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303 | if (regmod->reg < 0) |
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304 | return RTEMS_INVALID_NAME; |
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305 | else if (regmod->reg <= SATCAN_FILTER_STOP) |
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306 | regs->satcan[regmod->reg] &= regmod->val; |
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307 | else if (regmod->reg == SATCAN_WCTRL) |
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308 | regs->ctrl &= regmod->val; |
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309 | else if (regmod->reg == SATCAN_WIPEND) |
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310 | regs->irqpend &= regmod->val; |
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311 | else if (regmod->reg == SATCAN_WIMASK) |
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312 | regs->irqmask &= regmod->val; |
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313 | else if (regmod->reg == SATCAN_WAHBADDR) |
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314 | regs->membase &= regmod->val; |
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315 | else |
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316 | return RTEMS_INVALID_NAME; |
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317 | break; |
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318 | |
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319 | case SATCAN_IOC_EN_TX1_DIS_TX2: |
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320 | priv->dmaen = SATCAN_DMA_ENABLE_TX1; |
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321 | break; |
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322 | |
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323 | case SATCAN_IOC_EN_TX2_DIS_TX1: |
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324 | priv->dmaen = SATCAN_DMA_ENABLE_TX2; |
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325 | break; |
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326 | |
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327 | case SATCAN_IOC_GET_DMA_MODE: |
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328 | value = (int*)ioarg->buffer; |
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329 | *value = priv->dmamode; |
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330 | break; |
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331 | |
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332 | case SATCAN_IOC_SET_DMA_MODE: |
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333 | value = (int*)ioarg->buffer; |
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334 | if (*value != SATCAN_DMA_MODE_USER && *value != SATCAN_DMA_MODE_SYSTEM) { |
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335 | DBG("SatCAN: ioctl: invalid DMA mode\n\r"); |
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336 | return RTEMS_INVALID_NAME; |
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337 | } |
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338 | priv->dmamode = *value; |
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339 | break; |
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340 | |
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341 | case SATCAN_IOC_ACTIVATE_DMA: |
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342 | if (priv->dmamode != SATCAN_DMA_MODE_USER) { |
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343 | DBG("SatCAN: ioctl: ACTIVATE_DMA: not in user mode\n\r"); |
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344 | return RTEMS_INVALID_NAME; |
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345 | } |
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346 | value = (int*)ioarg->buffer; |
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347 | if (*value != SATCAN_DMA_ENABLE_TX1 && *value != SATCAN_DMA_ENABLE_TX2) { |
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348 | DBG("SatCAN: ioctl: ACTIVATE_DMA: Illegal channel\n\r"); |
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349 | return RTEMS_INVALID_NAME; |
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350 | } |
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351 | regs->satcan[SATCAN_DMA] |= *value << 1; |
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352 | break; |
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353 | |
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354 | case SATCAN_IOC_DEACTIVATE_DMA: |
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355 | if (priv->dmamode != SATCAN_DMA_MODE_USER) { |
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356 | DBG("SatCAN: ioctl: DEACTIVATE_DMA: not in user mode\n\r"); |
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357 | return RTEMS_INVALID_NAME; |
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358 | } |
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359 | value = (int*)ioarg->buffer; |
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360 | if (*value != SATCAN_DMA_ENABLE_TX1 && *value != SATCAN_DMA_ENABLE_TX2) { |
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361 | DBG("SatCAN: ioctl: DEACTIVATE_DMA: Illegal channel\n\r"); |
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362 | return RTEMS_INVALID_NAME; |
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363 | } |
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364 | regs->satcan[SATCAN_DMA] &= ~(*value << 1); |
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365 | break; |
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366 | |
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367 | case SATCAN_IOC_GET_DOFFSET: |
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368 | value = (int*)ioarg->buffer; |
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369 | *value = priv->doff; |
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370 | break; |
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371 | |
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372 | case SATCAN_IOC_SET_DOFFSET: |
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373 | value = (int*)ioarg->buffer; |
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374 | priv->doff = *value; |
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375 | break; |
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376 | |
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377 | case SATCAN_IOC_GET_TIMEOUT: |
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378 | timeout = (rtems_interval*)ioarg->buffer; |
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379 | *timeout = priv->timeout; |
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380 | break; |
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381 | |
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382 | case SATCAN_IOC_SET_TIMEOUT: |
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383 | timeout = (rtems_interval*)ioarg->buffer; |
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384 | priv->timeout = *timeout; |
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385 | break; |
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386 | |
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387 | default: |
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388 | return RTEMS_NOT_DEFINED; |
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389 | } |
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390 | |
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391 | return RTEMS_SUCCESSFUL; |
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392 | } |
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393 | |
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394 | static rtems_device_driver satcan_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
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395 | { |
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396 | int i; |
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397 | int doff; |
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398 | int msgindex; |
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399 | int messages; |
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400 | rtems_libio_rw_args_t *rw_args=(rtems_libio_rw_args_t *) arg; |
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401 | satcan_msg *msgs; |
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402 | rtems_status_code status; |
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403 | |
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404 | DBG("SatCAN: Writing %d bytes from %p\n\r",rw_args->count,rw_args->buffer); |
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405 | |
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406 | if ((rw_args->count < sizeof(satcan_msg)) || (!rw_args->buffer)) { |
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407 | DBG("SatCAN: write: returning EINVAL\n\r"); |
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408 | return RTEMS_INVALID_NAME; /* EINVAL */ |
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409 | } |
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410 | |
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411 | messages = rw_args->count / sizeof(satcan_msg); |
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412 | msgs = (satcan_msg*)rw_args->buffer; |
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413 | |
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414 | /* Check that size matches any number of satcan_msg */ |
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415 | if (rw_args->count % sizeof(satcan_msg)) { |
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416 | DBG("SatCAN: write: count can not be evenly divided with satcan_msg size\n\r"); |
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417 | return RTEMS_INVALID_NAME; /* EINVAL */ |
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418 | } |
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419 | |
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420 | |
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421 | /* DMA channel must be set if we are in system DMA mode */ |
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422 | DBG("SatCAN: write: dma channel select is %x\n\r", priv->dmaen); |
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423 | if (!priv->dmaen && priv->dmamode == SATCAN_DMA_MODE_SYSTEM) |
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424 | return RTEMS_INVALID_NAME; /* EINVAL */ |
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425 | |
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426 | /* DMA must not be active */ |
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427 | if (regs->satcan[SATCAN_DMA] & (DMA_EnTx1 | DMA_EnTx2 | DMA_AutoInitDmaTx)) { |
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428 | DBG("SatCAN: write: DMA was active\n\r"); |
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429 | rw_args->bytes_moved = 0; |
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430 | return RTEMS_IO_ERROR; /* EIO */ |
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431 | } |
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432 | |
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433 | doff = regs->satcan[SATCAN_CMD1] & Sel_2k_8kN ? DMA_2K_DATA_OFFSET : DMA_8K_DATA_OFFSET; |
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434 | |
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435 | for (msgindex = 0; msgindex < messages; msgindex++) { |
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436 | /* Place header in DMA area */ |
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437 | for (i = 0; i < SATCAN_HEADER_SIZE; i++) { |
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438 | priv->alptr[priv->doff+8*msgindex+i] = msgs[msgindex].header[i]; |
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439 | } |
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440 | |
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441 | /* Place data in DMA area */ |
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442 | for (i = 0; i < SATCAN_PAYLOAD_SIZE; i++) |
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443 | priv->alptr[priv->doff+doff+8*msgindex+i] = msgs[msgindex].payload[i]; |
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444 | } |
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445 | |
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446 | if ((priv->dmaen & SATCAN_DMA_ENABLE_TX1) || priv->dmamode == SATCAN_DMA_MODE_USER) { |
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447 | regs->satcan[SATCAN_DMA_TX_1_CUR] = 0; |
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448 | regs->satcan[SATCAN_DMA_TX_1_END] = messages<<3; |
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449 | } |
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450 | |
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451 | if ((priv->dmaen & SATCAN_DMA_ENABLE_TX2) || priv->dmamode == SATCAN_DMA_MODE_USER) { |
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452 | regs->satcan[SATCAN_DMA_TX_2_CUR] = 0; |
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453 | regs->satcan[SATCAN_DMA_TX_2_END] = messages<<3; |
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454 | } |
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455 | |
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456 | /* If we are in DMA user mode we are done here, otherwise we block */ |
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457 | if (priv->dmamode == SATCAN_DMA_MODE_SYSTEM) { |
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458 | priv->txactive = 1; |
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459 | |
---|
460 | /* Enable DMA */ |
---|
461 | regs->satcan[SATCAN_DMA] |= priv->dmaen << 1; |
---|
462 | |
---|
463 | /* Wait for TX interrupt */ |
---|
464 | status = rtems_semaphore_obtain(priv->txsem, RTEMS_WAIT, priv->timeout); |
---|
465 | |
---|
466 | priv->txactive = 0; |
---|
467 | |
---|
468 | /* Disable activated Tx DMA */ |
---|
469 | regs->satcan[SATCAN_DMA] &= ~(priv->dmaen << 1); |
---|
470 | |
---|
471 | if (status != RTEMS_SUCCESSFUL) { |
---|
472 | rw_args->bytes_moved = 0; |
---|
473 | return status; |
---|
474 | } |
---|
475 | } |
---|
476 | |
---|
477 | rw_args->bytes_moved = rw_args->count; |
---|
478 | |
---|
479 | return RTEMS_SUCCESSFUL; |
---|
480 | } |
---|
481 | |
---|
482 | static rtems_device_driver satcan_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
---|
483 | { |
---|
484 | char *buf; |
---|
485 | int i; |
---|
486 | int canid; |
---|
487 | int messages; |
---|
488 | rtems_libio_rw_args_t *rw_args = (rtems_libio_rw_args_t*)arg; |
---|
489 | satcan_msg *ret; |
---|
490 | |
---|
491 | /* Check that there is room for the return */ |
---|
492 | if (rw_args->count < sizeof(satcan_msg)) { |
---|
493 | DBG("SatCAN: read: length of buffer must be at least %d, current is %d\n\r", |
---|
494 | sizeof(satcan_msg) + sizeof(int), rw_args->count); |
---|
495 | return RTEMS_INVALID_NAME; /* -EINVAL */ |
---|
496 | } |
---|
497 | |
---|
498 | /* Check that size matches any number of satcan_msg */ |
---|
499 | if (rw_args->count % sizeof(satcan_msg)) { |
---|
500 | DBG("SatCAN: read: count can not be evenly divided with satcan_msg size\n\r"); |
---|
501 | return RTEMS_INVALID_NAME; /* EINVAL */ |
---|
502 | } |
---|
503 | |
---|
504 | messages = rw_args->count / sizeof(satcan_msg); |
---|
505 | ret = (satcan_msg*)rw_args->buffer; |
---|
506 | |
---|
507 | DBG("SatCAN: read: reading %d messages to %p\n\r", messages, ret); |
---|
508 | |
---|
509 | for (i = 0; i < messages; i++) { |
---|
510 | canid = (ret[i].header[1] << 8) | ret[i].header[0]; |
---|
511 | |
---|
512 | /* Copy message header from DMA header area to buffer */ |
---|
513 | buf = (char*)((int)priv->alptr | (canid << 3)); |
---|
514 | memcpy(ret[i].header, buf, SATCAN_HEADER_SIZE); |
---|
515 | |
---|
516 | DBG("SatCAN: read: copied header from %p to %p\n\r", buf, ret[i].header); |
---|
517 | |
---|
518 | /* Clear New Message Marker */ |
---|
519 | buf[SATCAN_HEADER_NMM_POS] = 0; |
---|
520 | |
---|
521 | /* Copy message payload from DMA data area to buffer */ |
---|
522 | buf = (char*)((int)buf | |
---|
523 | (regs->satcan[SATCAN_CMD1] & Sel_2k_8kN ? DMA_2K_DATA_SELECT : DMA_8K_DATA_SELECT)); |
---|
524 | memcpy(ret[i].payload, buf, SATCAN_PAYLOAD_SIZE); |
---|
525 | |
---|
526 | DBG("SatCAN: read: copied payload from %p to %p\n\r", buf, ret[i].payload); |
---|
527 | } |
---|
528 | rw_args->bytes_moved = rw_args->count; |
---|
529 | |
---|
530 | return RTEMS_SUCCESSFUL; |
---|
531 | } |
---|
532 | |
---|
533 | |
---|
534 | static rtems_device_driver satcan_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
---|
535 | { |
---|
536 | DBG("SatCAN: Closing %d\n\r",minor); |
---|
537 | |
---|
538 | if (priv->open) { |
---|
539 | regs->irqmask = 0; |
---|
540 | regs->satcan[SATCAN_INT_EN] = 0; |
---|
541 | regs->satcan[SATCAN_RX] = 0; |
---|
542 | regs->satcan[SATCAN_DMA] = 0; |
---|
543 | priv->open = 0; |
---|
544 | priv->dmaen = 0; |
---|
545 | priv->doff = 0; |
---|
546 | priv->timeout = RTEMS_NO_TIMEOUT; |
---|
547 | priv->dmamode = SATCAN_DMA_MODE_SYSTEM; |
---|
548 | } |
---|
549 | |
---|
550 | return RTEMS_SUCCESSFUL; |
---|
551 | } |
---|
552 | |
---|
553 | |
---|
554 | static rtems_device_driver satcan_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
---|
555 | { |
---|
556 | DBG("SatCAN: Opening %d\n\r",minor); |
---|
557 | |
---|
558 | rtems_semaphore_obtain(priv->devsem,RTEMS_WAIT, RTEMS_NO_TIMEOUT); |
---|
559 | if (priv->open) { |
---|
560 | rtems_semaphore_release(priv->devsem); |
---|
561 | return RTEMS_RESOURCE_IN_USE; /* EBUSY */ |
---|
562 | } |
---|
563 | priv->open = 1; |
---|
564 | rtems_semaphore_release(priv->devsem); |
---|
565 | |
---|
566 | /* Enable AHB and CAN IRQs in wrapper and EOD1, EOD2 and CAN critical IRQs in SatCAN core */ |
---|
567 | regs->irqmask = MSK_AHB | MSK_CAN; |
---|
568 | regs->satcan[SATCAN_INT_EN] = ((1 << SATCAN_IRQ_EOD1) | (1 << SATCAN_IRQ_EOD2) | |
---|
569 | (1 << SATCAN_IRQ_CRITICAL)); |
---|
570 | |
---|
571 | /* Select can_int as IRQ source */ |
---|
572 | regs->satcan[SATCAN_CMD0] = CAN_TODn_Int_sel; |
---|
573 | /* CAN RX DMA Enable */ |
---|
574 | regs->satcan[SATCAN_DMA] = 1; |
---|
575 | /* CAN RX Enable */ |
---|
576 | regs->satcan[SATCAN_RX] = 1; |
---|
577 | |
---|
578 | DBG("SatCAN: Opening %d success\n\r",minor); |
---|
579 | |
---|
580 | return RTEMS_SUCCESSFUL; |
---|
581 | } |
---|
582 | |
---|
583 | static rtems_device_driver satcan_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) |
---|
584 | { |
---|
585 | struct ambapp_ahb_info d; |
---|
586 | char fs_name[20]; |
---|
587 | rtems_status_code status; |
---|
588 | |
---|
589 | DBG("SatCAN: Initialize..\n\r"); |
---|
590 | |
---|
591 | strcpy(fs_name, SATCAN_DEVNAME); |
---|
592 | |
---|
593 | /* Find core and initialize register pointer */ |
---|
594 | if (!ambapp_find_ahbslv(&ambapp_plb, VENDOR_GAISLER, GAISLER_SATCAN, &d)) { |
---|
595 | printk("SatCAN: Failed to find SatCAN core\n\r"); |
---|
596 | return -1; |
---|
597 | } |
---|
598 | |
---|
599 | status = rtems_io_register_name(fs_name, major, minor); |
---|
600 | if (RTEMS_SUCCESSFUL != status) |
---|
601 | rtems_fatal_error_occurred(status); |
---|
602 | |
---|
603 | regs = (struct satcan_regs*)d.start[0]; |
---|
604 | |
---|
605 | /* Set node number and DPS */ |
---|
606 | regs->ctrl |= ((priv->cfg->nodeno & 0xf) << 5) | (priv->cfg->dps << 1); |
---|
607 | |
---|
608 | /* Reset core */ |
---|
609 | regs->ctrl |= CTRL_RST; |
---|
610 | |
---|
611 | /* Allocate DMA area */ |
---|
612 | almalloc(&priv->alptr, &priv->dmaptr, ALIGN_2KMEM); |
---|
613 | if (priv->dmaptr == NULL) { |
---|
614 | printk("SatCAN: Failed to allocate DMA memory\n\r"); |
---|
615 | free(priv->cfg); |
---|
616 | free(priv); |
---|
617 | return -1; |
---|
618 | } |
---|
619 | |
---|
620 | /* Wait until core reset has completed */ |
---|
621 | while (regs->ctrl & CTRL_RST) |
---|
622 | ; |
---|
623 | |
---|
624 | /* Initialize core registers, default is 2K messages */ |
---|
625 | regs->membase = (unsigned int)priv->alptr; |
---|
626 | regs->satcan[SATCAN_RAM_BASE] = (unsigned int)priv->alptr >> 15; |
---|
627 | |
---|
628 | DBG("regs->membase = %x\n\r", (unsigned int)priv->alptr); |
---|
629 | DBG("regs->satcan[SATCAN_RAM_BASE] = %x\n\r", (unsigned int)priv->alptr >> 15); |
---|
630 | |
---|
631 | status = rtems_semaphore_create( |
---|
632 | rtems_build_name('S', 'd', 'v', '0'), |
---|
633 | 1, |
---|
634 | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \ |
---|
635 | RTEMS_NO_PRIORITY_CEILING, |
---|
636 | 0, |
---|
637 | &priv->devsem); |
---|
638 | if (status != RTEMS_SUCCESSFUL) { |
---|
639 | printk("SatCAN: Failed to create dev semaphore (%d)\n\r", status); |
---|
640 | free(priv->cfg); |
---|
641 | free(priv); |
---|
642 | return RTEMS_UNSATISFIED; |
---|
643 | } |
---|
644 | status = rtems_semaphore_create( |
---|
645 | rtems_build_name('S', 't', 'x', '0'), |
---|
646 | 0, |
---|
647 | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY | \ |
---|
648 | RTEMS_NO_PRIORITY_CEILING, |
---|
649 | 0, |
---|
650 | &priv->txsem); |
---|
651 | if (status != RTEMS_SUCCESSFUL) { |
---|
652 | printk("SatCAN: Failed to create tx semaphore (%d)\n\r", status); |
---|
653 | free(priv->cfg); |
---|
654 | free(priv); |
---|
655 | return RTEMS_UNSATISFIED; |
---|
656 | } |
---|
657 | |
---|
658 | priv->txactive = 0; |
---|
659 | priv->open = 0; |
---|
660 | priv->dmaen = 0; |
---|
661 | priv->doff = 0; |
---|
662 | priv->timeout = RTEMS_NO_TIMEOUT; |
---|
663 | priv->dmamode = SATCAN_DMA_MODE_SYSTEM; |
---|
664 | |
---|
665 | /* Register interrupt handler */ |
---|
666 | set_vector(satcan_interrupt_handler, d.irq+0x10, 2); |
---|
667 | |
---|
668 | return RTEMS_SUCCESSFUL; |
---|
669 | } |
---|
670 | |
---|
671 | |
---|
672 | |
---|
673 | #define SATCAN_DRIVER_TABLE_ENTRY { satcan_initialize, satcan_open, satcan_close, satcan_read, satcan_write, satcan_ioctl } |
---|
674 | |
---|
675 | static rtems_driver_address_table satcan_driver = SATCAN_DRIVER_TABLE_ENTRY; |
---|
676 | |
---|
677 | int satcan_register(satcan_config *conf) |
---|
678 | { |
---|
679 | rtems_status_code r; |
---|
680 | rtems_device_major_number m; |
---|
681 | |
---|
682 | DBG("SatCAN: satcan_register called\n\r"); |
---|
683 | |
---|
684 | /* Create private structure */ |
---|
685 | if ((priv = malloc(sizeof(struct satcan_priv))) == NULL) { |
---|
686 | printk("SatCAN driver could not allocate memory for priv structure\n\r"); |
---|
687 | return -1; |
---|
688 | } |
---|
689 | |
---|
690 | DBG("SatCAN: Creating local copy of config structure\n\r"); |
---|
691 | if ((priv->cfg = malloc(sizeof(satcan_config))) == NULL) { |
---|
692 | printk("SatCAN driver could not allocate memory for cfg structure\n\r"); |
---|
693 | return 1; |
---|
694 | } |
---|
695 | memcpy(priv->cfg, conf, sizeof(satcan_config)); |
---|
696 | |
---|
697 | if ((r = rtems_io_register_driver(0, &satcan_driver, &m)) == RTEMS_SUCCESSFUL) { |
---|
698 | DBG("SatCAN driver successfully registered, major: %d\n\r", m); |
---|
699 | } else { |
---|
700 | switch(r) { |
---|
701 | case RTEMS_TOO_MANY: |
---|
702 | printk("SatCAN rtems_io_register_driver failed: RTEMS_TOO_MANY\n\r"); break; |
---|
703 | case RTEMS_INVALID_NUMBER: |
---|
704 | printk("SatCAN rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n\r"); break; |
---|
705 | case RTEMS_RESOURCE_IN_USE: |
---|
706 | printk("SatCAN rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n\r"); break; |
---|
707 | default: |
---|
708 | printk("SatCAN rtems_io_register_driver failed\n\r"); |
---|
709 | } |
---|
710 | return 1; |
---|
711 | } |
---|
712 | |
---|
713 | return 0; |
---|
714 | } |
---|