source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ cd0142d5

4.104.114.84.95
Last change on this file since cd0142d5 was cd0142d5, checked in by Joel Sherrill <joel.sherrill@…>, on 04/12/06 at 20:32:35

2006-04-12 Konrad Eisele <konrad@…>

  • include/leon.h: Add LEON_INTERRUPT_EXTERNAL_1 define.
  • Property mode set to 100644
File size: 12.5 KB
Line 
1/*  leon.h
2 *
3 *  LEON3 BSP data types and macros.
4 *
5 *  COPYRIGHT (c) 1989-1998.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  Modified for LEON3 BSP.
9 *  COPYRIGHT (c) 2004.
10 *  Gaisler Research.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18 
19#ifndef _INCLUDE_LEON_h
20#define _INCLUDE_LEON_h
21
22#include <rtems/score/sparc.h>
23#include <amba.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#define LEON_INTERRUPT_EXTERNAL_1 5
30
31#ifndef ASM
32/*
33 *  Trap Types for on-chip peripherals
34 *
35 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
36 *
37 *  NOTE: The priority level for each source corresponds to the least
38 *        significant nibble of the trap type.
39 */
40
41#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
42
43#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
44
45#define LEON_INT_TRAP( _trap ) \
46  ( (_trap) >= 0x11 && \
47    (_trap) <= 0x1F )
48   
49/*
50 *  Structure for LEON memory mapped registers. 
51 *
52 *  Source: Section 6.1 - On-chip registers
53 *
54 *  NOTE:  There is only one of these structures per CPU, its base address
55 *         is 0x80000000, and the variable LEON_REG is placed there by the
56 *         linkcmds file.
57 */
58
59/* Leon uses dynamic register mapping using amba configuration records,
60 * LEON_Register_Map is obsolete
61 */
62/*
63  typedef struct {
64        volatile unsigned int Memory_Config_1;
65        volatile unsigned int Memory_Config_2;
66        volatile unsigned int Edac_Control;
67        volatile unsigned int Failed_Address;
68        volatile unsigned int Memory_Status;
69        volatile unsigned int Cache_Control;
70        volatile unsigned int Power_Down;
71        volatile unsigned int Write_Protection_1;
72        volatile unsigned int Write_Protection_2;
73        volatile unsigned int Leon_Configuration;
74        volatile unsigned int dummy2;
75        volatile unsigned int dummy3;
76        volatile unsigned int dummy4;   
77        volatile unsigned int dummy5;
78        volatile unsigned int dummy6;
79        volatile unsigned int dummy7;
80        volatile unsigned int Timer_Counter_1;
81        volatile unsigned int Timer_Reload_1;
82        volatile unsigned int Timer_Control_1;
83        volatile unsigned int Watchdog;
84        volatile unsigned int Timer_Counter_2;
85        volatile unsigned int Timer_Reload_2;
86        volatile unsigned int Timer_Control_2;
87        volatile unsigned int dummy8;
88        volatile unsigned int Scaler_Counter;
89        volatile unsigned int Scaler_Reload;
90        volatile unsigned int dummy9;
91        volatile unsigned int dummy10;
92        volatile unsigned int UART_Channel_1;
93        volatile unsigned int UART_Status_1;
94        volatile unsigned int UART_Control_1;
95        volatile unsigned int UART_Scaler_1;
96        volatile unsigned int UART_Channel_2;
97        volatile unsigned int UART_Status_2;
98        volatile unsigned int UART_Control_2;
99        volatile unsigned int UART_Scaler_2;
100        volatile unsigned int Interrupt_Mask;
101        volatile unsigned int Interrupt_Pending;
102        volatile unsigned int Interrupt_Force;
103        volatile unsigned int Interrupt_Clear;
104        volatile unsigned int PIO_Data;
105        volatile unsigned int PIO_Direction;
106        volatile unsigned int PIO_Interrupt;
107} LEON_Register_Map;
108*/
109
110typedef struct {
111  volatile unsigned int data;
112  volatile unsigned int status;
113  volatile unsigned int ctrl;
114} LEON3_UART_Regs_Map;
115
116typedef struct {
117  volatile unsigned int ilevel;
118  volatile unsigned int ipend;
119  volatile unsigned int iforce;
120  volatile unsigned int iclear;
121  volatile unsigned int notused00;
122  volatile unsigned int notused01;
123  volatile unsigned int notused02;
124  volatile unsigned int notused03;
125  volatile unsigned int notused10;
126  volatile unsigned int notused11;
127  volatile unsigned int notused12;
128  volatile unsigned int notused13;
129  volatile unsigned int notused20;
130  volatile unsigned int notused21;
131  volatile unsigned int notused22;
132  volatile unsigned int notused23;
133  volatile unsigned int mask_p0;
134  volatile unsigned int mask_p1;
135  volatile unsigned int mask_p2;
136  volatile unsigned int mask_p3;
137  volatile unsigned int mask_p4;
138  volatile unsigned int mask_p5;
139  volatile unsigned int mask_p6;
140  volatile unsigned int mask_p7;
141  volatile unsigned int mask_p8;
142  volatile unsigned int mask_p9;
143  volatile unsigned int mask_p10;
144  volatile unsigned int mask_p11;
145  volatile unsigned int mask_p12;
146  volatile unsigned int mask_p13;
147  volatile unsigned int mask_p14;
148  volatile unsigned int mask_p15;
149} LEON3_IrqCtrl_Regs_Map;
150
151/*
152typedef struct {
153  volatile unsigned int value;
154  volatile unsigned int reload;
155  volatile unsigned int conf;
156  volatile unsigned int notused;
157} LEON3_Timer_SubType;
158*/
159
160typedef struct {
161  volatile unsigned int scaler_value;   /* common timer registers */
162  volatile unsigned int scaler_reload;
163  volatile unsigned int status;
164  volatile unsigned int notused;
165  volatile unsigned int value_t0;       /* timer 0 */
166  volatile unsigned int reload_t0;
167  volatile unsigned int conf_t0;
168  volatile unsigned int notused0;
169  volatile unsigned int value_t1;       /* timer 1 */
170  volatile unsigned int reload_t1;
171  volatile unsigned int conf_t1;
172  volatile unsigned int notused1;
173  volatile unsigned int value_t2;       /* timer 2 */
174  volatile unsigned int reload_t2;
175  volatile unsigned int conf_t2;
176  volatile unsigned int notused2;
177  volatile unsigned int value_t3;       /* timer 3 */
178  volatile unsigned int reload_t3;
179  volatile unsigned int conf_t3;
180  volatile unsigned int notused3;
181  volatile unsigned int value_t4;       /* timer 4 */
182  volatile unsigned int reload_t4;
183  volatile unsigned int conf_t4;
184  volatile unsigned int notused4;
185  volatile unsigned int value_t5;       /* timer 5 */
186  volatile unsigned int reload_t5;
187  volatile unsigned int conf_t5;
188  volatile unsigned int notused5;
189  volatile unsigned int value_t6;       /* timer 6 */
190  volatile unsigned int reload_t6;
191  volatile unsigned int conf_t6;
192} LEON3_Timer_Regs_Map;
193
194typedef struct {
195  volatile unsigned int iodata;
196  volatile unsigned int ioout;
197  volatile unsigned int iodir;
198  volatile unsigned int irqmask;
199  volatile unsigned int irqpol;
200  volatile unsigned int irqedge;
201} LEON3_IOPORT_Regs_Map;
202
203/* /\* */
204/*  *  This is used to manipulate the on-chip registers. */
205/*  * */
206/*  *  The following symbol must be defined in the linkcmds file and point */
207/*  *  to the correct location. */
208/*  *\/ */
209/* Leon uses dynamic register mapping using amba configuration records */
210/* LEON_Register_Map is obsolete */
211/* extern LEON_Register_Map LEON_REG; */
212 
213#endif
214
215/*
216 *  The following defines the bits in Memory Configuration Register 1.
217 */
218
219#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
220
221/*
222 *  The following defines the bits in Memory Configuration Register 1.
223 */
224
225#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
226
227 
228/*
229 *  The following defines the bits in the Timer Control Register.
230 */
231
232#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
233                                                 /* 0 = hold scalar and counter */
234#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
235                                                 /* 0 = stop at 0 */
236#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
237                                                 /* 0 = no function */
238
239/*
240 *  The following defines the bits in the UART Control Registers.
241 *
242 */
243
244#define LEON_REG_UART_CONTROL_RTD  0x000000FF /* RX/TX data */
245 
246/*
247 *  The following defines the bits in the LEON UART Status Registers.
248 */
249
250#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
251#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
252#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
253#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
254#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
255#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
256#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
257#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
258
259 
260/*
261 *  The following defines the bits in the LEON UART Status Registers.
262 */
263
264#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
265#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
266#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
267#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
268#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
269#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
270#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
271#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
272
273
274/*
275 *  Types and structure used for AMBA Plug & Play bus scanning
276 *
277 */
278
279typedef struct amba_device_table {
280  int            devnr;           /* numbrer of devices on AHB or APB bus */
281  unsigned int   *addr[16];       /* addresses to the devices configuration tables */
282} amba_device_table;
283
284typedef struct amba_confarea_type {
285  amba_device_table ahbmst;
286  amba_device_table ahbslv;
287  amba_device_table apbslv;
288  unsigned int      apbmst;
289} amba_confarea_type;
290
291  extern amba_confarea_type amba_conf; 
292  /* extern amba_device_table amba_ahb_masters;
293extern amba_device_table amba_ahb_slaves; 
294extern amba_device_table amba_apb_slaves;  */
295extern unsigned int amba_apbmst_base;    /* APB master base address */
296extern volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
297extern volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs; /* LEON3 GP Timer */
298extern volatile LEON3_UART_Regs_Map *LEON3_Console_Uart[LEON3_APBUARTS];
299
300/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
301
302#define LEON3_GPTIMER_EN 1
303#define LEON3_GPTIMER_RL 2
304#define LEON3_GPTIMER_LD 4
305#define LEON3_GPTIMER_IRQEN 8
306
307#ifndef ASM
308
309/*
310 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
311 *  and the Interrupt Pending Registers.
312 *
313 *  NOTE: For operations which are not atomic, this code disables interrupts
314 *        to guarantee there are no intervening accesses to the same register.
315 *        The operations which read the register, modify the value and then
316 *        store the result back are vulnerable.
317 */
318
319#define LEON_Clear_interrupt( _source ) \
320  do { \
321    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
322  } while (0)
323
324#define LEON_Force_interrupt( _source ) \
325  do { \
326    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
327  } while (0)
328 
329#define LEON_Is_interrupt_pending( _source ) \
330  (LEON3_IrqCtrl_Regs.ipend & (1 << (_source)))
331 
332#define LEON_Is_interrupt_masked( _source ) \
333  (LEON3_IrqCtrl_Regs.mask_p0 & (1 << (_source)))
334 
335#define LEON_Mask_interrupt( _source ) \
336  do { \
337    uint32_t _level; \
338    \
339    _level = sparc_disable_interrupts(); \
340     LEON3_IrqCtrl_Regs->mask_p0  &= ~(1 << (_source)); \
341    sparc_enable_interrupts( _level ); \
342  } while (0)
343 
344#define LEON_Unmask_interrupt( _source ) \
345  do { \
346    uint32_t _level; \
347    \
348    _level = sparc_disable_interrupts(); \
349      LEON3_IrqCtrl_Regs->mask_p0 |= (1 << (_source)); \
350    sparc_enable_interrupts( _level ); \
351  } while (0)
352
353#define LEON_Disable_interrupt( _source, _previous ) \
354  do { \
355    uint32_t _level; \
356    uint32_t _mask = 1 << (_source); \
357    \
358    _level = sparc_disable_interrupts(); \
359      (_previous) = LEON3_IrqCtrl_Regs->mask_p0; \
360      LEON3_IrqCtrl_Regs->mask_p0 = _previous & ~_mask; \
361    sparc_enable_interrupts( _level ); \
362    (_previous) &= _mask; \
363  } while (0)
364 
365#define LEON_Restore_interrupt( _source, _previous ) \
366  do { \
367    uint32_t _level; \
368    uint32_t _mask = 1 << (_source); \
369    \
370    _level = sparc_disable_interrupts(); \
371      LEON3_IrqCtrl_Regs->mask_p0 = \
372        (LEON3_IrqCtrl_Regs->mask_p0 & ~_mask) | (_previous); \
373    sparc_enable_interrupts( _level ); \
374  } while (0)
375
376/*
377 *  Each timer control register is organized as follows:
378 *
379 *    D0 - Enable
380 *          1 = enable counting
381 *          0 = hold scaler and counter
382 *
383 *    D1 - Counter Reload
384 *          1 = reload counter at zero and restart
385 *          0 = stop counter at zero
386 *
387 *    D2 - Counter Load
388 *          1 = load counter with preset value
389 *          0 = no function
390 *
391 */
392
393#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
394#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
395
396#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
397
398#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
399#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
400
401#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
402#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
403
404#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
405#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
406
407#endif /* !ASM */
408
409#ifdef __cplusplus
410}
411#endif
412
413#endif /* !_INCLUDE_LEON_h */
414
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