1 | /** |
---|
2 | * @file |
---|
3 | * @ingroup sparc_leon3 |
---|
4 | * @brief LEON3 BSP data types and macros |
---|
5 | */ |
---|
6 | |
---|
7 | /* leon.h |
---|
8 | * |
---|
9 | * LEON3 BSP data types and macros. |
---|
10 | * |
---|
11 | * COPYRIGHT (c) 1989-1998. |
---|
12 | * On-Line Applications Research Corporation (OAR). |
---|
13 | * |
---|
14 | * Modified for LEON3 BSP. |
---|
15 | * COPYRIGHT (c) 2004. |
---|
16 | * Gaisler Research. |
---|
17 | * |
---|
18 | * The license and distribution terms for this file may be |
---|
19 | * found in the file LICENSE in this distribution or at |
---|
20 | * http://www.rtems.com/license/LICENSE. |
---|
21 | */ |
---|
22 | |
---|
23 | #ifndef _INCLUDE_LEON_h |
---|
24 | #define _INCLUDE_LEON_h |
---|
25 | |
---|
26 | #include <rtems/score/sparc.h> |
---|
27 | #include <amba.h> |
---|
28 | |
---|
29 | #ifdef __cplusplus |
---|
30 | extern "C" { |
---|
31 | #endif |
---|
32 | |
---|
33 | #define LEON_INTERRUPT_EXTERNAL_1 5 |
---|
34 | |
---|
35 | #ifndef ASM |
---|
36 | /* |
---|
37 | * Trap Types for on-chip peripherals |
---|
38 | * |
---|
39 | * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments |
---|
40 | * |
---|
41 | * NOTE: The priority level for each source corresponds to the least |
---|
42 | * significant nibble of the trap type. |
---|
43 | */ |
---|
44 | |
---|
45 | #define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10) |
---|
46 | |
---|
47 | #define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10) |
---|
48 | |
---|
49 | #define LEON_INT_TRAP( _trap ) \ |
---|
50 | ( (_trap) >= 0x11 && \ |
---|
51 | (_trap) <= 0x1F ) |
---|
52 | |
---|
53 | /* /\* */ |
---|
54 | /* * This is used to manipulate the on-chip registers. */ |
---|
55 | /* * */ |
---|
56 | /* * The following symbol must be defined in the linkcmds file and point */ |
---|
57 | /* * to the correct location. */ |
---|
58 | /* *\/ */ |
---|
59 | /* Leon uses dynamic register mapping using amba configuration records */ |
---|
60 | /* LEON_Register_Map is obsolete */ |
---|
61 | /* extern LEON_Register_Map LEON_REG; */ |
---|
62 | |
---|
63 | #endif |
---|
64 | |
---|
65 | /* |
---|
66 | * The following defines the bits in Memory Configuration Register 1. |
---|
67 | */ |
---|
68 | |
---|
69 | #define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK 0x0003C000 |
---|
70 | |
---|
71 | /* |
---|
72 | * The following defines the bits in Memory Configuration Register 1. |
---|
73 | */ |
---|
74 | |
---|
75 | #define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00 |
---|
76 | |
---|
77 | |
---|
78 | /* |
---|
79 | * The following defines the bits in the Timer Control Register. |
---|
80 | */ |
---|
81 | |
---|
82 | #define LEON_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */ |
---|
83 | /* 0 = hold scalar and counter */ |
---|
84 | #define LEON_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */ |
---|
85 | /* 0 = stop at 0 */ |
---|
86 | #define LEON_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */ |
---|
87 | /* 0 = no function */ |
---|
88 | |
---|
89 | /* |
---|
90 | * The following defines the bits in the UART Control Registers. |
---|
91 | * |
---|
92 | */ |
---|
93 | |
---|
94 | #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ |
---|
95 | |
---|
96 | /* |
---|
97 | * The following defines the bits in the LEON UART Status Registers. |
---|
98 | */ |
---|
99 | |
---|
100 | #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */ |
---|
101 | #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ |
---|
102 | #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ |
---|
103 | #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */ |
---|
104 | #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */ |
---|
105 | #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */ |
---|
106 | #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ |
---|
107 | #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ |
---|
108 | |
---|
109 | /* |
---|
110 | * The following defines the bits in the LEON UART Status Registers. |
---|
111 | */ |
---|
112 | |
---|
113 | #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */ |
---|
114 | #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */ |
---|
115 | #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ |
---|
116 | #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */ |
---|
117 | #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */ |
---|
118 | #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */ |
---|
119 | #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */ |
---|
120 | #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */ |
---|
121 | |
---|
122 | extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs; /* LEON3 Interrupt Controller */ |
---|
123 | extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */ |
---|
124 | |
---|
125 | /* LEON3 CPU Index of boot CPU */ |
---|
126 | extern uint32_t LEON3_Cpu_Index; |
---|
127 | |
---|
128 | /* The external IRQ number, -1 if not external interrupts */ |
---|
129 | extern int LEON3_IrqCtrl_EIrq; |
---|
130 | |
---|
131 | static __inline__ int bsp_irq_fixup(int irq) |
---|
132 | { |
---|
133 | int eirq; |
---|
134 | |
---|
135 | if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) { |
---|
136 | /* Get interrupt number from IRQ controller */ |
---|
137 | eirq = LEON3_IrqCtrl_Regs->intid[LEON3_Cpu_Index] & 0x1f; |
---|
138 | if (eirq & 0x10) |
---|
139 | irq = eirq; |
---|
140 | } |
---|
141 | |
---|
142 | return irq; |
---|
143 | } |
---|
144 | |
---|
145 | /* Macros used for manipulating bits in LEON3 GP Timer Control Register */ |
---|
146 | |
---|
147 | #define LEON3_GPTIMER_EN 1 |
---|
148 | #define LEON3_GPTIMER_RL 2 |
---|
149 | #define LEON3_GPTIMER_LD 4 |
---|
150 | #define LEON3_GPTIMER_IRQEN 8 |
---|
151 | |
---|
152 | #define LEON3_MP_IRQ 14 /* Irq used by shared memory driver */ |
---|
153 | |
---|
154 | #define LEON3_IRQMPSTATUS_CPUNR 28 |
---|
155 | #define LEON3_IRQMPSTATUS_BROADCAST 27 |
---|
156 | |
---|
157 | |
---|
158 | #ifndef ASM |
---|
159 | |
---|
160 | /* |
---|
161 | * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, |
---|
162 | * and the Interrupt Pending Registers. |
---|
163 | * |
---|
164 | * NOTE: For operations which are not atomic, this code disables interrupts |
---|
165 | * to guarantee there are no intervening accesses to the same register. |
---|
166 | * The operations which read the register, modify the value and then |
---|
167 | * store the result back are vulnerable. |
---|
168 | */ |
---|
169 | |
---|
170 | #define LEON_Clear_interrupt( _source ) \ |
---|
171 | do { \ |
---|
172 | LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \ |
---|
173 | } while (0) |
---|
174 | |
---|
175 | #define LEON_Force_interrupt( _source ) \ |
---|
176 | do { \ |
---|
177 | LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \ |
---|
178 | } while (0) |
---|
179 | |
---|
180 | #define LEON_Is_interrupt_pending( _source ) \ |
---|
181 | (LEON3_IrqCtrl_Regs->ipend & (1 << (_source))) |
---|
182 | |
---|
183 | #define LEON_Is_interrupt_masked( _source ) \ |
---|
184 | do {\ |
---|
185 | (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & (1 << (_source))); \ |
---|
186 | } while (0) |
---|
187 | |
---|
188 | #define LEON_Mask_interrupt( _source ) \ |
---|
189 | do { \ |
---|
190 | uint32_t _level; \ |
---|
191 | _level = sparc_disable_interrupts(); \ |
---|
192 | LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] &= ~(1 << (_source)); \ |
---|
193 | sparc_enable_interrupts( _level ); \ |
---|
194 | } while (0) |
---|
195 | |
---|
196 | #define LEON_Unmask_interrupt( _source ) \ |
---|
197 | do { \ |
---|
198 | uint32_t _level; \ |
---|
199 | _level = sparc_disable_interrupts(); \ |
---|
200 | LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] |= (1 << (_source)); \ |
---|
201 | sparc_enable_interrupts( _level ); \ |
---|
202 | } while (0) |
---|
203 | |
---|
204 | #define LEON_Disable_interrupt( _source, _previous ) \ |
---|
205 | do { \ |
---|
206 | uint32_t _level; \ |
---|
207 | uint32_t _mask = 1 << (_source); \ |
---|
208 | _level = sparc_disable_interrupts(); \ |
---|
209 | (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \ |
---|
210 | LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \ |
---|
211 | sparc_enable_interrupts( _level ); \ |
---|
212 | (_previous) &= _mask; \ |
---|
213 | } while (0) |
---|
214 | |
---|
215 | #define LEON_Restore_interrupt( _source, _previous ) \ |
---|
216 | do { \ |
---|
217 | uint32_t _level; \ |
---|
218 | uint32_t _mask = 1 << (_source); \ |
---|
219 | _level = sparc_disable_interrupts(); \ |
---|
220 | LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \ |
---|
221 | (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \ |
---|
222 | sparc_enable_interrupts( _level ); \ |
---|
223 | } while (0) |
---|
224 | |
---|
225 | /* Make all SPARC BSPs have common macros for interrupt handling */ |
---|
226 | #define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source) |
---|
227 | #define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source) |
---|
228 | #define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source) |
---|
229 | #define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source) |
---|
230 | #define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source) |
---|
231 | #define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source) |
---|
232 | #define BSP_Disable_interrupt(_source, _previous) \ |
---|
233 | LEON_Disable_interrupt(_source, _prev) |
---|
234 | #define BSP_Restore_interrupt(_source, _previous) \ |
---|
235 | LEON_Restore_interrupt(_source, _previous) |
---|
236 | |
---|
237 | /* |
---|
238 | * Each timer control register is organized as follows: |
---|
239 | * |
---|
240 | * D0 - Enable |
---|
241 | * 1 = enable counting |
---|
242 | * 0 = hold scaler and counter |
---|
243 | * |
---|
244 | * D1 - Counter Reload |
---|
245 | * 1 = reload counter at zero and restart |
---|
246 | * 0 = stop counter at zero |
---|
247 | * |
---|
248 | * D2 - Counter Load |
---|
249 | * 1 = load counter with preset value |
---|
250 | * 0 = no function |
---|
251 | * |
---|
252 | */ |
---|
253 | |
---|
254 | #define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO 0x00000002 |
---|
255 | #define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO 0x00000000 |
---|
256 | |
---|
257 | #define LEON_REG_TIMER_COUNTER_LOAD_COUNTER 0x00000004 |
---|
258 | |
---|
259 | #define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING 0x00000001 |
---|
260 | #define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING 0x00000000 |
---|
261 | |
---|
262 | #define LEON_REG_TIMER_COUNTER_RELOAD_MASK 0x00000002 |
---|
263 | #define LEON_REG_TIMER_COUNTER_ENABLE_MASK 0x00000001 |
---|
264 | |
---|
265 | #define LEON_REG_TIMER_COUNTER_DEFINED_MASK 0x00000003 |
---|
266 | #define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK 0x00000003 |
---|
267 | |
---|
268 | /* Load 32-bit word by forcing a cache-miss */ |
---|
269 | static inline unsigned int leon_r32_no_cache(uintptr_t addr) |
---|
270 | { |
---|
271 | unsigned int tmp; |
---|
272 | asm volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr)); |
---|
273 | return tmp; |
---|
274 | } |
---|
275 | |
---|
276 | /* Let user override which on-chip APBUART will be debug UART |
---|
277 | * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1... |
---|
278 | * 1 = APBUART[0] |
---|
279 | * 2 = APBUART[1] |
---|
280 | * 3 = APBUART[2] |
---|
281 | * ... |
---|
282 | */ |
---|
283 | extern int syscon_uart_index; |
---|
284 | |
---|
285 | /* Let user override which on-chip APBUART will be debug UART |
---|
286 | * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1... |
---|
287 | * 1 = APBUART[0] |
---|
288 | * 2 = APBUART[1] |
---|
289 | * 3 = APBUART[2] |
---|
290 | * ... |
---|
291 | */ |
---|
292 | extern int debug_uart_index; |
---|
293 | |
---|
294 | /* |
---|
295 | * apbuart_outbyte_polled |
---|
296 | * |
---|
297 | * This routine transmits a character using polling. |
---|
298 | */ |
---|
299 | void apbuart_outbyte_polled( |
---|
300 | struct apbuart_regs *regs, |
---|
301 | unsigned char ch, |
---|
302 | int do_cr_on_newline, |
---|
303 | int wait_sent |
---|
304 | ); |
---|
305 | |
---|
306 | /* |
---|
307 | * apbuart_inbyte_nonblocking |
---|
308 | * |
---|
309 | * This routine polls for a character. |
---|
310 | */ |
---|
311 | int apbuart_inbyte_nonblocking(struct apbuart_regs *regs); |
---|
312 | |
---|
313 | /** |
---|
314 | * @brief Initializes a secondary processor. |
---|
315 | * |
---|
316 | * @param[in] cpu The processor executing this function. |
---|
317 | */ |
---|
318 | void leon3_secondary_cpu_initialize(uint32_t cpu); |
---|
319 | |
---|
320 | void leon3_cpu_counter_initialize(void); |
---|
321 | |
---|
322 | void bsp_debug_uart_init(void); |
---|
323 | |
---|
324 | #endif /* !ASM */ |
---|
325 | |
---|
326 | #ifdef __cplusplus |
---|
327 | } |
---|
328 | #endif |
---|
329 | |
---|
330 | #endif /* !_INCLUDE_LEON_h */ |
---|
331 | /* end of include file */ |
---|
332 | |
---|