source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ 93b000e

4.115
Last change on this file since 93b000e was 93b000e, checked in by Daniel Cederman <cederman@…>, on Oct 1, 2014 at 11:53:03 AM

bsp/leon3: Replace the define LEON3_MP_IRQ with a weakly linked variable

The LEON3_MP_IRQ define is used to pick the IRQ to be used by the
shared memory driver and for inter-processor interrupts. On some LEON3
systems, for example the GR712RC, the default value of 14 is not suitable.
To make this value configurable from the application, it is replaced with
a weakly linked variable that can be overridden from the application.

  • Property mode set to 100644
File size: 9.8 KB
Line 
1/**
2 * @file
3 * @ingroup sparc_leon3
4 * @brief LEON3 BSP data types and macros
5 */
6
7/*  leon.h
8 *
9 *  LEON3 BSP data types and macros.
10 *
11 *  COPYRIGHT (c) 1989-1998.
12 *  On-Line Applications Research Corporation (OAR).
13 *
14 *  Modified for LEON3 BSP.
15 *  COPYRIGHT (c) 2004.
16 *  Gaisler Research.
17 *
18 *  The license and distribution terms for this file may be
19 *  found in the file LICENSE in this distribution or at
20 *  http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _INCLUDE_LEON_h
24#define _INCLUDE_LEON_h
25
26#include <rtems.h>
27#include <amba.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33#define LEON_INTERRUPT_EXTERNAL_1 5
34
35#ifndef ASM
36/*
37 *  Trap Types for on-chip peripherals
38 *
39 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
40 *
41 *  NOTE: The priority level for each source corresponds to the least
42 *        significant nibble of the trap type.
43 */
44
45#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
46
47#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
48
49#define LEON_INT_TRAP( _trap ) \
50  ( (_trap) >= 0x11 && \
51    (_trap) <= 0x1F )
52
53/* /\* */
54/*  *  This is used to manipulate the on-chip registers. */
55/*  * */
56/*  *  The following symbol must be defined in the linkcmds file and point */
57/*  *  to the correct location. */
58/*  *\/ */
59/* Leon uses dynamic register mapping using amba configuration records */
60/* LEON_Register_Map is obsolete */
61/* extern LEON_Register_Map LEON_REG; */
62
63#endif
64
65/*
66 *  The following defines the bits in Memory Configuration Register 1.
67 */
68
69#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
70
71/*
72 *  The following defines the bits in Memory Configuration Register 1.
73 */
74
75#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
76
77
78/*
79 *  The following defines the bits in the Timer Control Register.
80 */
81
82#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
83                                              /* 0 = hold scalar and counter */
84#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
85                                              /* 0 = stop at 0 */
86#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
87                                              /* 0 = no function */
88
89/*
90 *  The following defines the bits in the LEON Cache Control Register.
91 */
92#define LEON3_REG_CACHE_CTRL_FI      0x00200000 /* Flush instruction cache */
93
94/* LEON3 Interrupt Controller */
95extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
96/* LEON3 GP Timer */
97extern volatile struct gptimer_regs *LEON3_Timer_Regs;
98
99/* LEON3 CPU Index of boot CPU */
100extern uint32_t LEON3_Cpu_Index;
101
102/* The external IRQ number, -1 if not external interrupts */
103extern int LEON3_IrqCtrl_EIrq;
104
105static __inline__ int bsp_irq_fixup(int irq)
106{
107  int eirq, cpu;
108
109  if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) {
110    /* Get interrupt number from IRQ controller */
111    cpu = _LEON3_Get_current_processor();
112    eirq = LEON3_IrqCtrl_Regs->intid[cpu] & 0x1f;
113    if (eirq & 0x10)
114      irq = eirq;
115  }
116
117  return irq;
118}
119
120/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
121
122#define LEON3_IRQMPSTATUS_CPUNR     28
123#define LEON3_IRQMPSTATUS_BROADCAST 27
124
125
126#ifndef ASM
127
128/*
129 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
130 *  and the Interrupt Pending Registers.
131 *
132 *  NOTE: For operations which are not atomic, this code disables interrupts
133 *        to guarantee there are no intervening accesses to the same register.
134 *        The operations which read the register, modify the value and then
135 *        store the result back are vulnerable.
136 */
137
138extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
139
140#define LEON3_IRQCTRL_ACQUIRE( _lock_context ) \
141  rtems_interrupt_lock_acquire( &LEON3_IrqCtrl_Lock, _lock_context )
142
143#define LEON3_IRQCTRL_RELEASE( _lock_context ) \
144  rtems_interrupt_lock_release( &LEON3_IrqCtrl_Lock, _lock_context )
145
146#define LEON_Clear_interrupt( _source ) \
147  do { \
148    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
149  } while (0)
150
151#define LEON_Force_interrupt( _source ) \
152  do { \
153    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
154  } while (0)
155
156#define LEON_Is_interrupt_pending( _source ) \
157  (LEON3_IrqCtrl_Regs->ipend & (1 << (_source)))
158
159#define LEON_Is_interrupt_masked( _source ) \
160  do {\
161     (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & (1 << (_source))); \
162   } while (0)
163
164#define LEON_Mask_interrupt( _source ) \
165  do { \
166    rtems_interrupt_lock_context _lock_context; \
167    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
168     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  &= ~(1 << (_source)); \
169    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
170  } while (0)
171
172#define LEON_Unmask_interrupt( _source ) \
173  do { \
174    rtems_interrupt_lock_context _lock_context; \
175    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
176    LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  |= (1 << (_source)); \
177    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
178  } while (0)
179
180#define LEON_Disable_interrupt( _source, _previous ) \
181  do { \
182    rtems_interrupt_lock_context _lock_context; \
183    uint32_t _mask = 1 << (_source); \
184    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
185     (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \
186     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \
187    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
188    (_previous) &= _mask; \
189  } while (0)
190
191#define LEON_Restore_interrupt( _source, _previous ) \
192  do { \
193    rtems_interrupt_lock_context _lock_context; \
194    uint32_t _mask = 1 << (_source); \
195    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
196      LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \
197        (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \
198    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
199  } while (0)
200
201/* Make all SPARC BSPs have common macros for interrupt handling */
202#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
203#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
204#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source)
205#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source)
206#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source)
207#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source)
208#define BSP_Disable_interrupt(_source, _previous) \
209        LEON_Disable_interrupt(_source, _prev)
210#define BSP_Restore_interrupt(_source, _previous) \
211        LEON_Restore_interrupt(_source, _previous)
212
213/*
214 *  Each timer control register is organized as follows:
215 *
216 *    D0 - Enable
217 *          1 = enable counting
218 *          0 = hold scaler and counter
219 *
220 *    D1 - Counter Reload
221 *          1 = reload counter at zero and restart
222 *          0 = stop counter at zero
223 *
224 *    D2 - Counter Load
225 *          1 = load counter with preset value
226 *          0 = no function
227 *
228 */
229
230#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
231#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
232
233#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
234
235#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
236#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
237
238#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
239#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
240
241#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
242#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
243
244#if defined(RTEMS_MULTIPROCESSING)
245  #define LEON3_CLOCK_INDEX \
246   (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
247#else
248  #define LEON3_CLOCK_INDEX 0
249#endif
250
251/*
252 * We assume that a boot loader (usually GRMON) initialized the GPTIMER 0 to
253 * run with 1MHz.  This is used to determine all clock frequencies of the PnP
254 * devices.  See also ambapp_freq_init() and ambapp_freq_get().
255 */
256#define LEON3_GPTIMER_0_FREQUENCY_SET_BY_BOOT_LOADER 1000000
257
258/* Load 32-bit word by forcing a cache-miss */
259static inline unsigned int leon_r32_no_cache(uintptr_t addr)
260{
261  unsigned int tmp;
262  __asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
263  return tmp;
264}
265
266/* Let user override which on-chip APBUART will be debug UART
267 * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
268 * 1 = APBUART[0]
269 * 2 = APBUART[1]
270 * 3 = APBUART[2]
271 * ...
272 */
273extern int syscon_uart_index;
274
275/* Let user override which on-chip APBUART will be debug UART
276 * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
277 * 1 = APBUART[0]
278 * 2 = APBUART[1]
279 * 3 = APBUART[2]
280 * ...
281 */
282extern int debug_uart_index;
283
284void leon3_cpu_counter_initialize(void);
285
286/* GRLIB extended IRQ controller register */
287void leon3_ext_irq_init(void);
288
289void bsp_debug_uart_init(void);
290
291void leon3_power_down_loop(void) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
292
293static inline uint32_t leon3_get_cpu_count(
294  volatile struct irqmp_regs *irqmp
295)
296{
297  uint32_t mpstat = irqmp->mpstat;
298
299  return ((mpstat >> LEON3_IRQMPSTATUS_CPUNR) & 0xf)  + 1;
300}
301
302static inline void leon3_set_system_register(uint32_t addr, uint32_t val)
303{
304  __asm__ volatile(
305    "sta %1, [%0] 2"
306    :
307    : "r" (addr), "r" (val)
308  );
309}
310
311static inline uint32_t leon3_get_system_register(uint32_t addr)
312{
313  uint32_t val;
314
315  __asm__ volatile(
316    "lda [%1] 2, %0"
317    : "=r" (val)
318    : "r" (addr)
319  );
320
321  return val;
322}
323
324static inline void leon3_set_cache_control_register(uint32_t val)
325{
326  leon3_set_system_register(0x0, val);
327}
328
329static inline uint32_t leon3_get_cache_control_register(void)
330{
331  return leon3_get_system_register(0x0);
332}
333
334static inline uint32_t leon3_get_inst_cache_config_register(void)
335{
336  return leon3_get_system_register(0x8);
337}
338
339static inline uint32_t leon3_get_data_cache_config_register(void)
340{
341  return leon3_get_system_register(0xc);
342}
343
344static inline bool leon3_irqmp_has_timestamp(
345  volatile struct irqmp_timestamp_regs *irqmp_ts
346)
347{
348  return (irqmp_ts->control >> 27) > 0;
349}
350
351#endif /* !ASM */
352
353#ifdef __cplusplus
354}
355#endif
356
357#endif /* !_INCLUDE_LEON_h */
358/* end of include file */
359
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