source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ 674be421

4.104.114.84.95
Last change on this file since 674be421 was 674be421, checked in by Ralf Corsepius <ralf.corsepius@…>, on 03/17/06 at 10:11:37

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1/*  leon.h
2 *
3 *  LEON3 BSP data types and macros.
4 *
5 *  COPYRIGHT (c) 1989-1998.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  Modified for LEON3 BSP.
9 *  COPYRIGHT (c) 2004.
10 *  Gaisler Research.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18 
19#ifndef _INCLUDE_LEON_h
20#define _INCLUDE_LEON_h
21
22#include <rtems/score/sparc.h>
23#include <amba.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#ifndef ASM
30/*
31 *  Trap Types for on-chip peripherals
32 *
33 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
34 *
35 *  NOTE: The priority level for each source corresponds to the least
36 *        significant nibble of the trap type.
37 */
38
39#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
40
41#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
42
43#define LEON_INT_TRAP( _trap ) \
44  ( (_trap) >= 0x11 && \
45    (_trap) <= 0x1F )
46   
47/*
48 *  Structure for LEON memory mapped registers. 
49 *
50 *  Source: Section 6.1 - On-chip registers
51 *
52 *  NOTE:  There is only one of these structures per CPU, its base address
53 *         is 0x80000000, and the variable LEON_REG is placed there by the
54 *         linkcmds file.
55 */
56
57/* Leon uses dynamic register mapping using amba configuration records,
58 * LEON_Register_Map is obsolete
59 */
60/*
61  typedef struct {
62        volatile unsigned int Memory_Config_1;
63        volatile unsigned int Memory_Config_2;
64        volatile unsigned int Edac_Control;
65        volatile unsigned int Failed_Address;
66        volatile unsigned int Memory_Status;
67        volatile unsigned int Cache_Control;
68        volatile unsigned int Power_Down;
69        volatile unsigned int Write_Protection_1;
70        volatile unsigned int Write_Protection_2;
71        volatile unsigned int Leon_Configuration;
72        volatile unsigned int dummy2;
73        volatile unsigned int dummy3;
74        volatile unsigned int dummy4;   
75        volatile unsigned int dummy5;
76        volatile unsigned int dummy6;
77        volatile unsigned int dummy7;
78        volatile unsigned int Timer_Counter_1;
79        volatile unsigned int Timer_Reload_1;
80        volatile unsigned int Timer_Control_1;
81        volatile unsigned int Watchdog;
82        volatile unsigned int Timer_Counter_2;
83        volatile unsigned int Timer_Reload_2;
84        volatile unsigned int Timer_Control_2;
85        volatile unsigned int dummy8;
86        volatile unsigned int Scaler_Counter;
87        volatile unsigned int Scaler_Reload;
88        volatile unsigned int dummy9;
89        volatile unsigned int dummy10;
90        volatile unsigned int UART_Channel_1;
91        volatile unsigned int UART_Status_1;
92        volatile unsigned int UART_Control_1;
93        volatile unsigned int UART_Scaler_1;
94        volatile unsigned int UART_Channel_2;
95        volatile unsigned int UART_Status_2;
96        volatile unsigned int UART_Control_2;
97        volatile unsigned int UART_Scaler_2;
98        volatile unsigned int Interrupt_Mask;
99        volatile unsigned int Interrupt_Pending;
100        volatile unsigned int Interrupt_Force;
101        volatile unsigned int Interrupt_Clear;
102        volatile unsigned int PIO_Data;
103        volatile unsigned int PIO_Direction;
104        volatile unsigned int PIO_Interrupt;
105} LEON_Register_Map;
106*/
107
108typedef struct {
109  volatile unsigned int data;
110  volatile unsigned int status;
111  volatile unsigned int ctrl;
112} LEON3_UART_Regs_Map;
113
114typedef struct {
115  volatile unsigned int ilevel;
116  volatile unsigned int ipend;
117  volatile unsigned int iforce;
118  volatile unsigned int iclear;
119  volatile unsigned int notused00;
120  volatile unsigned int notused01;
121  volatile unsigned int notused02;
122  volatile unsigned int notused03;
123  volatile unsigned int notused10;
124  volatile unsigned int notused11;
125  volatile unsigned int notused12;
126  volatile unsigned int notused13;
127  volatile unsigned int notused20;
128  volatile unsigned int notused21;
129  volatile unsigned int notused22;
130  volatile unsigned int notused23;
131  volatile unsigned int mask_p0;
132  volatile unsigned int mask_p1;
133  volatile unsigned int mask_p2;
134  volatile unsigned int mask_p3;
135  volatile unsigned int mask_p4;
136  volatile unsigned int mask_p5;
137  volatile unsigned int mask_p6;
138  volatile unsigned int mask_p7;
139  volatile unsigned int mask_p8;
140  volatile unsigned int mask_p9;
141  volatile unsigned int mask_p10;
142  volatile unsigned int mask_p11;
143  volatile unsigned int mask_p12;
144  volatile unsigned int mask_p13;
145  volatile unsigned int mask_p14;
146  volatile unsigned int mask_p15;
147} LEON3_IrqCtrl_Regs_Map;
148
149/*
150typedef struct {
151  volatile unsigned int value;
152  volatile unsigned int reload;
153  volatile unsigned int conf;
154  volatile unsigned int notused;
155} LEON3_Timer_SubType;
156*/
157
158typedef struct {
159  volatile unsigned int scaler_value;   /* common timer registers */
160  volatile unsigned int scaler_reload;
161  volatile unsigned int status;
162  volatile unsigned int notused;
163  volatile unsigned int value_t0;       /* timer 0 */
164  volatile unsigned int reload_t0;
165  volatile unsigned int conf_t0;
166  volatile unsigned int notused0;
167  volatile unsigned int value_t1;       /* timer 1 */
168  volatile unsigned int reload_t1;
169  volatile unsigned int conf_t1;
170  volatile unsigned int notused1;
171  volatile unsigned int value_t2;       /* timer 2 */
172  volatile unsigned int reload_t2;
173  volatile unsigned int conf_t2;
174  volatile unsigned int notused2;
175  volatile unsigned int value_t3;       /* timer 3 */
176  volatile unsigned int reload_t3;
177  volatile unsigned int conf_t3;
178  volatile unsigned int notused3;
179  volatile unsigned int value_t4;       /* timer 4 */
180  volatile unsigned int reload_t4;
181  volatile unsigned int conf_t4;
182  volatile unsigned int notused4;
183  volatile unsigned int value_t5;       /* timer 5 */
184  volatile unsigned int reload_t5;
185  volatile unsigned int conf_t5;
186  volatile unsigned int notused5;
187  volatile unsigned int value_t6;       /* timer 6 */
188  volatile unsigned int reload_t6;
189  volatile unsigned int conf_t6;
190} LEON3_Timer_Regs_Map;
191
192typedef struct {
193  volatile unsigned int iodata;
194  volatile unsigned int ioout;
195  volatile unsigned int iodir;
196  volatile unsigned int irqmask;
197  volatile unsigned int irqpol;
198  volatile unsigned int irqedge;
199} LEON3_IOPORT_Regs_Map;
200
201/* /\* */
202/*  *  This is used to manipulate the on-chip registers. */
203/*  * */
204/*  *  The following symbol must be defined in the linkcmds file and point */
205/*  *  to the correct location. */
206/*  *\/ */
207/* Leon uses dynamic register mapping using amba configuration records */
208/* LEON_Register_Map is obsolete */
209/* extern LEON_Register_Map LEON_REG; */
210 
211#endif
212
213/*
214 *  The following defines the bits in Memory Configuration Register 1.
215 */
216
217#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
218
219/*
220 *  The following defines the bits in Memory Configuration Register 1.
221 */
222
223#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
224
225 
226/*
227 *  The following defines the bits in the Timer Control Register.
228 */
229
230#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
231                                                 /* 0 = hold scalar and counter */
232#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
233                                                 /* 0 = stop at 0 */
234#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
235                                                 /* 0 = no function */
236
237/*
238 *  The following defines the bits in the UART Control Registers.
239 *
240 */
241
242#define LEON_REG_UART_CONTROL_RTD  0x000000FF /* RX/TX data */
243 
244/*
245 *  The following defines the bits in the LEON UART Status Registers.
246 */
247
248#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
249#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
250#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
251#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
252#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
253#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
254#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
255#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
256
257 
258/*
259 *  The following defines the bits in the LEON UART Status Registers.
260 */
261
262#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
263#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
264#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
265#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
266#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
267#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
268#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
269#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
270
271
272/*
273 *  Types and structure used for AMBA Plug & Play bus scanning
274 *
275 */
276
277typedef struct amba_device_table {
278  int            devnr;           /* numbrer of devices on AHB or APB bus */
279  unsigned int   *addr[16];       /* addresses to the devices configuration tables */
280} amba_device_table;
281
282typedef struct amba_confarea_type {
283  amba_device_table ahbmst;
284  amba_device_table ahbslv;
285  amba_device_table apbslv;
286  unsigned int      apbmst;
287} amba_confarea_type;
288
289  extern amba_confarea_type amba_conf; 
290  /* extern amba_device_table amba_ahb_masters;
291extern amba_device_table amba_ahb_slaves; 
292extern amba_device_table amba_apb_slaves;  */
293extern unsigned int amba_apbmst_base;    /* APB master base address */
294extern volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
295extern volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs; /* LEON3 GP Timer */
296extern volatile LEON3_UART_Regs_Map *LEON3_Console_Uart[LEON3_APBUARTS];
297
298/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
299
300#define LEON3_GPTIMER_EN 1
301#define LEON3_GPTIMER_RL 2
302#define LEON3_GPTIMER_LD 4
303#define LEON3_GPTIMER_IRQEN 8
304
305#ifndef ASM
306
307/*
308 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
309 *  and the Interrupt Pending Registers.
310 *
311 *  NOTE: For operations which are not atomic, this code disables interrupts
312 *        to guarantee there are no intervening accesses to the same register.
313 *        The operations which read the register, modify the value and then
314 *        store the result back are vulnerable.
315 */
316
317#define LEON_Clear_interrupt( _source ) \
318  do { \
319    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
320  } while (0)
321
322#define LEON_Force_interrupt( _source ) \
323  do { \
324    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
325  } while (0)
326 
327#define LEON_Is_interrupt_pending( _source ) \
328  (LEON3_IrqCtrl_Regs.ipend & (1 << (_source)))
329 
330#define LEON_Is_interrupt_masked( _source ) \
331  (LEON3_IrqCtrl_Regs.mask_p0 & (1 << (_source)))
332 
333#define LEON_Mask_interrupt( _source ) \
334  do { \
335    uint32_t _level; \
336    \
337    _level = sparc_disable_interrupts(); \
338     LEON3_IrqCtrl_Regs->mask_p0  &= ~(1 << (_source)); \
339    sparc_enable_interrupts( _level ); \
340  } while (0)
341 
342#define LEON_Unmask_interrupt( _source ) \
343  do { \
344    uint32_t _level; \
345    \
346    _level = sparc_disable_interrupts(); \
347      LEON3_IrqCtrl_Regs->mask_p0 |= (1 << (_source)); \
348    sparc_enable_interrupts( _level ); \
349  } while (0)
350
351#define LEON_Disable_interrupt( _source, _previous ) \
352  do { \
353    uint32_t _level; \
354    uint32_t _mask = 1 << (_source); \
355    \
356    _level = sparc_disable_interrupts(); \
357      (_previous) = LEON3_IrqCtrl_Regs->mask_p0; \
358      LEON3_IrqCtrl_Regs->mask_p0 = _previous & ~_mask; \
359    sparc_enable_interrupts( _level ); \
360    (_previous) &= _mask; \
361  } while (0)
362 
363#define LEON_Restore_interrupt( _source, _previous ) \
364  do { \
365    uint32_t _level; \
366    uint32_t _mask = 1 << (_source); \
367    \
368    _level = sparc_disable_interrupts(); \
369      LEON3_IrqCtrl_Regs->mask_p0 = \
370        (LEON3_IrqCtrl_Regs->mask_p0 & ~_mask) | (_previous); \
371    sparc_enable_interrupts( _level ); \
372  } while (0)
373
374/*
375 *  Each timer control register is organized as follows:
376 *
377 *    D0 - Enable
378 *          1 = enable counting
379 *          0 = hold scaler and counter
380 *
381 *    D1 - Counter Reload
382 *          1 = reload counter at zero and restart
383 *          0 = stop counter at zero
384 *
385 *    D2 - Counter Load
386 *          1 = load counter with preset value
387 *          0 = no function
388 *
389 */
390
391#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
392#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
393
394#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
395
396#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
397#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
398
399#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
400#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
401
402#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
403#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
404
405#endif /* !ASM */
406
407#ifdef __cplusplus
408}
409#endif
410
411#endif /* !_INCLUDE_LEON_h */
412
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