source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ 5da315f

4.11
Last change on this file since 5da315f was 5da315f, checked in by Daniel Hellstrom <daniel@…>, on Feb 19, 2015 at 9:06:54 AM

leon3: make timer initialization configurable

Its now possible to select which timer core will be used for
system clock timer and to control the timer prescaler that
affects all timer instances on that timer core.

The timer and interrupt controller AMBA devices are exported
to make it possible for other code to get detailed information.
For example the frequency of the timer and interrupt controller
is required by the cpucounter support.

  • Property mode set to 100644
File size: 12.0 KB
Line 
1/**
2 * @file
3 * @ingroup sparc_leon3
4 * @brief LEON3 BSP data types and macros
5 */
6
7/*  leon.h
8 *
9 *  LEON3 BSP data types and macros.
10 *
11 *  COPYRIGHT (c) 1989-1998.
12 *  On-Line Applications Research Corporation (OAR).
13 *
14 *  Modified for LEON3 BSP.
15 *  COPYRIGHT (c) 2004.
16 *  Gaisler Research.
17 *
18 *  The license and distribution terms for this file may be
19 *  found in the file LICENSE in this distribution or at
20 *  http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _INCLUDE_LEON_h
24#define _INCLUDE_LEON_h
25
26#include <rtems.h>
27#include <amba.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33#define LEON_INTERRUPT_EXTERNAL_1 5
34
35#ifndef ASM
36/*
37 *  Trap Types for on-chip peripherals
38 *
39 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
40 *
41 *  NOTE: The priority level for each source corresponds to the least
42 *        significant nibble of the trap type.
43 */
44
45#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
46
47#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
48
49#define LEON_INT_TRAP( _trap ) \
50  ( (_trap) >= 0x11 && \
51    (_trap) <= 0x1F )
52
53/* /\* */
54/*  *  This is used to manipulate the on-chip registers. */
55/*  * */
56/*  *  The following symbol must be defined in the linkcmds file and point */
57/*  *  to the correct location. */
58/*  *\/ */
59/* Leon uses dynamic register mapping using amba configuration records */
60/* LEON_Register_Map is obsolete */
61/* extern LEON_Register_Map LEON_REG; */
62
63#endif
64
65/*
66 *  The following defines the bits in Memory Configuration Register 1.
67 */
68
69#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
70
71/*
72 *  The following defines the bits in Memory Configuration Register 1.
73 */
74
75#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
76
77
78/*
79 *  The following defines the bits in the Timer Control Register.
80 */
81
82#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
83                                              /* 0 = hold scalar and counter */
84#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
85                                              /* 0 = stop at 0 */
86#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
87                                              /* 0 = no function */
88
89/*
90 *  The following defines the bits in the LEON Cache Control Register.
91 */
92#define LEON3_REG_CACHE_CTRL_FI      0x00200000 /* Flush instruction cache */
93#define LEON3_REG_CACHE_CTRL_DS      0x00800000 /* Data cache snooping */
94
95/* LEON3 Interrupt Controller */
96extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;
97extern struct ambapp_dev *irqmp_dev;
98
99/* LEON3 GP Timer */
100extern volatile struct gptimer_regs *LEON3_Timer_Regs;
101extern struct ambapp_dev *timer_dev;
102
103/* LEON3 CPU Index of boot CPU */
104extern uint32_t LEON3_Cpu_Index;
105
106/* The external IRQ number, -1 if not external interrupts */
107extern int LEON3_IrqCtrl_EIrq;
108
109static __inline__ int bsp_irq_fixup(int irq)
110{
111  int eirq, cpu;
112
113  if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) {
114    /* Get interrupt number from IRQ controller */
115    cpu = _LEON3_Get_current_processor();
116    eirq = LEON3_IrqCtrl_Regs->intid[cpu] & 0x1f;
117    if (eirq & 0x10)
118      irq = eirq;
119  }
120
121  return irq;
122}
123
124/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
125
126#define LEON3_IRQMPSTATUS_CPUNR     28
127#define LEON3_IRQMPSTATUS_BROADCAST 27
128
129
130#ifndef ASM
131
132/*
133 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
134 *  and the Interrupt Pending Registers.
135 *
136 *  NOTE: For operations which are not atomic, this code disables interrupts
137 *        to guarantee there are no intervening accesses to the same register.
138 *        The operations which read the register, modify the value and then
139 *        store the result back are vulnerable.
140 */
141
142extern rtems_interrupt_lock LEON3_IrqCtrl_Lock;
143
144#define LEON3_IRQCTRL_ACQUIRE( _lock_context ) \
145  rtems_interrupt_lock_acquire( &LEON3_IrqCtrl_Lock, _lock_context )
146
147#define LEON3_IRQCTRL_RELEASE( _lock_context ) \
148  rtems_interrupt_lock_release( &LEON3_IrqCtrl_Lock, _lock_context )
149
150#define LEON_Clear_interrupt( _source ) \
151  do { \
152    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
153  } while (0)
154
155#define LEON_Force_interrupt( _source ) \
156  do { \
157    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
158  } while (0)
159
160#define LEON_Is_interrupt_pending( _source ) \
161  (LEON3_IrqCtrl_Regs->ipend & (1 << (_source)))
162
163#define LEON_Cpu_Is_interrupt_masked( _source, _cpu ) \
164     (!(LEON3_IrqCtrl_Regs->mask[_cpu] & (1 << (_source))))
165
166#define LEON_Cpu_Mask_interrupt( _source, _cpu ) \
167  do { \
168    rtems_interrupt_lock_context _lock_context; \
169    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
170     LEON3_IrqCtrl_Regs->mask[_cpu]  &= ~(1 << (_source)); \
171    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
172  } while (0)
173
174#define LEON_Cpu_Unmask_interrupt( _source, _cpu ) \
175  do { \
176    rtems_interrupt_lock_context _lock_context; \
177    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
178    LEON3_IrqCtrl_Regs->mask[_cpu]  |= (1 << (_source)); \
179    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
180  } while (0)
181
182#define LEON_Cpu_Disable_interrupt( _source, _previous, _cpu ) \
183  do { \
184    rtems_interrupt_lock_context _lock_context; \
185    uint32_t _mask = 1 << (_source); \
186    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
187     (_previous) = LEON3_IrqCtrl_Regs->mask[_cpu]; \
188     LEON3_IrqCtrl_Regs->mask[_cpu] = _previous & ~_mask; \
189    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
190    (_previous) &= _mask; \
191  } while (0)
192
193#define LEON_Cpu_Restore_interrupt( _source, _previous, _cpu ) \
194  do { \
195    rtems_interrupt_lock_context _lock_context; \
196    uint32_t _mask = 1 << (_source); \
197    LEON3_IRQCTRL_ACQUIRE( &_lock_context ); \
198      LEON3_IrqCtrl_Regs->mask[_cpu] = \
199        (LEON3_IrqCtrl_Regs->mask[_cpu] & ~_mask) | (_previous); \
200    LEON3_IRQCTRL_RELEASE( &_lock_context ); \
201  } while (0)
202
203/* Map single-cpu operations to local CPU */
204#define LEON_Is_interrupt_masked( _source ) \
205  LEON_Cpu_Is_interrupt_masked(_source, _LEON3_Get_current_processor())
206
207#define LEON_Mask_interrupt(_source) \
208  LEON_Cpu_Mask_interrupt(_source, _LEON3_Get_current_processor())
209
210#define LEON_Unmask_interrupt(_source) \
211  LEON_Cpu_Unmask_interrupt(_source, _LEON3_Get_current_processor())
212
213#define LEON_Disable_interrupt(_source, _previous) \
214  LEON_Cpu_Disable_interrupt(_source, _previous, _LEON3_Get_current_processor())
215
216#define LEON_Restore_interrupt(_source, _previous) \
217  LEON_Cpu_Restore_interrupt(_source, _previous, _LEON3_Get_current_processor())
218
219/* Make all SPARC BSPs have common macros for interrupt handling */
220#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
221#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
222#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source)
223#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source)
224#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source)
225#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source)
226#define BSP_Disable_interrupt(_source, _previous) \
227        LEON_Disable_interrupt(_source, _prev)
228#define BSP_Restore_interrupt(_source, _previous) \
229        LEON_Restore_interrupt(_source, _previous)
230
231/* Make all SPARC BSPs have common macros for interrupt handling on any CPU */
232#define BSP_Cpu_Is_interrupt_masked(_source, _cpu) \
233        LEON_Cpu_Is_interrupt_masked(_source, _cpu)
234#define BSP_Cpu_Unmask_interrupt(_source, _cpu) \
235        LEON_Cpu_Unmask_interrupt(_source, _cpu)
236#define BSP_Cpu_Mask_interrupt(_source, _cpu) \
237        LEON_Cpu_Mask_interrupt(_source, _cpu)
238#define BSP_Cpu_Disable_interrupt(_source, _previous, _cpu) \
239        LEON_Cpu_Disable_interrupt(_source, _prev, _cpu)
240#define BSP_Cpu_Restore_interrupt(_source, _previous, _cpu) \
241        LEON_Cpu_Restore_interrupt(_source, _previous, _cpu)
242
243/*
244 *  Each timer control register is organized as follows:
245 *
246 *    D0 - Enable
247 *          1 = enable counting
248 *          0 = hold scaler and counter
249 *
250 *    D1 - Counter Reload
251 *          1 = reload counter at zero and restart
252 *          0 = stop counter at zero
253 *
254 *    D2 - Counter Load
255 *          1 = load counter with preset value
256 *          0 = no function
257 *
258 */
259
260#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
261#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
262
263#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
264
265#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
266#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
267
268#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
269#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
270
271#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
272#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
273
274#if defined(RTEMS_MULTIPROCESSING)
275  #define LEON3_CLOCK_INDEX \
276   (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
277#else
278  #define LEON3_CLOCK_INDEX 0
279#endif
280
281/*
282 * We assume that a boot loader (usually GRMON) initialized the GPTIMER 0 to
283 * run with 1MHz.  This is used to determine all clock frequencies of the PnP
284 * devices.  See also ambapp_freq_init() and ambapp_freq_get().
285 */
286#define LEON3_GPTIMER_0_FREQUENCY_SET_BY_BOOT_LOADER 1000000
287
288/* Load 32-bit word by forcing a cache-miss */
289static inline unsigned int leon_r32_no_cache(uintptr_t addr)
290{
291  unsigned int tmp;
292  __asm__ volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
293  return tmp;
294}
295
296/* Let user override which on-chip APBUART will be debug UART
297 * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
298 * 1 = APBUART[0]
299 * 2 = APBUART[1]
300 * 3 = APBUART[2]
301 * ...
302 */
303extern int syscon_uart_index;
304
305/* Let user override which on-chip APBUART will be debug UART
306 * 0 = Default APBUART. On MP system CPU0=APBUART0, CPU1=APBUART1...
307 * 1 = APBUART[0]
308 * 2 = APBUART[1]
309 * 3 = APBUART[2]
310 * ...
311 */
312extern int debug_uart_index;
313
314/* Let user override which on-chip TIMER core will be used for system clock
315 * timer. This controls which timer core will be accociated with
316 * LEON3_Timer_Regs registers base address. This value will by destroyed during
317 * initialization.
318 *  0 = Default configuration. GPTIMER[0]
319 *  1 = GPTIMER[1]
320 *  2 = GPTIMER[2]
321 *  ...
322 */
323extern int leon3_timer_core_index;
324
325/* Let user override system clock timer prescaler. This affects all timer
326 * instances on the system clock timer core determined by
327 * leon3_timer_core_index.
328 *  0 = Default configuration. Use bootloader configured value.
329 *  N = Prescaler is set to N. N must not be less that number of timers.
330 *  8 = Prescaler is set to 8 (the fastest prescaler possible on all HW)
331 *  ...
332 */
333extern unsigned int leon3_timer_prescaler;
334
335void leon3_cpu_counter_initialize(void);
336
337/* GRLIB extended IRQ controller register */
338void leon3_ext_irq_init(void);
339
340void bsp_debug_uart_init(void);
341
342void leon3_power_down_loop(void) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
343
344static inline uint32_t leon3_get_cpu_count(
345  volatile struct irqmp_regs *irqmp
346)
347{
348  uint32_t mpstat = irqmp->mpstat;
349
350  return ((mpstat >> LEON3_IRQMPSTATUS_CPUNR) & 0xf)  + 1;
351}
352
353static inline void leon3_set_system_register(uint32_t addr, uint32_t val)
354{
355  __asm__ volatile(
356    "sta %1, [%0] 2"
357    :
358    : "r" (addr), "r" (val)
359  );
360}
361
362static inline uint32_t leon3_get_system_register(uint32_t addr)
363{
364  uint32_t val;
365
366  __asm__ volatile(
367    "lda [%1] 2, %0"
368    : "=r" (val)
369    : "r" (addr)
370  );
371
372  return val;
373}
374
375static inline void leon3_set_cache_control_register(uint32_t val)
376{
377  leon3_set_system_register(0x0, val);
378}
379
380static inline uint32_t leon3_get_cache_control_register(void)
381{
382  return leon3_get_system_register(0x0);
383}
384
385static inline bool leon3_data_cache_snooping_enabled(void)
386{
387  return leon3_get_cache_control_register() & LEON3_REG_CACHE_CTRL_DS;
388}
389
390static inline uint32_t leon3_get_inst_cache_config_register(void)
391{
392  return leon3_get_system_register(0x8);
393}
394
395static inline uint32_t leon3_get_data_cache_config_register(void)
396{
397  return leon3_get_system_register(0xc);
398}
399
400static inline bool leon3_irqmp_has_timestamp(
401  volatile struct irqmp_timestamp_regs *irqmp_ts
402)
403{
404  return (irqmp_ts->control >> 27) > 0;
405}
406
407#endif /* !ASM */
408
409#ifdef __cplusplus
410}
411#endif
412
413#endif /* !_INCLUDE_LEON_h */
414/* end of include file */
415
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