source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ 4d3933b3

4.104.114.84.95
Last change on this file since 4d3933b3 was 0b83afe9, checked in by Joel Sherrill <joel.sherrill@…>, on 07/14/06 at 20:11:29

2006-07-13 Jerry Needell <jerry.needell@…>

  • clock/ckinit.c, include/leon.h, timer/timer.c, amba/amba.c fixed up merge from 4.6.6. Correct references to LEON3_IrqCtrl_Regs_Map.mask[x] and LEON3_Timer_Regs_Map.timer[x].
  • Property mode set to 100644
File size: 11.3 KB
Line 
1/*  leon.h
2 *
3 *  LEON3 BSP data types and macros.
4 *
5 *  COPYRIGHT (c) 1989-1998.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  Modified for LEON3 BSP.
9 *  COPYRIGHT (c) 2004.
10 *  Gaisler Research.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18 
19#ifndef _INCLUDE_LEON_h
20#define _INCLUDE_LEON_h
21
22#include <rtems/score/sparc.h>
23#include <amba.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#define LEON_INTERRUPT_EXTERNAL_1 5
30
31#ifndef ASM
32/*
33 *  Trap Types for on-chip peripherals
34 *
35 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
36 *
37 *  NOTE: The priority level for each source corresponds to the least
38 *        significant nibble of the trap type.
39 */
40
41#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
42
43#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
44
45#define LEON_INT_TRAP( _trap ) \
46  ( (_trap) >= 0x11 && \
47    (_trap) <= 0x1F )
48   
49/*
50 *  Structure for LEON memory mapped registers. 
51 *
52 *  Source: Section 6.1 - On-chip registers
53 *
54 *  NOTE:  There is only one of these structures per CPU, its base address
55 *         is 0x80000000, and the variable LEON_REG is placed there by the
56 *         linkcmds file.
57 */
58
59/* Leon uses dynamic register mapping using amba configuration records,
60 * LEON_Register_Map is obsolete
61 */
62/*
63  typedef struct {
64        volatile unsigned int Memory_Config_1;
65        volatile unsigned int Memory_Config_2;
66        volatile unsigned int Edac_Control;
67        volatile unsigned int Failed_Address;
68        volatile unsigned int Memory_Status;
69        volatile unsigned int Cache_Control;
70        volatile unsigned int Power_Down;
71        volatile unsigned int Write_Protection_1;
72        volatile unsigned int Write_Protection_2;
73        volatile unsigned int Leon_Configuration;
74        volatile unsigned int dummy2;
75        volatile unsigned int dummy3;
76        volatile unsigned int dummy4;   
77        volatile unsigned int dummy5;
78        volatile unsigned int dummy6;
79        volatile unsigned int dummy7;
80        volatile unsigned int Timer_Counter_1;
81        volatile unsigned int Timer_Reload_1;
82        volatile unsigned int Timer_Control_1;
83        volatile unsigned int Watchdog;
84        volatile unsigned int Timer_Counter_2;
85        volatile unsigned int Timer_Reload_2;
86        volatile unsigned int Timer_Control_2;
87        volatile unsigned int dummy8;
88        volatile unsigned int Scaler_Counter;
89        volatile unsigned int Scaler_Reload;
90        volatile unsigned int dummy9;
91        volatile unsigned int dummy10;
92        volatile unsigned int UART_Channel_1;
93        volatile unsigned int UART_Status_1;
94        volatile unsigned int UART_Control_1;
95        volatile unsigned int UART_Scaler_1;
96        volatile unsigned int UART_Channel_2;
97        volatile unsigned int UART_Status_2;
98        volatile unsigned int UART_Control_2;
99        volatile unsigned int UART_Scaler_2;
100        volatile unsigned int Interrupt_Mask;
101        volatile unsigned int Interrupt_Pending;
102        volatile unsigned int Interrupt_Force;
103        volatile unsigned int Interrupt_Clear;
104        volatile unsigned int PIO_Data;
105        volatile unsigned int PIO_Direction;
106        volatile unsigned int PIO_Interrupt;
107} LEON_Register_Map;
108*/
109
110typedef struct {
111  volatile unsigned int data;
112  volatile unsigned int status;
113  volatile unsigned int ctrl;
114} LEON3_UART_Regs_Map;
115
116typedef struct {
117  volatile unsigned int ilevel;
118  volatile unsigned int ipend;
119  volatile unsigned int iforce;
120  volatile unsigned int iclear;
121  volatile unsigned int mpstat;
122  volatile unsigned int notused01;
123  volatile unsigned int notused02;
124  volatile unsigned int notused03;
125  volatile unsigned int notused10;
126  volatile unsigned int notused11;
127  volatile unsigned int notused12;
128  volatile unsigned int notused13;
129  volatile unsigned int notused20;
130  volatile unsigned int notused21;
131  volatile unsigned int notused22;
132  volatile unsigned int notused23;
133  volatile unsigned int mask[16];
134  volatile unsigned int force[16];
135} LEON3_IrqCtrl_Regs_Map;
136
137typedef struct {
138  volatile unsigned int value;
139  volatile unsigned int reload;
140  volatile unsigned int conf;
141  volatile unsigned int notused;
142} LEON3_Timer_SubType;
143
144
145typedef struct {
146  volatile unsigned int scaler_value;   /* common timer registers */
147  volatile unsigned int scaler_reload;
148  volatile unsigned int status;
149  volatile unsigned int notused;
150  LEON3_Timer_SubType timer[8];
151} LEON3_Timer_Regs_Map;
152
153typedef struct {
154  volatile unsigned int iodata;
155  volatile unsigned int ioout;
156  volatile unsigned int iodir;
157  volatile unsigned int irqmask;
158  volatile unsigned int irqpol;
159  volatile unsigned int irqedge;
160} LEON3_IOPORT_Regs_Map;
161
162/* /\* */
163/*  *  This is used to manipulate the on-chip registers. */
164/*  * */
165/*  *  The following symbol must be defined in the linkcmds file and point */
166/*  *  to the correct location. */
167/*  *\/ */
168/* Leon uses dynamic register mapping using amba configuration records */
169/* LEON_Register_Map is obsolete */
170/* extern LEON_Register_Map LEON_REG; */
171 
172#endif
173
174/*
175 *  The following defines the bits in Memory Configuration Register 1.
176 */
177
178#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
179
180/*
181 *  The following defines the bits in Memory Configuration Register 1.
182 */
183
184#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
185
186 
187/*
188 *  The following defines the bits in the Timer Control Register.
189 */
190
191#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
192                                                 /* 0 = hold scalar and counter */
193#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
194                                                 /* 0 = stop at 0 */
195#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
196                                                 /* 0 = no function */
197
198/*
199 *  The following defines the bits in the UART Control Registers.
200 *
201 */
202
203#define LEON_REG_UART_CONTROL_RTD  0x000000FF /* RX/TX data */
204 
205/*
206 *  The following defines the bits in the LEON UART Status Registers.
207 */
208
209#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
210#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
211#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
212#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
213#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
214#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
215#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
216#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
217
218 
219/*
220 *  The following defines the bits in the LEON UART Status Registers.
221 */
222
223#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
224#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
225#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
226#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
227#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
228#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
229#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
230#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
231
232
233/*
234 *  Types and structure used for AMBA Plug & Play bus scanning
235 *
236 */
237
238typedef struct amba_device_table {
239  int            devnr;           /* numbrer of devices on AHB or APB bus */
240  unsigned int   *addr[16];       /* addresses to the devices configuration tables */
241} amba_device_table;
242
243typedef struct amba_confarea_type {
244  amba_device_table ahbmst;
245  amba_device_table ahbslv;
246  amba_device_table apbslv;
247  unsigned int      apbmst;
248} amba_confarea_type;
249
250  extern amba_confarea_type amba_conf; 
251  /* extern amba_device_table amba_ahb_masters;
252extern amba_device_table amba_ahb_slaves; 
253extern amba_device_table amba_apb_slaves;  */
254extern unsigned int amba_apbmst_base;    /* APB master base address */
255extern volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
256extern volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs; /* LEON3 GP Timer */
257extern volatile LEON3_UART_Regs_Map *LEON3_Console_Uart[LEON3_APBUARTS];
258
259extern int LEON3_Cpu_Index;
260
261/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
262
263#define LEON3_GPTIMER_EN 1
264#define LEON3_GPTIMER_RL 2
265#define LEON3_GPTIMER_LD 4
266#define LEON3_GPTIMER_IRQEN 8
267
268#define LEON3_MP_IRQ    14        /* Irq used by shared memory driver */
269
270#ifndef ASM
271
272/*
273 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
274 *  and the Interrupt Pending Registers.
275 *
276 *  NOTE: For operations which are not atomic, this code disables interrupts
277 *        to guarantee there are no intervening accesses to the same register.
278 *        The operations which read the register, modify the value and then
279 *        store the result back are vulnerable.
280 */
281
282#define LEON_Clear_interrupt( _source ) \
283  do { \
284    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
285  } while (0)
286
287#define LEON_Force_interrupt( _source ) \
288  do { \
289    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
290  } while (0)
291 
292#define LEON_Is_interrupt_pending( _source ) \
293  (LEON3_IrqCtrl_Regs.ipend & (1 << (_source)))
294 
295#define LEON_Is_interrupt_masked( _source ) \
296  do {\
297     (LEON3_IrqCtrl_Regs.mask[LEON3_Cpu_Index] & (1 << (_source))); \
298   } while (0)
299
300 
301#define LEON_Mask_interrupt( _source ) \
302  do { \
303    uint32_t _level; \
304    _level = sparc_disable_interrupts(); \
305     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  &= ~(1 << (_source)); \
306    sparc_enable_interrupts( _level ); \
307  } while (0)
308 
309#define LEON_Unmask_interrupt( _source ) \
310  do { \
311    uint32_t _level; \
312    _level = sparc_disable_interrupts(); \
313    LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  |= (1 << (_source)); \
314    sparc_enable_interrupts( _level ); \
315  } while (0)
316
317#define LEON_Disable_interrupt( _source, _previous ) \
318  do { \
319    uint32_t _level; \
320    uint32_t _mask = 1 << (_source); \
321    _level = sparc_disable_interrupts(); \
322     (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \
323     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \
324    sparc_enable_interrupts( _level ); \
325    (_previous) &= _mask; \
326  } while (0)
327 
328#define LEON_Restore_interrupt( _source, _previous ) \
329  do { \
330    uint32_t _level; \
331    uint32_t _mask = 1 << (_source); \
332    _level = sparc_disable_interrupts(); \
333      LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \
334        (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \
335    sparc_enable_interrupts( _level ); \
336  } while (0)
337
338
339/*
340 *  Each timer control register is organized as follows:
341 *
342 *    D0 - Enable
343 *          1 = enable counting
344 *          0 = hold scaler and counter
345 *
346 *    D1 - Counter Reload
347 *          1 = reload counter at zero and restart
348 *          0 = stop counter at zero
349 *
350 *    D2 - Counter Load
351 *          1 = load counter with preset value
352 *          0 = no function
353 *
354 */
355
356#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
357#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
358
359#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
360
361#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
362#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
363
364#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
365#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
366
367#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
368#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
369
370#endif /* !ASM */
371
372#ifdef __cplusplus
373}
374#endif
375
376#endif /* !_INCLUDE_LEON_h */
377/* end of include file */
378
Note: See TracBrowser for help on using the repository browser.