source: rtems/c/src/lib/libbsp/sparc/leon3/include/leon.h @ 226d48d8

4.11
Last change on this file since 226d48d8 was 226d48d8, checked in by Daniel Hellstrom <daniel@…>, on May 16, 2012 at 3:20:35 PM

LEON: moved register definitions into grlib header file

Some register layout definitions for LEON3 reside in ambapp.h which
does not really has anything to do with device registers. The
register structures has been incorrectly named LEON3_*, the cores
are not only used on LEON3 but on LEON4 and perhaps on LEON5 when
that day comes. Some structures has been renamed according to the
GRLIB core name instead, which CPU that actually use it is not
relevant. Drivers has been updated with the new names.

Signed-off-by: Daniel Hellstrom <daniel@…>

  • Property mode set to 100644
File size: 8.5 KB
Line 
1/*  leon.h
2 *
3 *  LEON3 BSP data types and macros.
4 *
5 *  COPYRIGHT (c) 1989-1998.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  Modified for LEON3 BSP.
9 *  COPYRIGHT (c) 2004.
10 *  Gaisler Research.
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 */
16
17#ifndef _INCLUDE_LEON_h
18#define _INCLUDE_LEON_h
19
20#include <rtems/score/sparc.h>
21#include <amba.h>
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#define LEON_INTERRUPT_EXTERNAL_1 5
28
29#ifndef ASM
30/*
31 *  Trap Types for on-chip peripherals
32 *
33 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
34 *
35 *  NOTE: The priority level for each source corresponds to the least
36 *        significant nibble of the trap type.
37 */
38
39#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
40
41#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
42
43#define LEON_INT_TRAP( _trap ) \
44  ( (_trap) >= 0x11 && \
45    (_trap) <= 0x1F )
46
47/* /\* */
48/*  *  This is used to manipulate the on-chip registers. */
49/*  * */
50/*  *  The following symbol must be defined in the linkcmds file and point */
51/*  *  to the correct location. */
52/*  *\/ */
53/* Leon uses dynamic register mapping using amba configuration records */
54/* LEON_Register_Map is obsolete */
55/* extern LEON_Register_Map LEON_REG; */
56
57#endif
58
59/*
60 *  The following defines the bits in Memory Configuration Register 1.
61 */
62
63#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
64
65/*
66 *  The following defines the bits in Memory Configuration Register 1.
67 */
68
69#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
70
71
72/*
73 *  The following defines the bits in the Timer Control Register.
74 */
75
76#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
77                                                 /* 0 = hold scalar and counter */
78#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
79                                                 /* 0 = stop at 0 */
80#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
81                                                 /* 0 = no function */
82
83/*
84 *  The following defines the bits in the UART Control Registers.
85 *
86 */
87
88#define LEON_REG_UART_CONTROL_RTD  0x000000FF /* RX/TX data */
89
90/*
91 *  The following defines the bits in the LEON UART Status Registers.
92 */
93
94#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
95#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
96#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
97#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
98#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
99#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
100#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
101#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
102
103/*
104 *  The following defines the bits in the LEON UART Status Registers.
105 */
106
107#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
108#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
109#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
110#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
111#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
112#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
113#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
114#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
115
116extern volatile struct irqmp_regs *LEON3_IrqCtrl_Regs;  /* LEON3 Interrupt Controller */
117extern volatile struct gptimer_regs *LEON3_Timer_Regs; /* LEON3 GP Timer */
118
119/* LEON3 CPU Index of boot CPU */
120extern int LEON3_Cpu_Index;
121
122/* The external IRQ number, -1 if not external interrupts */
123extern int LEON3_IrqCtrl_EIrq;
124
125static __inline__ int bsp_irq_fixup(int irq)
126{
127       int eirq;
128
129       if (LEON3_IrqCtrl_EIrq != 0 && irq == LEON3_IrqCtrl_EIrq) {
130               /* Get interrupt number from IRQ controller */
131               eirq = LEON3_IrqCtrl_Regs->intid[LEON3_Cpu_Index] & 0x1f;
132               if (eirq & 0x10)
133                       irq = eirq;
134       }
135
136       return irq;
137}
138
139/* Macros used for manipulating bits in LEON3 GP Timer Control Register */
140
141#define LEON3_GPTIMER_EN 1
142#define LEON3_GPTIMER_RL 2
143#define LEON3_GPTIMER_LD 4
144#define LEON3_GPTIMER_IRQEN 8
145
146#define LEON3_MP_IRQ    14        /* Irq used by shared memory driver */
147
148#define LEON3_IRQMPSTATUS_CPUNR     28
149#define LEON3_IRQMPSTATUS_BROADCAST 27
150
151
152#ifndef ASM
153
154/*
155 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
156 *  and the Interrupt Pending Registers.
157 *
158 *  NOTE: For operations which are not atomic, this code disables interrupts
159 *        to guarantee there are no intervening accesses to the same register.
160 *        The operations which read the register, modify the value and then
161 *        store the result back are vulnerable.
162 */
163
164#define LEON_Clear_interrupt( _source ) \
165  do { \
166    LEON3_IrqCtrl_Regs->iclear = (1 << (_source)); \
167  } while (0)
168
169#define LEON_Force_interrupt( _source ) \
170  do { \
171    LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
172  } while (0)
173
174#define LEON_Is_interrupt_pending( _source ) \
175  (LEON3_IrqCtrl_Regs->ipend & (1 << (_source)))
176
177#define LEON_Is_interrupt_masked( _source ) \
178  do {\
179     (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & (1 << (_source))); \
180   } while (0)
181
182#define LEON_Mask_interrupt( _source ) \
183  do { \
184    uint32_t _level; \
185    _level = sparc_disable_interrupts(); \
186     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  &= ~(1 << (_source)); \
187    sparc_enable_interrupts( _level ); \
188  } while (0)
189
190#define LEON_Unmask_interrupt( _source ) \
191  do { \
192    uint32_t _level; \
193    _level = sparc_disable_interrupts(); \
194    LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]  |= (1 << (_source)); \
195    sparc_enable_interrupts( _level ); \
196  } while (0)
197
198#define LEON_Disable_interrupt( _source, _previous ) \
199  do { \
200    uint32_t _level; \
201    uint32_t _mask = 1 << (_source); \
202    _level = sparc_disable_interrupts(); \
203     (_previous) = LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index]; \
204     LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = _previous & ~_mask; \
205    sparc_enable_interrupts( _level ); \
206    (_previous) &= _mask; \
207  } while (0)
208
209#define LEON_Restore_interrupt( _source, _previous ) \
210  do { \
211    uint32_t _level; \
212    uint32_t _mask = 1 << (_source); \
213    _level = sparc_disable_interrupts(); \
214      LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] = \
215        (LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] & ~_mask) | (_previous); \
216    sparc_enable_interrupts( _level ); \
217  } while (0)
218
219/* Make all SPARC BSPs have common macros for interrupt handling */
220#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
221#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
222#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source)
223#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source)
224#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source)
225#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source)
226#define BSP_Disable_interrupt(_source, _previous) \
227        LEON_Disable_interrupt(_source, _prev)
228#define BSP_Restore_interrupt(_source, _previous) \
229        LEON_Restore_interrupt(_source, _previous)
230
231/*
232 *  Each timer control register is organized as follows:
233 *
234 *    D0 - Enable
235 *          1 = enable counting
236 *          0 = hold scaler and counter
237 *
238 *    D1 - Counter Reload
239 *          1 = reload counter at zero and restart
240 *          0 = stop counter at zero
241 *
242 *    D2 - Counter Load
243 *          1 = load counter with preset value
244 *          0 = no function
245 *
246 */
247
248#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
249#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
250
251#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
252
253#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
254#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
255
256#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
257#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
258
259#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
260#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
261
262/* Load 32-bit word by forcing a cache-miss */
263static inline unsigned int leon_r32_no_cache(uintptr_t addr)
264{
265        unsigned int tmp;
266        asm volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
267        return tmp;
268}
269
270#endif /* !ASM */
271
272#ifdef __cplusplus
273}
274#endif
275
276#endif /* !_INCLUDE_LEON_h */
277/* end of include file */
278
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