source: rtems/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c @ ee8933f2

4.104.114.84.9
Last change on this file since ee8933f2 was ee8933f2, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 6, 2007 at 1:17:16 PM

2007-09-06 Daniel Hellstrom <daniel@…>

  • cchip/cchip.c, include/cchip.h, include/rasta.h, rasta/rasta.c: New files missed in previous commit.
  • Property mode set to 100644
File size: 10.3 KB
Line 
1#include <rtems/bspIo.h>
2#include <pci.h>
3#include <rasta.h>
4#include <ambapp.h>
5#include <grcan_rasta.h>
6#include <grspw_rasta.h>
7#include <b1553brm_rasta.h>
8#include <apbuart_rasta.h>
9
10#include <string.h>
11
12/* If RASTA_SRAM is defined SRAM will be used, else SDRAM */
13/*#define RASTA_SRAM 1*/
14
15#define RASTA_IRQ  4
16
17/* Offset from 0x80000000 (dual bus version) */
18#define AHB1_IOAREA_BASE_ADDR 0x80100000
19#define APB2_OFFSET    0x200000
20#define IRQ_OFFSET     0x200500
21#define GRHCAN_OFFSET  0x201000
22#define BRM_OFFSET     0x100000
23#define SPW_OFFSET     0xa00
24#define UART_OFFSET    0x200200
25#define GPIO0_OFF      0x200600
26#define GPIO1_OFF      0x200700
27
28/* #define DEBUG 1 */
29
30#ifdef DEBUG
31#define DBG(x...) printk(x)
32#else
33#define DBG(x...)
34#endif
35
36/*
37typedef struct {
38  volatile unsigned int ilevel;
39  volatile unsigned int ipend;
40  volatile unsigned int iforce;
41  volatile unsigned int iclear;
42  volatile unsigned int mpstat;
43  volatile unsigned int notused01;
44  volatile unsigned int notused02;
45  volatile unsigned int notused03;
46  volatile unsigned int notused10;
47  volatile unsigned int notused11;
48  volatile unsigned int notused12;
49  volatile unsigned int notused13;
50  volatile unsigned int notused20;
51  volatile unsigned int notused21;
52  volatile unsigned int notused22;
53  volatile unsigned int notused23;
54  volatile unsigned int mask[16];
55  volatile unsigned int force[16];
56} LEON3_IrqCtrl_Regs_Map;
57*/
58static int bus, dev, fun;
59
60LEON3_IrqCtrl_Regs_Map *irq = NULL;
61LEON_Register_Map      *regs = 0x80000000;
62
63struct gpio_reg *gpio0, *gpio1;
64
65/* static rtems_isr pci_interrupt_handler (rtems_vector_number v) { */
66
67/*     volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168; */
68/*     volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
69
70/*     if (*pci_int & 0x20) { */
71       
72/*         *pci_int = 0x20; */
73
74/*         *pci_mem = 0; */
75
76/*         printk("pci died\n"); */
77
78/*     } */
79
80/* } */
81
82void *uart0_int_arg, *uart1_int_arg;
83void *spw0_int_arg, *spw1_int_arg, *spw2_int_arg;
84void *grcan_int_arg;
85void *brm_int_arg;
86
87void (*uart0_int_handler)(int irq, void *arg) = NULL;
88void (*uart1_int_handler)(int irq, void *arg) = NULL;
89void (*spw0_int_handler)(int irq, void *arg) = NULL;
90void (*spw1_int_handler)(int irq, void *arg) = NULL;
91void (*spw2_int_handler)(int irq, void *arg) = NULL;
92void (*grcan_int_handler)(int irq, void *arg) = NULL;
93void (*brm_int_handler)(int irq, void *arg) = NULL;
94
95static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
96{
97    unsigned int status;
98 
99    status = irq->ipend;
100
101    if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
102      grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
103    }
104   
105    if (status & SPW_IRQ) {
106      if ( (status & SPW0_IRQ) && spw0_int_handler ){
107        spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
108      }
109
110      if ( (status & SPW1_IRQ) && spw1_int_handler ){
111        spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
112      }
113     
114      if ( (status & SPW2_IRQ) && spw2_int_handler ){
115        spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
116      }
117    }
118    if ((status & BRM_IRQ) && brm_int_handler ){ 
119        brm_int_handler(BRM_IRQNO,brm_int_arg);
120    }
121    if ( (status & UART0_IRQ) && uart0_int_handler ) {
122      uart0_int_handler(UART0_IRQNO,uart0_int_arg);
123    }
124    if ( (status & UART1_IRQ) && uart1_int_handler) {
125      uart1_int_handler(UART1_IRQNO,uart1_int_arg);
126    }
127   
128    DBG("RASTA-IRQ: 0x%x\n",status);
129    irq->iclear = status;
130 
131}
132
133void rasta_interrrupt_register(void *handler, int irqno, void *arg)
134{
135  DBG("RASTA: Registering irq %d\n",irqno);
136  if ( irqno == UART0_IRQNO ){
137    DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
138    uart0_int_handler = handler;
139    uart0_int_arg = arg;
140   
141    /* unmask interrupt source */
142    irq->iclear = UART0_IRQ;
143    irq->mask[0] |= UART0_IRQ;
144  }
145 
146  if ( irqno == UART1_IRQNO ){
147    DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
148    uart1_int_handler = handler;
149    uart1_int_arg = arg;
150   
151    /* unmask interrupt source */
152    irq->iclear = UART1_IRQ;
153    irq->mask[0] |= UART1_IRQ;
154  }
155 
156  if ( irqno == SPW0_IRQNO ){
157    DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
158    spw0_int_handler = handler;
159    spw0_int_arg = arg;
160   
161    /* unmask interrupt source */
162    irq->iclear = SPW0_IRQ;
163    irq->mask[0] |= SPW0_IRQ;
164  }
165
166  if ( irqno == SPW1_IRQNO ){
167    DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
168    spw1_int_handler = handler;
169    spw1_int_arg = arg;
170   
171    /* unmask interrupt source */
172    irq->iclear = SPW1_IRQ;
173    irq->mask[0] |= SPW1_IRQ;
174  }
175 
176  if ( irqno == SPW2_IRQNO ){
177    DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
178    spw2_int_handler = handler;
179    spw2_int_arg = arg;
180   
181    /* unmask interrupt source */
182    irq->iclear = SPW2_IRQ;
183    irq->mask[0] |= SPW2_IRQ;
184  }
185 
186  if ( irqno == GRCAN_IRQNO ){
187    DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
188    grcan_int_handler = handler;
189    grcan_int_arg = arg;
190   
191    /* unmask interrupt source */
192    irq->iclear = GRCAN_IRQ;
193    irq->mask[0] |= GRCAN_IRQ;
194  }
195 
196  if ( irqno == BRM_IRQNO ){
197    DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
198    brm_int_handler = handler;
199    brm_int_arg = arg;
200   
201    /* unmask interrupt source */
202    irq->iclear = BRM_IRQ;
203    irq->mask[0] |= BRM_IRQ;
204  } 
205}
206
207
208int rasta_get_gpio(amba_confarea_type *abus, int index, unsigned int *address, int *irq)
209{
210  amba_apb_device dev;
211  int cores;
212 
213  if ( !abus ) 
214    return -1;
215 
216  /* Scan PnP info for GPIO port number 'index' */
217  cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index);
218  if ( cores < 1 )
219    return -1;
220 
221  if ( address )
222    *address = dev.start;
223 
224  if ( irq )
225    *irq = dev.irq;
226 
227  return 0;
228}
229
230/* AMBA Plug&Play information */
231static amba_confarea_type abus;
232static struct amba_mmap amba_maps[3];
233
234int rasta_register(void) 
235{
236    unsigned int bar0, bar1, data;
237
238    unsigned int *page0 = NULL;
239    unsigned int *apb_base = NULL;
240    int found=0;
241   
242
243    DBG("Searching for RASTA board ...");
244   
245    /* Search PCI vendor/device id. */
246    if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
247      found = 1;
248    }
249   
250    /* Search old PCI vendor/device id. */
251    if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
252      found = 1;
253    }
254   
255    /* Did we find a RASTA board? */
256    if ( !found )
257      return -1;
258   
259    DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
260
261    pci_read_config_dword(bus, dev, fun, 0x10, &bar0);
262    pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
263
264    page0 = bar0 + 0x400000; 
265    *page0 = 0x80000000;                  /* Point PAGE0 to start of APB       */
266
267    apb_base = bar0+APB2_OFFSET;
268
269/*  apb_base[0] = 0x000002ff;
270    apb_base[1] = 0x8a205260;
271    apb_base[2] = 0x00184000; */
272
273    /* Configure memory controller */
274#ifdef RASTA_SRAM
275    apb_base[0] = 0x000002ff;
276    apb_base[1] = 0x00001260;
277    apb_base[2] = 0x000e8000;
278#else
279    apb_base[0] = 0x000002ff;
280    apb_base[1] = 0x82206000;
281    apb_base[2] = 0x000e8000;
282#endif
283    /* Set up rasta irq controller */
284    irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET); 
285    irq->iclear = 0xffff;
286    irq->ilevel = 0;
287    irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
288
289    /* Configure AT697 ioport bit 7 to input pci irq */
290    regs->PIO_Direction &= ~(1<<7);
291    regs->PIO_Interrupt  = 0x87;          /* level sensitive */
292
293    apb_base[0x100] |= 0x40000000;        /* Set GRPCI mmap 0x4 */
294    apb_base[0x104] =  0x40000000;        /* 0xA0000000;  Point PAGE1 to RAM */
295
296   
297    /* set parity error response */
298    pci_read_config_dword(bus, dev, fun, 0x4, &data);
299    pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
300
301     
302    pci_master_enable(bus, dev, fun);
303
304    /* install PCI interrupt vector */
305    /*    set_vector(pci_interrupt_handler,14+0x10, 1); */
306
307     
308    /* install interrupt vector */
309    set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
310
311    /* Scan AMBA Plug&Play */
312       
313    /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
314    amba_maps[0].size = 0x10000000;
315    amba_maps[0].cpu_adr = bar0;
316    amba_maps[0].remote_amba_adr = 0x80000000;
317
318    /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
319    amba_maps[1].size = 0x10000000;
320    amba_maps[1].cpu_adr = bar1;
321    amba_maps[1].remote_amba_adr = 0x40000000;
322
323    /* Mark end of table */
324    amba_maps[2].size=0;
325    amba_maps[2].cpu_adr = 0;
326    amba_maps[2].remote_amba_adr = 0;
327       
328    memset(&abus,0,sizeof(abus));
329       
330    /* Start AMBA PnP scan at first AHB bus */
331    amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]);
332       
333    printk("Registering RASTA GRCAN driver\n\r");
334   
335    /*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/
336    grcan_rasta_int_reg=rasta_interrrupt_register;
337    if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){
338      printk("Failed to register RASTA GRCAN driver\n\r");
339      return -1;
340    }
341
342    printk("Registering RASTA BRM driver\n\r");
343
344    /*brm_register(bar0   +  BRM_OFFSET, bar1);*/
345    /* register the BRM RASTA driver, use 128k on RASTA SRAM... */
346    b1553brm_rasta_int_reg=rasta_interrrupt_register;
347          if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
348      printk("Failed to register BRM RASTA driver\n");
349      return -1;
350    }
351       
352    /* provide the spacewire driver with AMBA Plug&Play
353     * info so that it can find the GRSPW cores.
354     */
355    grspw_rasta_int_reg=rasta_interrrupt_register;
356    if ( grspw_rasta_register(&abus,bar1) ){
357      printk("Failed to register RASTA GRSPW driver\n\r");
358      return -1;
359    }
360
361    /* provide the spacewire driver with AMBA Plug&Play
362     * info so that it can find the GRSPW cores.
363     */
364    apbuart_rasta_int_reg=rasta_interrrupt_register;
365    if ( apbuart_rasta_register(&abus) ){
366      printk("Failed to register RASTA APBUART driver\n\r");
367      return -1;
368    }
369
370    /* Find GPIO0 address */
371    if ( rasta_get_gpio(&abus,0,(unsigned int *)&gpio0,NULL) ){
372      printk("Failed to get address for RASTA GPIO0\n\r");
373      return -1;
374    }
375       
376    /* Find GPIO1 address */
377    if ( rasta_get_gpio(&abus,1,(unsigned int *)&gpio1,NULL) ){
378      printk("Failed to get address for RASTA GPIO1\n\r");
379      return -1;
380    }
381   
382    /* Successfully registered the RASTA board */
383    return 0;
384}
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